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304 条记录 (耗时 0.035 秒)

    Photonic switch
    62.
    发明授权
    Photonic switch 失效
    光子开关

    公开(公告)号：US06925222B2

    公开(公告)日：2005-08-02

    申请号：US10265137

    申请日：2002-10-07

    申请人： Tamotsu Akashi ,  Tsuyoshi Yamamoto

    发明人： Tamotsu Akashi ,  Tsuyoshi Yamamoto

    IPC分类号： G02B26/02 ,  G02B6/35 ,  G02B26/08

    CPC分类号： G02B6/3512 ,  G02B6/3518 ,  G02B6/352 ,  G02B6/3546 ,  G02B6/3584 ,  G02B6/3594

    摘要： Disclosed is a photonic switch that includes a plurality of optical-path switching means having movable light reflecting portions that guide light from each of a plurality of input ports to any output port among a plurality of output ports. Each of the optical-path switching means is made to produce a specific loss so as to reduce path-to-path variations in loss along the paths from the input to the output ports. Specifically, loss along a path is the total of loss based upon optical path length and loss produced by the optical-path switching means. A specific loss is produced by each of the optical-path switching means in such a manner that total loss is equalized from path to path.

    摘要翻译： 公开了一种光子开关，其包括多个光路切换装置，其具有可将光从多个输入端口中的每一个引导到多个输出端口中的任何输出端口的可动光反射部分。 使每个光路切换装置产生特定的损耗，以便减少沿着从输入端口到输出端口的路径的路径到路径的损耗变化。 具体来说，沿着路径的损耗是基于光路长度和由光路切换装置产生的损耗的总损耗。 每个光路切换装置产生一个特定的损耗，使得总损耗从路径到路径相等。

    Silicon carbide power device having protective diode
    64.
    发明授权
    Silicon carbide power device having protective diode 有权
    具有保护二极管的碳化硅功率器件

    公开(公告)号：US06855981B2

    公开(公告)日：2005-02-15

    申请号：US10230152

    申请日：2002-08-29

    申请人： Rajesh Kumar ,  Hiroki Nakamura ,  Tsuyoshi Yamamoto ,  Toshiyuki Morishita

    发明人： Rajesh Kumar ,  Hiroki Nakamura ,  Tsuyoshi Yamamoto ,  Toshiyuki Morishita

    IPC分类号： H01L21/04 ,  H01L29/24 ,  H01L29/66 ,  H01L29/808 ,  H01L29/861 ,  H01L29/866 ,  H01L29/872 ,  H01L29/76

    CPC分类号： H01L29/66992 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/8083 ,  H01L29/861 ,  H01L29/866 ,  H01L29/872

    摘要： A silicon carbide power device includes a junction field effect transistor and a protective diode, which is a Zener or PN junction diode. The PN junction of the protective diode has a breakdown voltage lower than the PN junction of the transistor. Another silicon carbide power device includes a protective diode, which is a Schottky diode. The Schottky diode has a breakdown voltage lower than the PN junction of the transistor by adjusting Schottky barrier height or the depletion layer formed in the semiconductor included in the Schottky diode. Another silicon carbide power device includes three protective diodes, which are Zener diodes. Two of the protective diodes are used to clamp the voltages applied to the gate and the drain of the transistor due to surge energy and used to release the surge energy. The last diode is a thermo-sensitive diode, with which the temperature of the JFET is measured.

    摘要翻译： 碳化硅功率器件包括结场效应晶体管和作为齐纳二极管或PN结二极管的保护二极管。 保护二极管的PN结的击穿电压低于晶体管的PN结。 另一种碳化硅功率器件包括一个保护二极管，它是肖特基二极管。 通过调整肖特基势垒高度或肖特基二极管中包含的半导体中形成的耗尽层，肖特基二极管的击穿电压低于晶体管的PN结。 另一种碳化硅功率器件包括三个保护二极管，它们是齐纳二极管。 两个保护二极管用于钳位由于浪涌能量施加到晶体管的栅极和漏极的电压，并用于释放浪涌能量。 最后一个二极管是热敏二极管，测量JFET的温度。

    Semiconductor device and method of manufacturing same
    66.
    发明授权
    Semiconductor device and method of manufacturing same 失效
    半导体装置及其制造方法

    公开(公告)号：US6107661A

    公开(公告)日：2000-08-22

    申请号：US720018

    申请日：1996-09-27

    申请人： Naoto Okabe ,  Tsuyoshi Yamamoto

    发明人： Naoto Okabe ,  Tsuyoshi Yamamoto

    IPC分类号： H01L21/336 ,  H01L29/06 ,  H01L29/739 ,  H01L29/78 ,  H01L29/76

    CPC分类号： H01L29/7813 ,  H01L29/0696 ,  H01L29/7397 ,  H01L29/7398 ,  H01L29/7809

    摘要： A concave channel type DMOS structure having an improved gate-to-source breakdown voltage are disclosed. By establishing a curvature at a corner portion of a lattice-like pattern in a groove portion for forming the concave channel structure, the shape of the tip of a three-dimensionally projecting portion of a semiconductor region determined by a plane angle of the corner portion in the lattice-like pattern and an inclination of the groove portion is rounded. That is, a three-dimensionally sharpened corner portion in the concave channel structure is rounded, and thereby electric field concentration at the corner portion is suppressed.

    摘要翻译： 公开了具有改善的栅 - 源击穿电压的凹沟道型DMOS结构。 通过在用于形成凹槽结构的凹槽部分中的格子状图案的角部处建立曲率，由角部分的平面角确定的半导体区域的三维突出部分的尖端的形状 呈格子状，槽部的倾斜为圆形。 也就是说，凹槽结构中的三维锐角部分是圆形的，从而抑制角部处的电场集中。

    Semiconductor device having a gate electrode in a grove and a diffused region under the grove
    67.
    发明授权
    Semiconductor device having a gate electrode in a grove and a diffused region under the grove 失效
    半导体器件具有沟槽中的栅电极和沟槽下的扩散区域

    公开(公告)号：US5714781A

    公开(公告)日：1998-02-03

    申请号：US638388

    申请日：1996-04-26

    申请人： Tsuyoshi Yamamoto ,  Masami Naito ,  Takeshi Fukazawa

    发明人： Tsuyoshi Yamamoto ,  Masami Naito ,  Takeshi Fukazawa

    IPC分类号： H01L21/336 ,  H01L29/08 ,  H01L29/423 ,  H01L29/78 ,  H01L29/76 ,  H01L29/94

    CPC分类号： H01L29/7813 ,  H01L29/0847 ,  H01L29/42368

    摘要： A power MOSFET having a groove for forming a channel improved for shortening the switching time and increasing the dielectric breakdown strength of the gate oxide film is disclosed. The power MOSFET includes a concave structure in which a gate oxide film at a groove bottom is thickened. Namely, since the gate oxide film between a gate electrode and a first conductivity type semiconductor layer is thick, the capacitance of the oxide film therebetween is reduced. Therefore, the input and output capacitance of the gate oxide film can be reduced, and switching loss can be also reduced since the switching time can be shortened. Further, greater dielectric breakdown strength of the gate oxide film can be obtained as a result of the thickened gate oxide film at the groove bottom.

    摘要翻译： 公开了一种功率MOSFET，其具有用于形成通道的沟槽，用于缩短开关时间并增加栅极氧化膜的介电击穿强度。 功率MOSFET包括凹槽结构，其中凹槽底部的栅氧化膜被加厚。 也就是说，由于栅电极和第一导电类型半导体层之间的栅极氧化膜厚，所以其之间的氧化膜的电容减小。 因此，可以减小栅极氧化膜的输入和输出电容，并且可以减少开关损耗，因为可以缩短开关时间。 此外，作为沟槽底部的增厚的栅极氧化膜的结果，可以获得更大的栅极氧化膜的介电击穿强度。

    Image processing apparatus and method for previewing a color image generated by a color printer and displayed at a host computer
    68.
    发明授权
    Image processing apparatus and method for previewing a color image generated by a color printer and displayed at a host computer 失效
    用于预览由彩色打印机产生并在主计算机上显示的彩色图像的图像处理装置和方法

    公开(公告)号：US5675717A

    公开(公告)日：1997-10-07

    申请号：US378371

    申请日：1995-01-25

    申请人： Tsuyoshi Yamamoto

    发明人： Tsuyoshi Yamamoto

    IPC分类号： G06K15/00 ,  G06T11/60 ,  G09G5/02 ,  H04N1/46 ,  H04N1/60 ,  G06K15/02 ,  H04N1/50

    CPC分类号： G06K15/00 ,  H04N1/6011 ,  G06K2215/0017

    摘要： In an image processing apparatus for previewing a color image, by using a color output device for forming a preview image, processing is decentralized, the load on a host computer is reduced, and a preview-processing program can be easily formed. The apparatus includes a communication device, e.g., a bidirectional interface, for communicating with a host computer, an output device for outputting image information for image formation to an image forming device for forming an image on a recording material based on input color-image information from the host computer, and a color conversion device for previewing an image which generates color-preview-image information for correcting the image formed by the image forming device on a color monitor. The color-preview-image information is transmitted to the host computer by the communication device.

    摘要翻译： 在用于预览彩色图像的图像处理装置中，通过使用用于形成预览图像的颜色输出装置，处理是分散的，减少了主计算机上的负载，并且可以容易地形成预览处理程序。 该装置包括用于与主计算机通信的通信装置，例如双向接口，用于将图像形成的图像信息输出到用于基于输入的彩色图像信息在记录材料上形成图像的图像形成装置的输出装置 以及用于预览在颜色监视器上生成用于校正由图像形成装置形成的图像的颜色预览图像信息的图像的颜色转换装置。 彩色预览图像信息由通信设备发送到主计算机。

    Method of computing drive pattern for suppressing vibration of industrial robot
    69.
    发明授权
    Method of computing drive pattern for suppressing vibration of industrial robot 失效
    计算工业机器人振动抑制驱动模式的方法

    公开(公告)号：US5627440A

    公开(公告)日：1997-05-06

    申请号：US423458

    申请日：1995-04-19

    申请人： Tsuyoshi Yamamoto ,  Katsuhisa Tanaka ,  Fumihiko Komuro

    发明人： Tsuyoshi Yamamoto ,  Katsuhisa Tanaka ,  Fumihiko Komuro

    IPC分类号： B25J9/10 ,  B25J9/18 ,  B25J13/00 ,  G05B19/416 ,  G05D19/02 ,  G05B5/01

    CPC分类号： G05B19/416

    摘要： Vibration occurring at an arm part of an industrial robot when the arm part is moved is controlled by combining vibrations occurring at two time points for mutual interference. In each of acceleration and slowdown periods, the time difference of rise and fall time points t.sub.1, t.sub.4 and t.sub.2, t.sub.3 of a differential value of an acceleration with respect to time is set to be an integral number times the natural vibration period of the system so that the vibrations occurring at the rise and fall time points interfere with each other to cancel one another. Also, the vibration occurring in the acceleration period and the vibration occurring in the slowdown period can cancel each other.

    摘要翻译： 通过组合在两个时间点发生的相互干扰的振动来控制臂部移动时在工业机器人的臂部发生的振动。 在加速和减速时段中，加速度相对于时间的差分值的上升和下降时间点t1，t4和t2，t3的时间差被设定为系统的固有振动周期的整数倍 使得在上升和下降时间点发生的振动彼此相互干扰以相互抵消。 此外，在加速期间发生的振动和在减速期间发生的振动可以相互抵消。

    Insulated gate bipolar transistor provided with a minority carrier extracting layer
    70.
    发明授权
    Insulated gate bipolar transistor provided with a minority carrier extracting layer 失效
    具有少数载流子提取层的绝缘栅双极晶体管

    公开(公告)号：US5464992A

    公开(公告)日：1995-11-07

    申请号：US358983

    申请日：1994-12-19

    申请人： Naoto Okabe ,  Tsuyoshi Yamamoto ,  Naohito Kato

    发明人： Naoto Okabe ,  Tsuyoshi Yamamoto ,  Naohito Kato

    IPC分类号： H01L21/8234 ,  H01L21/331 ,  H01L27/088 ,  H01L29/10 ,  H01L29/739 ,  H01L29/78 ,  H01L27/01 ,  H01L33/00

    CPC分类号： H01L29/66333 ,  H01L29/1095

    摘要： A p type pad well layer is formed at the surface of an n.sup.- type drain layer under a gate bonding pad and the surface thereof is provided with a p.sup.++ type pad layer to be provided with lower resistivity. The p.sup.++ type pad layer is connected with a source electrode through a contact hole. Since the gate electrode supplying each cell with gate potential is of a pattern having extensions in a comb-teeth form arranged along the boundary between the pad region and the cell region, there is present substantially no gate electrode under the pad. Hence, introduction of impurities into the entire surface of the well layer under the pad region can be performed simultaneously with formation of p.sup.++ type contact layers after the formation of the gate electrode, and accordingly, the low resistance p.sup.++ type pad layer can be easily formed. The p.sup.++ type pad layer serves as a low resistance path for allowing the holes flowing into the region under the pad region of the insulated gate bipolar transistor to escape to the source electrode, whereby occurrence of the latch up and increase in the turn-off time due to the minority carriers concentrating into the border portion cell located adjacent to the pad region can be prevented.

    摘要翻译： p型衬垫阱层形成在栅极焊盘下方的n型漏极层的表面处，并且其表面设置有具有较低电阻率的p ++型焊盘层。 p ++型垫层通过接触孔与源电极连接。 由于向每个单元提供栅极电位的栅极电极具有沿着焊盘区域和单元区域之间的边界布置的梳齿形式的延伸的图案，所以在焊盘下面基本上不存在栅电极。 因此，在形成栅极电极之后，可以在形成p ++型接触层的同时进行在焊盘区域下方的阱层的整个表面的杂质的引入，因此能够容易地形成低电阻p ++型焊盘层 。 p ++型衬垫层用作低电阻路径，用于允许流入绝缘栅双极晶体管的焊盘区域下方的空穴逸出到源电极，由此发生闭锁并增加关断时间 由于可以防止集中在位于焊盘区域附近的边界部分单元的少数载流子。