公开(公告)号：US07358187B2

公开(公告)日：2008-04-15

申请号：US11147892

申请日：2005-06-08

申请人： Thomas Hecht ,  Stefan Jakschik ,  Uwe Schröder

发明人： Thomas Hecht ,  Stefan Jakschik ,  Uwe Schröder

IPC分类号： H01L21/31 ,  H01L21/44

CPC分类号： C23C16/0281 ,  C23C14/046 ,  C23C16/045 ,  H01L21/0228 ,  H01L21/28562 ,  H01L21/3141 ,  H01L21/76877 ,  H01L22/26

摘要： The present invention provides a coating process for patterned substrate surfaces, in which a substrate (101) is provided, the substrate having a surface (105) which is patterned in a substrate patterning region (102) and has one or more trenches (106) that are to be filled to a predetermined filling height (205), a catalyst layer (201) is introduced into the trenches (106) that are to be filled, a reaction layer (202) is deposited catalytically in the trenches (106) that are to be filled, the catalytically deposited reaction layer (202) is densified in the trenches (106) that are to be filled, and the introduction of the catalyst layer (201) and the catalytic deposition of the reaction layer (202) are repeated until the trenches (106) that are to be filled have been filled to the predetermined filling height (205).

摘要翻译： 本发明提供一种用于图案化衬底表面的涂覆方法，其中提供衬底（101），该衬底具有在衬底图案化区域（102）中被图案化并具有一个或多个沟槽（106）的表面（105） 将其填充到预定的填充高度（205），将催化剂层（201）引入要填充的沟槽（106）中，在沟槽（106）中催化沉积反应层（202），其中 要填充的催化沉积反应层（202）在要填充的沟槽（106）中致密化，并且重复引入催化剂层（201）和催化沉积反应层（202） 直到要填充的沟槽（106）已经被填充到预定填充高度（205）。

公开(公告)号：US07344953B2

公开(公告)日：2008-03-18

申请号：US11042326

申请日：2005-01-26

申请人： Thomas Hecht ,  Matthias Goldbach ,  Uwe Schröder

发明人： Thomas Hecht ,  Matthias Goldbach ,  Uwe Schröder

IPC分类号： H01L21/20

CPC分类号： C23C16/045 ,  C23C16/45525 ,  H01L21/3065 ,  H01L21/3141 ,  H01L27/10808 ,  H01L27/10829 ,  H01L27/10852 ,  H01L27/1087 ,  H01L29/66181 ,  H01L29/945

摘要： On a substrate surface, which has been patterned in the form of a relief, of a substrate, typically of a semiconductor wafer, a deposition process is used to provide a covering layer on process surfaces which are vertical or inclined with respect to the substrate surface. The covering layer is patterned in a direction which is vertical with respect to the substrate surface by limiting a process quantity of at least one precursor material and/or by temporarily limiting the deposition process, and is formed as a functional layer or mask for subsequent process steps.

摘要翻译： 在通常为半导体晶片的衬底（其形式为浮雕形式的衬底表面）上，使用沉积工艺来提供在相对于衬底表面垂直或倾斜的工艺表面上的覆盖层 。 通过限制至少一种前体材料的工艺量和/或通过临时限制沉积工艺，将覆盖层图案化成相对于衬底表面垂直的方向，并形成为后续工艺的功能层或掩模 脚步。

公开(公告)号：US07307735B2

公开(公告)日：2007-12-11

申请号：US10835259

申请日：2004-04-30

申请人： Thomas Hecht ,  Uwe Schröder ,  Ulrich Mantz ,  Stefan Jakschik ,  Andreas Orth

发明人： Thomas Hecht ,  Uwe Schröder ,  Ulrich Mantz ,  Stefan Jakschik ,  Andreas Orth

IPC分类号： G01B11/02

CPC分类号： G01N21/211 ,  G01B11/22 ,  G01J3/453

摘要： The present invention relates to a method for determining the depth of a buried structure in a semiconductor wafer. According to the invention, the layer behavior of the semiconductor wafer which is brought about by the buried structure when the semiconductor wafer is irradiated with electromagnetic radiation in the infrared range and arises as a result of the significantly longer wavelengths of the radiation used in comparison with the lateral dimensions of the buried structure is utilized to determine the depth of the buried structure by spectrometric and/or ellipsometric methods.

摘要翻译： 本发明涉及一种用于确定半导体晶片中的掩埋结构的深度的方法。 根据本发明，当半导体晶片在红外范围内被电磁辐射照射时，由掩埋结构引起的半导体晶片的层行为，并且由于与所使用的辐射相比显着更长的辐射波长而产生 掩埋结构的横向尺寸用于通过光谱测量和/或椭偏方法确定掩埋结构的深度。

公开(公告)号：US20070210367A1

公开(公告)日：2007-09-13

申请号：US11606381

申请日：2006-11-30

申请人： Henry Bernhardt ,  Thomas Hecht ,  Michael Stadtmueller ,  Christian Kapteyn ,  Uwe Schroder ,  Yeong-Kwan Kim ,  Andreas Spitzer

发明人： Henry Bernhardt ,  Thomas Hecht ,  Michael Stadtmueller ,  Christian Kapteyn ,  Uwe Schroder ,  Yeong-Kwan Kim ,  Andreas Spitzer

IPC分类号： H01L29/94

CPC分类号： H01L28/40 ,  H01L27/10861

摘要： A storage capacitor includes a first electrode layer, second electrode layer and a dielectric interlayer arranged between the first electrode layer and the second electrode layer. The dielectric interlayer contains a high-k dielectric and at least one silicon-containing component.

摘要翻译： 存储电容器包括布置在第一电极层和第二电极层之间的第一电极层，第二电极层和介电中间层。 电介质中间层包含高k电介质和至少一种含硅组分。

公开(公告)号：US20070114244A1

公开(公告)日：2007-05-24

申请号：US11557069

申请日：2006-11-06

申请人： Shaun Gatipon ,  Douglas McDougall ,  Byron Eberhart ,  Thomas Hecht ,  Roland Young ,  Richard Martindale ,  Bret Baker

发明人： Shaun Gatipon ,  Douglas McDougall ,  Byron Eberhart ,  Thomas Hecht ,  Roland Young ,  Richard Martindale ,  Bret Baker

IPC分类号： B67D5/56

CPC分类号： B67D1/0036 ,  B67D1/0022 ,  B67D1/0041 ,  B67D1/0044 ,  B67D1/005 ,  B67D1/0051 ,  B67D1/0052 ,  B67D1/06 ,  B67D1/0888 ,  B67D1/12 ,  B67D1/1256 ,  B67D1/1297 ,  B67D2210/0006 ,  B67D2210/00086 ,  B67D2210/00091

摘要： Disclosed are systems and methods for dispensing flavor doses and beverages. A beverage tower may be provided that has a small footprint and that is capable of dispensing a wide variety of flavor doses and blended beverages. The beverage tower may include a flow control module that controls the flow rate of beverage additives and water through the beverage tower and a switch module that includes a plurality of switches that may be selectively opened and closed to control the flow of beverage additives and water through the beverage tower to a point of dispense. A flavor dose or blended beverage may be dispensed by the beverage tower in accordance with user input that is provided to the beverage tower via a control panel. The user input may specify a desired beverage additive, a desired cup size, and an indication of whether a flavor shot or a blended beverage is desired. Additionally, a user may define and program into the memory of the beverage tower the various flavor doses and blended beverages that are capable of being dispensed by the beverage tower.

摘要翻译： 公开了用于分配风味剂量和饮料的系统和方法。 可以提供具有小占地面积并且能够分配各种风味剂量和混合饮料的饮料塔。 饮料塔可以包括流量控制模块，其控制通过饮料塔的饮料添加剂和水的流量;以及开关模块，其包括可以选择性地打开和关闭的多个开关，以控制饮料添加剂和水的流动 饮料塔到点分配。 调味剂或混合饮料可以根据通过控制面板提供给饮料塔的用户输入由饮料塔分配。 用户输入可以指定所需的饮料添加剂，期望的杯子尺寸，以及是否需要风味丸或混合饮料的指示。 另外，用户可以将能够被饮料塔分配的各种风味剂量和混合饮料定义并编程到饮料塔的存储器中。

公开(公告)号：US07157371B2

公开(公告)日：2007-01-02

申请号：US10653599

申请日：2003-09-02

申请人： Thomas Hecht ,  Uwe Schroeder ,  Harald Seidl ,  Martin Gutsche ,  Stefan Jakschik ,  Stephan Kudelka ,  Albert Birner

发明人： Thomas Hecht ,  Uwe Schroeder ,  Harald Seidl ,  Martin Gutsche ,  Stefan Jakschik ,  Stephan Kudelka ,  Albert Birner

IPC分类号： H01L21/44

CPC分类号： H01L27/11502 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/28061 ,  H01L21/31138 ,  H01L21/31604 ,  H01L21/3162 ,  H01L21/76802 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L27/11507 ,  H01L28/57 ,  H01L29/0895 ,  H01L29/4941

摘要： A dielectric barrier layer composed of a metal oxide is applied in thin layers with a thickness of less than 20 nanometers in the course of processing semiconductor devices by sequential gas phase deposition or molecular beam epitaxy in molecular individual layers on differently structured base substrates. The method allows, inter alias, effective conductive diffusion barriers to be formed from a dielectric material, an optimization of the layer thickness of the barrier layer, an increase in the temperature budget for subsequent process steps, and a reduction in the effort for removing the temporary barrier layers.

摘要翻译： 由金属氧化物构成的电介质阻挡层通过在不同结构的基底衬底上的分子单层中的顺序气相沉积或分子束外延处理半导体器件的过程中以小于20纳米的厚度施加。 该方法允许间隔地从电介质材料形成有效的导电扩散阻挡层，优化阻挡层的层厚度，随后的工艺步骤的温度预算的增加以及用于去除 临时阻隔层。

公开(公告)号：US07132337B2

公开(公告)日：2006-11-07

申请号：US11017194

申请日：2004-12-20

申请人： Stefan Jakschik ,  Matthias Goldbach ,  Thomas Mikolajick ,  Thomas Hecht

发明人： Stefan Jakschik ,  Matthias Goldbach ,  Thomas Mikolajick ,  Thomas Hecht

IPC分类号： H01L21/336

CPC分类号： H01L29/512 ,  H01L21/28282 ,  H01L29/42348 ,  H01L29/78 ,  H01L29/7923

摘要： Charge-trapping regions are arranged beneath lower edges of the gate electrode separate from one another. Source/drain regions are formed in self-aligned manner with respect to the charge-trapping regions by means of a doping process at low energy in order to form shallow junctions laterally extending only a small distance beneath the charge-trapping regions. The self-alignment ensures a large number of program-erase cycles with high effectiveness and good data retention, because the locations of the injections of charge carriers of opposite signs are narrowly and exactly defined.

摘要翻译： 电荷捕获区域布置在栅电极的下边缘下方彼此分离。 源极/漏极区域以相对于电荷俘获区域的自对准方式通过在低能量下的掺杂工艺形成，以形成仅在电荷俘获区域下方仅小的距离的浅结。 自对准确保了大量的编程擦除周期，具有高效率和良好的数据保留，因为注入相反符号的电荷载体的位置被狭义地和精确地定义。

公开(公告)号：US07041568B2

公开(公告)日：2006-05-09

申请号：US10485307

申请日：2002-07-18

申请人： Matthias Goldbach ,  Thomas Hecht ,  Jörn Lützen ,  Bernhard Sell

发明人： Matthias Goldbach ,  Thomas Hecht ,  Jörn Lützen ,  Bernhard Sell

IPC分类号： H01L21/20

CPC分类号： H01L27/10867 ,  H01L21/0274

摘要： A structure on a layer surface of the semiconductor wafer has at least one first area region (8, 9), which is reflective for electromagnetic radiation, and at least one second, essentially nonreflecting area region (10, 11, 12). A light-transmissive insulation layer (13) and a light-sensitive layer are produced on said layer surface. The electromagnetic radiation is directed onto the light-sensitive layer with an angle Θ of incidence and the structure of the layer surface is imaged with a lateral offset into the light-sensitive layer.

摘要翻译： 半导体晶片的层表面上的结构具有至少一个反射用于电磁辐射的第一区域区域（8,9）和至少一个第二基本上不反射区域区域（10,11,12）。 在所述层表面上产生透光绝缘层（13）和感光层。 将电磁辐射以角度引导到感光层上。入射角和层表面的结构以横向偏移成像到感光层中。

公开(公告)号：US06953722B2

公开(公告)日：2005-10-11

申请号：US10425461

申请日：2003-04-29

申请人： Harald Seidl ,  Martin Gutsche ,  Thomas Hecht ,  Stefan Jakschik ,  Stephan Kudelka ,  Uwe Schröder ,  Matthias Schmeide

发明人： Harald Seidl ,  Martin Gutsche ,  Thomas Hecht ,  Stefan Jakschik ,  Stephan Kudelka ,  Uwe Schröder ,  Matthias Schmeide

IPC分类号： H01L21/311 ,  H01L21/8242

CPC分类号： H01L27/10867 ,  H01L21/31133

摘要： In a method for forming patterned ceramic layers, a ceramic material is deposited on a substrate and is subsequently densified by heat treatment, for example. In this case, the initially amorphous material is converted into a crystalline or polycrystalline form. In order that the now crystalline material can be removed again from the substrate, imperfections are produced in the ceramic material, for example by ion implantation. As a result, the etching medium can more easily attack the ceramic material, so that the latter can be removed with a higher etching rate. Through inclined implantation, the method can be performed in a self-aligning manner and the ceramic material can be removed on one side, by way of example, in trenches or deep trench capacitors.

摘要翻译： 在用于形成图案化陶瓷层的方法中，陶瓷材料沉积在基底上，并随后通过热处理致密化。 在这种情况下，最初的无定形材料被转化为结晶或多晶形式。 为了现在的结晶材料可以再次从衬底去除，例如通过离子注入在陶瓷材料中产生缺陷。 结果，蚀刻介质可以更容易地侵蚀陶瓷材料，使得后者可以以更高的蚀刻速率被去除。 通过倾斜注入，该方法可以以自对准的方式进行，并且陶瓷材料可以通过例如在沟槽或深沟槽电容器中被一侧除去。

公开(公告)号：US20050181557A1

公开(公告)日：2005-08-18

申请号：US11040091

申请日：2005-01-24

申请人： Stefan Jakschik ,  Thomas Hecht ,  Uwe Schroder ,  Matthias Goldbach

发明人： Stefan Jakschik ,  Thomas Hecht ,  Uwe Schroder ,  Matthias Goldbach

IPC分类号： H01L21/20 ,  H01L21/311 ,  H01L21/314 ,  H01L21/316 ,  H01L21/334 ,  H01L21/8242

CPC分类号： H01L27/1087 ,  H01L21/31111 ,  H01L21/3141 ,  H01L21/31616 ,  H01L29/66181

摘要： A process for modifying sections of a semiconductor includes covering the sections to remain free of doping with a metal oxide, e.g., aluminum oxide. Then, the semiconductor is doped, for example, from the gas phase, in those sections that are not covered by the aluminum oxide. Finally, the aluminum oxide is selectively removed again, for example using hot phosphoric acid. Sections of the semiconductor surface which are formed from silicon, silicon oxide or silicon nitride remain in place on the wafer.

摘要翻译： 用于修改半导体部分的方法包括覆盖这些部分以保持不掺杂金属氧化物，例如氧化铝。 然后，在未被氧化铝覆盖的那些部分中，例如从气相掺杂半导体。 最后，再次选择性地除去氧化铝，例如使用热磷酸。 由硅，氧化硅或氮化硅形成的半导体表面的部分保留在晶片上。