公开(公告)号：US20060226342A1

公开(公告)日：2006-10-12

申请号：US11401219

申请日：2006-04-11

申请人： Koichi Sato ,  Yusuke Nonaka

发明人： Koichi Sato ,  Yusuke Nonaka

IPC分类号： H01L27/00

CPC分类号： H04N9/045

摘要： A solid state imaging device comprises a color filter, a pixel, and first and a second output lines. The color filter has color filter components of a first and second color. Each pixel is covered by the color filter component and has a photoelectric conversion element. The photoelectric conversion element generates color pixel signals according to amount of light received by the photoelectric conversion element. A first pixel is covered by the first color filter component. A first color pixel signal is generated by the first pixel. The first output line outputs only the first color pixel signal. A second pixel is covered by the second filter component. A second color pixel signal is generated by the second pixel. The second output line outputs only the second color pixel signal. The first and second pixels are arranged in two dimensions.

摘要翻译： 固态成像装置包括滤色器，像素以及第一和第二输出线。 滤色器具有第一和第二颜色的滤色器部件。 每个像素被滤色器部件覆盖并具有光电转换元件。 光电转换元件根据由光电转换元件接收的光量产生彩色像素信号。 第一像素由第一滤色器组件覆盖。 由第一像素产生第一颜色像素信号。 第一输出线仅输出第一颜色像素信号。 第二像素被第二滤光器组件覆盖。 由第二像素产生第二彩色像​​素信号。 第二输出线仅输出第二彩色像​​素信号。 第一和第二像素被布置成二维的。

公开(公告)号：US07115954B2

公开(公告)日：2006-10-03

申请号：US10363065

申请日：2001-06-29

申请人： Akihiro Shimizu ,  Nagatoshi Ooki ,  Yusuke Nonaka ,  Katsuhiko Ichinose

发明人： Akihiro Shimizu ,  Nagatoshi Ooki ,  Yusuke Nonaka ,  Katsuhiko Ichinose

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/7845 ,  H01L21/0217 ,  H01L21/26586 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823842 ,  H01L21/823864 ,  H01L21/84 ,  H01L27/092 ,  H01L27/0922 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7843 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device has an n channel conductivity type field effect transistor having a channel formation region formed in a first region on one main surface of a semiconductor substrate and a p channel conductivity type field effect transistor having a channel formation region formed in a second region on the main surface of the semiconductor substrate, which second region is different from the first region. An internal stress generated in the channel formation region of the n channel conductivity type field effect transistor is different from an internal stress generated in the channel formation region of the p channel conductivity type field effect transistor. The internal stress generated in the channel formation region of the n channel conductivity type field effect transistor is a tensile stress, while the internal stress generated in the channel formation region of the p channel conductivity type field effect transistor is a compressive stress.

摘要翻译： 半导体器件具有n沟道导电型场效应晶体管，其具有形成在半导体衬底的一个主表面上的第一区域中的沟道形成区域和具有形成在第二区域中的沟道形成区域的ap沟道导电型场效应晶体管， 半导体衬底的主表面，该第二区域与第一区域不同。 在n沟道导电型场效应晶体管的沟道形成区域中产生的内应力与在p沟道导电型场效应晶体管的沟道形成区域中产生的内应力不同。 在n沟道导电型场效应晶体管的沟道形成区域中产生的内应力是拉伸应力，而在p沟道导电型场效应晶体管的沟道形成区域中产生的内应力是压应力。

公开(公告)号：US07024522B2

公开(公告)日：2006-04-04

申请号：US10912636

申请日：2004-08-04

申请人： Akihiro Mannen ,  Naoto Matsunami ,  Akira Nishimoto ,  Yusuke Nonaka

发明人： Akihiro Mannen ,  Naoto Matsunami ,  Akira Nishimoto ,  Yusuke Nonaka

IPC分类号： G06F12/14

CPC分类号： G06F3/0659 ,  G06F3/0623 ,  G06F3/0689 ,  G06F12/0866 ,  G11B20/00086 ,  G11B20/00702 ,  G11B20/00768

摘要： To provide a disk array system which particularly enables the use of a WORM function when the disk array system uses RAID. When receiving a write request from a computer (100), it is judged whether or not a writing of write data from the computer is possible, based on a content indicated by write inhibition information. If the writing is possible, the guarantee code of the transferred data is generated, the write inhibition information indicating that a region in which the data is stored is not writable is generated, and the generated write inhibition information is stored in the guarantee code, the guarantee code storing the write inhibition information is assigned to the region in which the data received from the computer (100) is stored, and the data to which the guarantee code storing the write inhibition information is assigned is stored in a cache memory (230) and/or a disk drive (270). If the write data from the computer (100) is not writable, it is informed to the computer (100).

摘要翻译： 提供一种磁盘阵列系统，当磁盘阵列系统使用RAID时，特别能够使用WORM功能。 当从计算机（100）接收到写入请求时，基于由写入禁止信息指示的内容来判断是否可能从计算机写入写入数据。 如果可以进行写入，则生成传送数据的保证码，生成指示存储数据的区域不可写入的写入禁止信息，并且生成的写入禁止信息存储在保证码中， 存储写入禁止信息的保证代码被分配给存储从计算机（100）接收的数据的区域，并且存储写入禁止信息的保证码的数据被存储在高速缓冲存储器（230）中， 和/或磁盘驱动器（270）。 如果来自计算机（100）的写入数据不可写入，则通知计算机（100）。

公开(公告)号：US07022563B2

公开(公告)日：2006-04-04

申请号：US10846872

申请日：2004-05-17

申请人： Fumio Ootsuka ,  Yusuke Nonaka ,  Satoshi Shimamoto ,  Sohei Omori ,  Hideto Kazama

发明人： Fumio Ootsuka ,  Yusuke Nonaka ,  Satoshi Shimamoto ,  Sohei Omori ,  Hideto Kazama

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/00 ,  H01L21/48

CPC分类号： H01L27/11 ,  H01L27/1104

摘要： In order to improve the performance of a semiconductor integrated circuit device wherein a capacitor provided between storage nodes of an SRAM and a device having an analog capacitor are formed on a single substrate, a plug is formed in a silicon oxide film on a pair of n channel type MISFETs in a memory cell forming area, and a local wiring LIc for connecting respective gate electrodes and drains of the pair of n channel type MISFETs is formed over the silicon oxide film and the plug. Thereafter, a capacitive insulating film and an upper electrode are further formed over the local wiring LIc. According to the same process step as the local wiring, capacitive insulating film and upper electrode formed in the memory cell forming area, a local wiring LIc, a capacitive insulating film and an upper electrode are formed over a silicon oxide film in an analog capacitor forming area and a plug in the silicon oxide film.

公开(公告)号：US20060031651A1

公开(公告)日：2006-02-09

申请号：US10960053

申请日：2004-10-08

申请人： Yusuke Nonaka ,  Naoto Matsunami ,  Akira Nishimoto ,  Yutaka Nakagawa

发明人： Yusuke Nonaka ,  Naoto Matsunami ,  Akira Nishimoto ,  Yutaka Nakagawa

IPC分类号： G06F12/14 ,  G06F12/16

CPC分类号： G06F3/0647 ,  G06F3/0607 ,  G06F3/0608 ,  G06F3/0623 ,  G06F3/0637 ,  G06F3/067

摘要： The storage system is coupled to a computer, and includes a controller and a disk drive including a plurality of logical volumes, at least in one of which updating prohibition information indicating inclusion of an area assigned an updating prohibition attribute is recorded. The controller includes a configuration management module that sets the logical volume assigned the updating prohibition attribute as a logical volume of a migration source, another logical volume as a logical volume of a migration destination, and the updating prohibition information concerning the logical volume of the migration source in the logical volume of the migration destination, and a migration module that copies data of the logical volume of the migration source to the logical volume of the migration destination after the setting of the updating prohibition information concerning the logical volume of the migration source in the logical volume of the migration destination.

摘要翻译： 存储系统耦合到计算机，并且包括控制器和包括多个逻辑卷的磁盘驱动器，其中记录了表示包括分配有更新禁止属性的区域的更新禁止信息的至少一个。 控制器包括配置管理模块，其将分配有更新禁止属性的逻辑卷设置为迁移源的逻辑卷，将另一逻辑卷设置为迁移目的地的逻辑卷，以及关于迁移的逻辑卷的更新禁止信息 在迁移目标的逻辑卷中的源代码以及迁移模块，该迁移模块在设置关于迁移源的逻辑卷的更新禁止信息之后，将迁移源的逻辑卷的数据复制到迁移目的地的逻辑卷 迁移目的地的逻辑卷。

公开(公告)号：US20050172043A1

公开(公告)日：2005-08-04

申请号：US10805260

申请日：2004-03-22

申请人： Yusuke Nonaka ,  Naoto Matsunami ,  Ikuya Yagisawa ,  Akira Nishimoto

发明人： Yusuke Nonaka ,  Naoto Matsunami ,  Ikuya Yagisawa ,  Akira Nishimoto

IPC分类号： G06F3/06 ,  G06F9/445 ,  G06F12/00 ,  G06F12/02 ,  G06F12/08 ,  G06F13/00 ,  G06F13/38

CPC分类号： G06F3/0661 ,  G06F3/0614 ,  G06F3/0626 ,  G06F3/0658 ,  G06F3/0659 ,  G06F3/067 ,  G06F12/0866

摘要： A hybrid-type storage system having both SAN and NAS interfaces can be implemented by simple hardware capable of carrying out a SAN function independently of a NAS function and a NAS load. To be more specific, a controller of the storage system comprises a NAS controller for accepting an I/O command issued for a file unit and a SAN controller for accepting an I/O command issued for a block unit. The NAS controller converts an I/O command issued for a file unit into an I/O command issued for a block unit, and transfers the I/O command issued for a block unit to the SAN controller. The SAN controller makes an access to data stored in a disk apparatus in accordance with an I/O command received from the SAN or from the NAS controller as a command issued for a block unit. The NAS and SAN controllers are capable of operating independently of each other.

公开(公告)号：US06433398B1

公开(公告)日：2002-08-13

申请号：US09661372

申请日：2000-09-13

申请人： Kazuhisa Suzuki ,  Toshiro Takahashi ,  Yasunobu Yanagisawa ,  Yusuke Nonaka

发明人： Kazuhisa Suzuki ,  Toshiro Takahashi ,  Yasunobu Yanagisawa ,  Yusuke Nonaka

IPC分类号： H01L2972

CPC分类号： H01L27/0629 ,  Y10S438/981

摘要： A capacitive element C1 having a small leakage current is formed by utilizing a gate oxide film 9B thicker than that of a MISFET of a logic section incorporated in a CMOS gate array, without increasing the number of steps of manufacturing the CMOS gate array. The capacitive element C1has a gate electrode 10E. A part of the gate electrode 10E is made of a polycrystalline silicon film. The polycrystalline silicon film is doped with n-type impurities, so that the capacitive element may reliably operate even at a low power-supply voltage.

摘要翻译： 通过利用比构成CMOS栅极阵列的逻辑部分的MISFET更厚的栅极氧化膜9B形成具有小的漏电流的电容元件C1，而不增加制造CMOS门阵列的步骤数。 电容元件C1是栅电极10E。 栅电极10E的一部分由多晶硅膜制成。 多晶硅膜掺杂有n型杂质，使得即使在低电源电压下，电容元件也可以可靠地工作。

公开(公告)号：US5512502A

公开(公告)日：1996-04-30

申请号：US396786

申请日：1995-03-01

申请人： Fumio Ootsuka ,  Yusuke Nonaka ,  Atsumi Aoki

发明人： Fumio Ootsuka ,  Yusuke Nonaka ,  Atsumi Aoki

IPC分类号： H01L29/43 ,  H01L21/28 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/78 ,  H01L21/265

CPC分类号： H01L21/823835 ,  H01L21/28052 ,  Y10S148/147

摘要： In forming a MISFET having a salicide structure, a polysilicon film forming a gate electrode in the MISFET is constructed of a first silicon film having a high n-type impurity concentration on the side of a gate insulating film and a second silicon film having a low n-type impurity concentration on the surface side of the gate electrode. Further, a Ti film is deposited on the second silicon film. The Ti film and the second silicon film are annealed twice at proper different temperatures to thereby promote a silicide reaction and form a low-resistance silicide layer in the second silicon film.

摘要翻译： 在形成具有硅化物结构的MISFET时，在MISFET中形成栅电极的多晶硅膜由在栅极绝缘膜一侧具有高n型杂质浓度的第一硅膜和具有低的栅极绝缘膜的第二硅膜构成 n型杂质浓度在栅电极的表面侧。 此外，在第二硅膜上沉积Ti膜。 Ti膜和第二硅膜在合适的不同温度下退火两次，从而促进硅化物反应，并在第二硅膜中形成低电阻硅化物层。

公开(公告)号：US09093349B2

公开(公告)日：2015-07-28

申请号：US13547452

申请日：2012-07-12

申请人： Tomoyasu Furukawa ,  Satoshi Sakai ,  Yusuke Nonaka ,  Shinya Sugino

发明人： Tomoyasu Furukawa ,  Satoshi Sakai ,  Yusuke Nonaka ,  Shinya Sugino

IPC分类号： H01L29/49 ,  H01L27/146

CPC分类号： H01L27/14689 ,  H01L27/14607 ,  H01L27/1461 ,  H01L27/1463 ,  H01L27/14645

摘要： In a region of a weak internal electric field, photocharges generated in a region deeper than the photodiode are diffused laterally to lower the sensitivity by photoelectrons flowing into adjacent pixels, etc (crosstalk). An anti-crosstalk layer is disposed in the photodiode forming portion, and between a pixel region and a peripheral circuit region. Crosstalk between a pixel and a pixel or between a pixel region and a peripheral circuit region is decreased to improve the photosensitivity.

摘要翻译： 在弱内部电场的区域中，在比光电二极管更深的区域产生的光电荷被横向扩散，从而通过流入相邻像素的光电子等（串扰）降低灵敏度。 在光电二极管形成部分中，在像素区域和外围电路区域之间设置抗串扰层。 像素与像素之间或像素区域与外围电路区域之间的串扰减小，以提高光敏性。

公开(公告)号：US20140351521A1

公开(公告)日：2014-11-27

申请号：US14342848

申请日：2013-05-27

申请人： Shintaro Kudo ,  Akira Yamamoto ,  Yusuke Nonaka ,  Sadahiro Sugimoto

发明人： Shintaro Kudo ,  Akira Yamamoto ,  Yusuke Nonaka ,  Sadahiro Sugimoto

IPC分类号： G06F12/08

CPC分类号： G06F12/0868 ,  G06F12/0817

摘要： A cache package (for example, a flash memory package configured by flash memories) can execute a cache control process instead of a processor in a storage system by a request of the cache control process from the storage system. Consequently, time for the process that the processor of the storage system executes can be reduced and increase in a throughput can be achieved. For example, particularly the present invention is effective in real time data processing in OLTP (OnLine Transaction Processing) (for example, database processes in finance, medical service, Internet service, and government and public service). In addition, under the concept of recent EPR (Enterprise Resource Planning) a flexible storage system that can respond rapid fluctuation in an amount of data and an access load can be established and leveraged by increasing several boards of required cache packages.

摘要翻译： 高速缓存包（例如，由闪速存储器配置的闪存包）可以通过来自存储系统的高速缓存控制处理的请求来执行存储系统中的高速缓存控制处理而不是处理器。 因此，可以减少存储系统的处理器执行的处理的时间，并且可以实现吞吐量的增加。 例如，特别地本发明在OLTP（在线事务处理）（例如，金融，医疗服务，互联网服务，政府和公共服务中的数据库处理）的实时数据处理中是有效的。 另外，根据最新的EPR（企业资源规划）的概念，可以通过增加几个所需缓存包的板块来建立和利用灵活的存储系统，可以响应数据量和访问负载的快速波动。