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    ADAPTIVE ERROR AVOIDANCE IN THE MEMORY DEVICES
    61.
    发明公开
    ADAPTIVE ERROR AVOIDANCE IN THE MEMORY DEVICES 审中-公开

    公开(公告)号：US20240363190A1

    公开(公告)日：2024-10-31

    申请号：US18771393

    申请日：2024-07-12

    Applicant: Micron Technology, Inc.

    Inventor： Li-Te Chang ,  Yu-Chung Lien ,  Murong Lang ,  Zhenming Zhou ,  Michael G. Miller

    IPC: G11C29/52 ,  G11C16/08 ,  G11C16/10 ,  G11C16/34

    CPC classification number: G11C29/52 ,  G11C16/08 ,  G11C16/102 ,  G11C16/3404

    Abstract: An example method of performing memory access operations comprises: receiving a request to perform a memory access operation; identifying a block family associated with a set of memory cells; determining, for each logical programming level of a plurality of logical programming levels, a corresponding default block family error avoidance (BFEA) threshold voltage offset value associated with the block family; determining a value of a data state metric associated with the set of memory cells; determining, for each logical programming level of a plurality of logical programming levels, a corresponding sub-BFEA threshold voltage offset value; and performing the memory access operation by applying, for each logical programming level of the plurality of logical programming levels, a combination of the default BFEA threshold voltage value, the sub-BFEA threshold voltage value, and a corresponding base voltage level.

    ADAPTIVE ENHANCED CORRECTIVE READ BASED ON WRITE AND READ TEMPERATURE
    65.
    发明公开
    ADAPTIVE ENHANCED CORRECTIVE READ BASED ON WRITE AND READ TEMPERATURE 审中-公开

    公开(公告)号：US20240241664A1

    公开(公告)日：2024-07-18

    申请号：US18434616

    申请日：2024-02-06

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Zhenming Zhou ,  Murong Lang ,  Ching-Huang Lu ,  Nagendra Prasad Ganesh Rao

    IPC: G06F3/06

    CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0652 ,  G06F3/0679

    Abstract: A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including: receiving a request to perform a read operation on a segment of the memory device; determining whether a temperature offset value of the segment satisfies a threshold criterion associated with a program erase cycle count of the segment; and responsive to determining that the temperature offset value satisfies the threshold criterion, performing a corrective read operation on the segment of the memory device, wherein a sense time parameter of the corrective read operation is modified according to the temperature offset value and the program erase cycle count.

    Adaptive time sense parameters and overdrive voltage parameters for respective groups of wordlines in a memory sub-system
    66.
    发明授权
    Adaptive time sense parameters and overdrive voltage parameters for respective groups of wordlines in a memory sub-system 有权

    公开(公告)号：US12014050B2

    公开(公告)日：2024-06-18

    申请号：US17889836

    申请日：2022-08-17

    Applicant: Micron Technology, Inc.

    Inventor： Zhenming Zhou ,  Ching-Huang Lu ,  Murong Lang

    IPC: G06F3/06

    CPC classification number: G06F3/0611 ,  G06F3/0629 ,  G06F3/0679

    Abstract: A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including: receiving a request to perform a memory access operation on a set of cells associated with a wordline of the memory device; determining that the wordline is disposed on a first deck of the memory deck; responsive to determining that the wordline is disposed on the first deck, determining that the wordline is associated with a first group of wordlines associated with the first deck; and responsive to determining that the wordline is associated with the first group of wordlines associated with the first deck, performing the memory access operation on the set of cells connected to the wordline using a first time sense parameter, wherein the first time sense parameter corresponds to the first group of wordlines associated with the first deck.

    Refresh of neighboring memory cells based on read status
    67.
    发明授权
    Refresh of neighboring memory cells based on read status 有权

    公开(公告)号：US12009027B2

    公开(公告)日：2024-06-11

    申请号：US17561340

    申请日：2021-12-23

    Applicant: Micron Technology, Inc.

    Inventor： Li-Te Chang ,  Murong Lang ,  Zhenming Zhou

    IPC: G11C13/00 ,  G11C11/56

    CPC classification number: G11C13/0033 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0069 ,  G11C11/5678

    Abstract: Systems, methods, and apparatus related to memory devices. In one approach, a cross-point memory array includes memory cells. A media controller reads one or more first memory cells and determines a read status. The read status indicates an error when reading the first memory cells. In response to this error, the controller refreshes the first memory cells. The controller uses the read status to determine zero-to-one failures associated with the first memory cells. If a number of these failures exceeds a threshold, then a refresh is applied to neighboring memory cells of the first memory cells. The physical addresses for the neighboring memory cells are determined by the controller from the physical addresses for the first memory cells.

    Adaptive enhanced corrective read based on write and read temperature
    69.
    发明授权
    Adaptive enhanced corrective read based on write and read temperature 有权

    公开(公告)号：US11947831B2

    公开(公告)日：2024-04-02

    申请号：US17830625

    申请日：2022-06-02

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Zhenming Zhou ,  Murong Lang ,  Ching-Huang Lu ,  Nagendra Prasad Ganesh Rao

    IPC: G06F3/06

    CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0652 ,  G06F3/0679

    Abstract: A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including: receiving a request to perform a read operation on a segment of the memory device; determining a program erase cycle count associated with the segment of the memory device; determining a temperature offset value for the segment of the memory device based on a write temperature and a read temperature, determining whether the temperature offset value satisfies a threshold criterion associated with the program erase cycle count of the segment; and responsive to determining that the temperature offset value satisfies the threshold criterion, performing a corrective read operation on the segment of the memory device, wherein a sense time parameter of the corrective read operation is modified according to the temperature offset value and the program erase cycle count.

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