公开(公告)号：US12230583B2

公开(公告)日：2025-02-18

申请号：US18381061

申请日：2023-10-17

Applicant: Micron Technology, Inc.

Inventor： Owen Fay ,  Chan H. Yoo

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/8234 ,  H01L23/00 ,  H01L23/14 ,  H01L25/18

Abstract: Described are semiconductor interposer, and microelectronic device assemblies incorporating such semiconductor interposers. The described interposers include multiple redistribution structures on each side of the core; each of which may include multiple individual redistribution layers. The interposers may optionally include circuit elements, such as passive and/or active circuit. The circuit elements may be formed at least partially within the semiconductor core.

公开(公告)号：US12218101B2

公开(公告)日：2025-02-04

申请号：US17697141

申请日：2022-03-17

Applicant: Micron Technology, Inc.

Inventor： Owen R. Fay ,  Chan H. Yoo ,  Mark E. Tuttle

IPC: H01L25/065 ,  H01L21/56 ,  H01L23/00 ,  H01L23/31 ,  H01L23/532

Abstract: Semiconductor device packages and associated assemblies are disclosed herein. In some embodiments, the semiconductor device package includes a substrate having a first side and a second side opposite the first side, a first metallization layer positioned at the first side of the substrate, and a second metallization layer in the substrate and electrically coupled to the first metallization layer. The semiconductor device package further includes a metal bump electrically coupled to the first metallization layer and a divot formed at the second side of the substrate and aligned with the metal bump. The divot exposes a portion of the second metallization layer and enables the portion to electrically couple to another semiconductor device package.

公开(公告)号：US12170275B2

公开(公告)日：2024-12-17

申请号：US17881519

申请日：2022-08-04

Applicant: Micron Technology, Inc.

Inventor： Chan H. Yoo ,  Owen R. Fay

IPC: H01L25/18 ,  H01L23/00 ,  H01L25/00 ,  H01L23/48 ,  H01L23/522

Abstract: A semiconductor device assembly that includes first and second semiconductor devices connected directly to a first side of a substrate and a plurality of interconnects connected to a second side of the substrate. The substrate is configured to enable the first and second semiconductor devices to communicate with each other through the substrate. The substrate may be a silicon substrate that includes complementary metal-oxide-semiconductor (CMOS) circuits. The first semiconductor device may be a processing unit and the second semiconductor device may be a memory device, which may be a high bandwidth memory device. A method of making a semiconductor device assembly includes applying CMOS processing to a silicon substrate, forming back end of line (BEOL) layers on a first side of the substrate, attaching a memory device and a processing unit directly to the BEOL layers, and forming a redistribution layer on the second side of the substrate.

公开(公告)号：US11990350B2

公开(公告)日：2024-05-21

申请号：US18106225

申请日：2023-02-06

Applicant: Micron Technology, Inc.

Inventor： Owen R. Fay ,  Chan H. Yoo

IPC: H01L21/00 ,  H01L21/56 ,  H01L21/78 ,  H01L23/29 ,  H01L23/31

CPC classification number: H01L21/56 ,  H01L21/78 ,  H01L23/291 ,  H01L23/293 ,  H01L23/3114

Abstract: Methods for manufacturing semiconductor devices having a flexible reinforcement structure, and associated systems and devices, are disclosed herein. In one embodiment, a method of manufacturing a semiconductor device includes electrically coupling at least one semiconductor die to a redistribution structure on a first carrier. The semiconductor die can include a first surface facing the redistribution structure and a second surface spaced apart from the redistribution structure. The method also includes reducing a thickness of the semiconductor die to no more than 10 μm. The method further includes coupling a flexible reinforcement structure to the second surface of the at least one semiconductor die.

公开(公告)号：US11887920B2

公开(公告)日：2024-01-30

申请号：US16952703

申请日：2020-11-19

Applicant: Micron Technology, Inc.

Inventor： Hyunsuk Chun ,  Chan H. Yoo ,  Tracy N. Tennant

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L21/4857 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/562

Abstract: Embodiments of a redistribution layer structure comprise a low-k dielectric material and incorporating a reinforcement structure proximate and inward of a peripheral edge thereof, the reinforcement structure comprising conductive material electrically isolated from conductive paths through the RDL structure. Semiconductor packages including an embodiment of the RDL structure and methods of fabricating such RDL structures are also disclosed.

公开(公告)号：US11784166B2

公开(公告)日：2023-10-10

申请号：US17585392

申请日：2022-01-26

Applicant: Micron Technology, Inc.

Inventor： Chan H. Yoo ,  Mark E. Tuttle

IPC: H01L25/065 ,  H01L25/00 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L21/561 ,  H01L21/6835 ,  H01L25/50 ,  H01L23/3128 ,  H01L24/13 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L24/81 ,  H01L24/92 ,  H01L24/97 ,  H01L2221/68345 ,  H01L2221/68354 ,  H01L2224/0401 ,  H01L2224/133 ,  H01L2224/1329 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81005 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/92125 ,  H01L2224/97 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06548 ,  H01L2225/06558 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/18161 ,  H01L2924/3511 ,  H01L2224/97 ,  H01L2224/81 ,  H01L2224/13147 ,  H01L2924/00014 ,  H01L2224/13155 ,  H01L2924/00014 ,  H01L2224/13111 ,  H01L2924/01047 ,  H01L2924/00014 ,  H01L2224/97 ,  H01L2224/83

Abstract: Semiconductor devices including a dual-sided redistribution structure and having low-warpage across all temperatures and associated systems and methods are disclosed herein. In one embodiment, a semiconductor device includes a first semiconductor die electrically coupled to a first side of a redistribution structure and a second semiconductor die electrically coupled to a second side of the redistribution structure opposite the first side. The semiconductor device also includes a first molded material on the first side, a second molded material on the second side, and conductive columns electrically coupled to the first side and extending through the first molded material. The first and second molded materials can have the same volume and/or coefficients of thermal expansion to inhibit warpage of the semiconductor device.

公开(公告)号：US20230307309A1

公开(公告)日：2023-09-28

申请号：US18200173

申请日：2023-05-22

Applicant: Micron Technology, Inc.

Inventor： Chan H. Yoo ,  Owen R. Fay

IPC: H01L23/36 ,  H05K7/20 ,  H01L23/42 ,  H01L23/498 ,  H01L25/10 ,  H01L25/00 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L23/36 ,  H05K7/2039 ,  H01L23/42 ,  H01L23/49822 ,  H01L25/105 ,  H01L25/50 ,  H01L24/73 ,  H01L25/0657 ,  H05K2201/10378 ,  H01L2225/1094 ,  H01L2225/107 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2224/73204

Abstract: Semiconductor assemblies including thermal management configurations for reducing heat transfer between overlapping devices and associated systems and methods are disclosed herein. A semiconductor assembly may comprise a first device and a second device with a thermal management layer disposed between the first and second devices. The thermal management layer may be configured to reduce heat transfer between the first and second devices.

公开(公告)号：US20230025886A1

公开(公告)日：2023-01-26

申请号：US17958986

申请日：2022-10-03

Applicant: Micron Technology, Inc.

Inventor： Owen R. Fay ,  Chan H. Yoo

IPC: H01L23/522 ,  H01L25/065 ,  H01L23/31 ,  H01L23/528 ,  H01M50/414 ,  H05K9/00

Abstract: Semiconductor device package assemblies and associated methods are disclosed herein. The semiconductor device package assembly includes (1) a base component having a front side and a back side, the base component having a first metallization structure at the front side; (2) a semiconductor device package having a first side, a second side with a recess, and a second metallization structure at the first side and a contacting region exposed in the recess at the second side; (3) an interconnect structure at least partially positioned in the recess at the second side of the semiconductor device package; and (4) a thermoset material or structure between the front side of the base component and the second side of the semiconductor device package. The interconnect structure is in the thermoset material and includes discrete conductive particles electrically coupled to one another.

公开(公告)号：US11462472B2

公开(公告)日：2022-10-04

申请号：US16985047

申请日：2020-08-04

Applicant: Micron Technology, Inc.

Inventor： Owen R. Fay ,  Chan H. Yoo

IPC: H01L25/065 ,  H01L23/31 ,  H01L23/528 ,  H01M50/414 ,  H05K9/00 ,  H01L23/522

Abstract: Semiconductor device package assemblies and associated methods are disclosed herein. The semiconductor device package assembly includes (1) a base component having a front side and a back side, the base component having a first metallization structure at the front side; (2) a semiconductor device package having a first side, a second side with a recess, and a second metallization structure at the first side and a contacting region exposed in the recess at the second side; (3) an interconnect structure at least partially positioned in the recess at the second side of the semiconductor device package; and (4) a thermoset material or structure between the front side of the base component and the second side of the semiconductor device package. The interconnect structure is in the thermoset material and includes discrete conductive particles electrically coupled to one another.

公开(公告)号：US20220254723A1

公开(公告)日：2022-08-11

申请号：US17682734

申请日：2022-02-28

Applicant: Micron Technology, Inc.

Inventor： Owen Fay ,  Chan H. Yoo

IPC: H01L23/538 ,  H01L25/18 ,  H01L21/48 ,  H01L21/8234 ,  H01L23/00 ,  H01L23/14

Abstract: Described are semiconductor interposer, and microelectronic device assemblies incorporating such semiconductor interposers. The described interposers include multiple redistribution structures on each side of the core; each of which may include multiple individual redistribution layers. The interposers may optionally include circuit elements, such as passive and/or active circuit. The circuit elements may be formed at least partially within the semiconductor core.