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    Transition structures for three-dimensional memory arrays
    65.
    发明授权
    Transition structures for three-dimensional memory arrays 有权

    公开(公告)号：US11756596B1

    公开(公告)日：2023-09-12

    申请号：US17752332

    申请日：2022-05-24

    Applicant: Micron Technology, Inc.

    Inventor： Shuangqiang Luo ,  Indra V. Chary ,  Lifang Xu

    IPC: G11C7/18 ,  G11C7/10 ,  H01L25/065 ,  H01L23/48 ,  H10B99/00

    CPC classification number: G11C7/18 ,  G11C7/1027 ,  H01L23/481 ,  H01L25/0652 ,  H10B99/00

    Abstract: Methods, systems, and devices for transition structures for three-dimensional memory arrays are described. A memory device may include a staircase region which includes a set of vias. The set of vias may include a first subset of vias which couple respective word line plates of the memory region with associated word line decoders, and a second subset of vias which are electrically isolated from the word line plates. The second subset of vias may be arranged in one or more rows positioned between the first subset of vias and the memory region. In some cases, the second subset of vias may be positioned above respective conductive contacts. Additionally or alternatively, the second subset of vias may be positioned above a common conductor shared with pillars of the memory region.

    Integrated assemblies and methods of forming integrated assemblies
    66.
    发明授权
    Integrated assemblies and methods of forming integrated assemblies 有权

    公开(公告)号：US11716841B2

    公开(公告)日：2023-08-01

    申请号：US17142804

    申请日：2021-01-06

    Applicant: Micron Technology, Inc.

    Inventor： Shuangqiang Luo ,  Lifang Xu ,  Indra V. Chary

    IPC: H01L27/11582 ,  H10B41/27 ,  H10B41/10 ,  H10B41/40 ,  H10B43/10 ,  H10B43/27 ,  H10B43/40

    CPC classification number: H10B41/27 ,  H10B41/10 ,  H10B41/40 ,  H10B43/10 ,  H10B43/27 ,  H10B43/40

    Abstract: Some embodiments include an integrated assembly having a first memory region, a second memory region, and an intermediate region between the memory regions. A stack extends across the memory regions and the intermediate region. The stack includes alternating conductive levels and insulative levels. Channel-material-pillars are arranged within the memory regions. Memory-block-regions extend longitudinally across the memory regions and the intermediate region. Staircase regions are within the intermediate region. Each of the staircase regions laterally overlaps two of the memory-block-regions. First panel regions extend longitudinally across at least portions of the staircase regions. Second panel regions extend longitudinally and provide lateral separation between adjacent memory-block-regions. The second panel regions are of laterally different dimensions than the first panel regions and/or are compositionally different than the first panel regions. Some embodiments include methods of forming integrated assemblies.

    Microelectronic devices including staircase structures, and related memory devices, electronic systems, and methods
    69.
    发明授权
    Microelectronic devices including staircase structures, and related memory devices, electronic systems, and methods 有权

    公开(公告)号：US11476266B2

    公开(公告)日：2022-10-18

    申请号：US16799543

    申请日：2020-02-24

    Applicant: Micron Technology, Inc.

    Inventor： Shuangqiang Luo ,  Nancy M. Lomeli ,  Lifang Xu

    IPC: H01L27/11582 ,  H01L27/11556 ,  G11C5/06 ,  G11C5/02

    Abstract: A microelectronic device comprises a stack structure comprising vertically alternating conductive structures and insulating structures arranged in tiers, the tiers individually comprising one of the conductive structures and one of the insulating structures, a staircase structure within the stack structure and having steps comprising edges of at least some of the tiers, conductive contact structures on the steps of the staircase structure, support pillar structures laterally offset in at least a first direction from the conductive contact structures and extending through the stack structure, and bridge structures comprising an electrically insulating material extending vertically through at least a portion of the stack structure and between at least some adjacent support pillar structures of the support pillar structures. Related memory devices, electronic systems, and methods are also described.

    Integrated Assemblies and Methods of Forming Integrated Assemblies
    70.
    发明申请
    Integrated Assemblies and Methods of Forming Integrated Assemblies 有权

    公开(公告)号：US20220320137A1

    公开(公告)日：2022-10-06

    申请号：US17841624

    申请日：2022-06-15

    Applicant: Micron Technology, Inc.

    Inventor： Shuangqiang Luo ,  Indra V. Chary

    IPC: H01L27/11582 ,  H01L27/1157 ,  H01L27/11556 ,  H01L27/11524

    Abstract: Some embodiments include an integrated assembly having a first deck, a second deck over the first deck, and a third deck over the second deck. The first deck has first conductive levels disposed one atop another. The second deck has second conductive levels disposed one atop another. The third deck has third conductive levels disposed one atop another. A first staircase region extends to the first and second conductive levels, and passes through the third conductive levels. A second staircase region extends to the third conductive levels and not to the first and second conductive levels. Some embodiments include methods of forming integrated assemblies.

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