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    SEMICONDUCTOR RESONATORS WITH REDUCED SUBSTRATE LOSSES
    62.
    发明申请
    SEMICONDUCTOR RESONATORS WITH REDUCED SUBSTRATE LOSSES 有权
    具有减少衬底损耗的半导体谐振器

    公开(公告)号：US20160126925A1

    公开(公告)日：2016-05-05

    申请号：US14931621

    申请日：2015-11-03

    Applicant: RF Micro Devices, Inc.

    Inventor： George Maxim ,  Dirk Robert Walter Leipold ,  Baker Scott

    IPC: H03H9/24 ,  H01L49/02 ,  H01L21/027

    CPC classification number: H01F27/2804 ,  H01F2027/2809 ,  H01L21/0276 ,  H01L28/10 ,  H01P7/06 ,  H01P7/065 ,  H01P7/08 ,  H03H7/38 ,  H03H7/463 ,  H03H9/24 ,  H04B1/40 ,  H04J1/08

    Abstract: A resonator includes a laminate, an inductive element on the laminate, and a semiconductor die attached to the inductive element and the laminate. The semiconductor die includes a substrate and a device layout area. The device layout area is separated into a number of device layout sub-areas, each of which has an area between about 1.0 μm2 and 100.0 μm2. By limiting the area of each one of the device layout sub-areas with the charge carrier trap trenches, the total area of the semiconductor die prone to inducement of eddy currents (i.e., the layer of accumulated charge at the interface of the substrate and the device layout area) is reduced, which in turn reduces interference with the magnetic field of the inductive element and thus improves the performance of the resonator.

    Abstract translation: 谐振器包括层叠体，层压体上的感应元件以及附接到电感元件和层压体的半导体芯片。 半导体管芯包括衬底和器件布局区域。 设备布局区域被分成多个设备布局子区域，每个区域具有在约1.0μm2和100.0μm2之间的面积。 通过利用电荷载流子阱沟槽限制每个器件布局子区域的面积，半导体管芯的总面积容易引起涡流（即，衬底和界面的界面处的累积电荷层 器件布局面积）减小，这又减小了与感应元件的磁场的干扰，从而提高了谐振器的性能。

    MULTIPLEXERS USING WEAKLY-COUPLED NETWORKS IN RF FRONT END CIRCUITRY
    63.
    发明申请
    MULTIPLEXERS USING WEAKLY-COUPLED NETWORKS IN RF FRONT END CIRCUITRY 有权
    在RF前端电路中使用弱耦合网络的多路复用器

    公开(公告)号：US20160126922A1

    公开(公告)日：2016-05-05

    申请号：US14927546

    申请日：2015-10-30

    Applicant: RF Micro Devices, Inc.

    Inventor： Dirk Robert Walter Leipold ,  George Maxim ,  Baker Scott

    IPC: H03H7/46 ,  H03H7/38

    CPC classification number: H01F27/2804 ,  H01F2027/2809 ,  H03H7/38 ,  H03H7/463 ,  H04B1/40 ,  H04J1/08

    Abstract: Multiplexing circuitry is disclosed that includes filtering circuitry, which provides a first transfer function between a common port and a first port and a second transfer function between the common port and a second port. The first transfer function and second transfer function provide a first passband and a second passband, respectively. The first transfer function also has a stopband provided within the second passband of the second transfer function due to the filtering circuitry including a first parallel resonant circuit provided in series in a first filter path being weakly coupled to a second parallel resonant provided in shunt with respect to a second filter path. The weak coupling between the first parallel resonant circuit and the second parallel resonant circuit thus naturally provides a stopband in the first transfer function within the second passband of the second transfer function.

    Abstract translation: 公开了包括滤波电路的多路复用电路，该滤波电路在公共端口和第一端口之间提供第一传输功能，以及在公共端口和第二端口之间提供第二传输功能。 第一传递函数和第二传递函数分别提供第一通带和第二通带。 第一传递函数还具有提供在第二传递函数的第二通带内的阻带，因为滤波电路包括串联设置在第一滤波器路径中的第一并联谐振电路，该第一并联谐振电路与第二并联谐振弱耦合， 到第二过滤路径。 因此，第一并联谐振电路和第二并联谐振电路之间的弱耦合自然地在第二传递函数的第二通带内的第一传递函数中提供阻带。

    APPARATUS WITH 3D INDUCTORS
    64.
    发明申请
    APPARATUS WITH 3D INDUCTORS 审中-公开
    装置与3D电感器

    公开(公告)号：US20160126007A1

    公开(公告)日：2016-05-05

    申请号：US14929608

    申请日：2015-11-02

    Applicant: RF Micro Devices, Inc.

    Inventor： Dirk Robert Walter Leipold ,  George Maxim ,  Marcus Granger-Jones ,  Baker Scott

    IPC: H01F27/28 ,  H01F27/29

    CPC classification number: H01F27/2804 ,  H01F2027/2809 ,  H01L21/0276 ,  H01L28/10 ,  H01P7/06 ,  H01P7/065 ,  H01P7/08 ,  H03H7/38 ,  H03H7/463 ,  H03H9/24 ,  H04B1/40 ,  H04J1/08

    Abstract: Embodiments of an apparatus are disclosed that includes a first three dimensional (3D) inductor and a second 3D inductor. The first three dimensional (3D) inductor has a first conductive path shaped as a first two dimensional (2D) lobe laid over a first 3D volume. In addition, the second 3D inductor has a second conductive path, wherein the second 3D inductor is inserted into the first 3D inductor so that the second conductive path at least partially extends through the first 3D volume. Since second 3D inductor is inserted into the first 3D inductor, the 3D inductors may be coupled to one another. Depending on orientation and distances of structures provided by the 3D inductors, the 3D inductors may be weakly or moderately coupled.

    Abstract translation: 公开了一种包括第一三维（3D）电感器和第二3D电感器的装置的实施例。 第一三维（3D）电感器具有第一导电路径，其形状设置在第一3D体积上的第一二维（2D）波瓣。 另外，第二3D电感器具有第二导电路径，其中第二3D电感器被插入到第一3D电感器中，使得第二导电路径至少部分地延伸穿过第一3D体积。 由于第二3D电感器被插入到第一3D电感器中，所以3D电感器可以彼此耦合。 根据由3D电感器提供的结构的取向和距离，3D电感可能会弱或适度耦合。

    ADVANCED 3D INDUCTOR STRUCTURES WITH CONFINED MAGNETIC FIELD
    70.
    发明申请
    ADVANCED 3D INDUCTOR STRUCTURES WITH CONFINED MAGNETIC FIELD 有权
    具有限制磁场的先进3D电感结构

    公开(公告)号：US20150035637A1

    公开(公告)日：2015-02-05

    申请号：US14450156

    申请日：2014-08-01

    Applicant: RF Micro Devices, Inc.

    Inventor： George Maxim ,  Dirk Robert Walter Leipold ,  Baker Scott

    IPC: H01F27/29 ,  H01F17/02

    CPC classification number: H01F17/0013 ,  H03F1/565 ,  H03F3/193 ,  H03F3/245 ,  H03F3/68 ,  H03F3/72 ,  H03F2200/111 ,  H03F2200/267 ,  H03F2200/391 ,  H03F2200/451 ,  H03F2203/7209 ,  H03H7/09 ,  H03H7/1775 ,  H03H2210/012 ,  H03H2210/025 ,  H03H2210/04 ,  H04B1/525

    Abstract: Embodiments of an apparatus that includes a substrate and an inductor residing in the substrate are disclosed. In one embodiment, the inductor is formed as a conductive path that extends from a first terminal to a second terminal. The conductive path has a shape corresponding to a two-dimensional (2D) lobe laid over a three-dimensional (3D) volume. Since the shape of the conductive path corresponds to the 2D lobe laid over a 3D volume, the magnetic field generated by the inductor has magnetic field lines that are predominately destructive outside the inductor and magnetic field lines that are predominately constructive inside the inductor. In this manner, the inductor can maintain a high quality (Q) factor while being placed close to other components.

    Abstract translation: 公开了包括衬底和驻留在衬底中的电感器的装置的实施例。 在一个实施例中，电感器形成为从第一端子延伸到第二端子的导电路径。 导电路径具有对应于放置在三维（3D）体积上的二维（2D）波瓣的形状。 由于导电路径的形状对应于放置在3D体积上的2D波瓣，由电感器产生的磁场具有在电感器外部主要破坏的磁场线和在电感器内主要构造的磁场线。 以这种方式，电感器可以在靠近其他部件放置的同时保持高品质（Q）因子。

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