Microlens, an image sensor including a microlens, method of forming a microlens and method for manufacturing an image sensor
    72.
    发明申请
    Microlens, an image sensor including a microlens, method of forming a microlens and method for manufacturing an image sensor 失效
    微透镜,包括微透镜的图像传感器,形成微透镜的方法和用于制造图像传感器的方法

    公开(公告)号:US20110008920A1

    公开(公告)日:2011-01-13

    申请号:US12805821

    申请日:2010-08-20

    Abstract: A microlens, an image sensor including the microlens, a method of forming the microlens and a method of manufacturing the image sensor are provided. The microlens includes a polysilicon pattern, having a cylindrical shape, formed on a substrate, and a round-type shell portion enclosing the polysilicon pattern. The microlens may further include a filler material filling an interior of the shell portion, or a second shell portion covering the first shell portion. The method of forming a microlens includes forming a silicon pattern on a semiconductor substrate having a lower structure, forming a capping film on the semiconductor substrate over the silicon pattern, annealing the silicon pattern and the capping film altering the silicon pattern to a polysilicon pattern having a cylindrical shape and the capping film to a shell portion for a round-type microlens, and filling an interior of the shell portion with a lens material through an opening between the semiconductor substrate and an edge of the shell portion. The image sensor includes a microlens formed by a similar method and a photodiode having a cylindrical shape.

    Abstract translation: 提供微透镜,包括微透镜的图像传感器,形成微透镜的方法和制造图像传感器的方法。 微透镜包括形成在基板上的具有圆柱形状的多晶硅图案和包围多晶硅图案的圆形外壳部分。 微透镜还可以包括填充壳体部分的内部的填充材料或覆盖第一壳体部分的第二壳体部分。 形成微透镜的方法包括在具有较低结构的半导体衬底上形成硅图案,在硅图案上的半导体衬底上形成覆盖膜,使硅图案和覆盖膜退火,将硅图案改变为具有 圆筒形,并且封盖膜用于圆形微透镜的外壳部分,并且通过半导体基板和外壳部分的边缘之间的开口用透镜材料填充外壳部分的内部。 图像传感器包括通过类似方法形成的微透镜和具有圆柱形状的光电二极管。

    Inverter, method of manufacturing the same, and logic circuit including the inverter
    73.
    发明申请
    Inverter, method of manufacturing the same, and logic circuit including the inverter 有权
    逆变器及其制造方法以及包括逆变器的逻辑电路

    公开(公告)号:US20100264956A1

    公开(公告)日:2010-10-21

    申请号:US12591654

    申请日:2009-11-25

    CPC classification number: H01L21/823807 H01L27/0922 H01L27/1225 H01L27/1251

    Abstract: Provided are an inverter, a method of manufacturing the inverter, and a logic circuit including the inverter. The inverter may include a first transistor and a second transistor having different channel layer structures. A channel layer of the first transistor may include a lower layer and an upper layer, and a channel layer of the second transistor may be the same as one of the lower layer and the upper layer. At least one of the lower layer and the upper layer may be an oxide layer. The inverter may be an enhancement/depletion (E/D) mode inverter or a complementary inverter.

    Abstract translation: 提供逆变器,逆变器的制造方法以及包括逆变器的逻辑电路。 反相器可以包括具有不同沟道层结构的第一晶体管和第二晶体管。 第一晶体管的沟道层可以包括下层和上层,并且第二晶体管的沟道层可以与下层和上层之一相同。 下层和上层中的至少一层可以是氧化物层。 逆变器可以是增强/耗尽型(E / D)型逆变器或互补型逆变器。

    Method of fabricating orientation-controlled single-crystalline wire and method of fabricating transistor having the same
    75.
    发明授权
    Method of fabricating orientation-controlled single-crystalline wire and method of fabricating transistor having the same 有权
    制造取向控制单晶线的方法及其制造具有该晶体管的晶体管的方法

    公开(公告)号:US07566364B2

    公开(公告)日:2009-07-28

    申请号:US11483586

    申请日:2006-07-11

    CPC classification number: C30B29/06 C30B25/005 C30B29/08 C30B29/60

    Abstract: Provided may be a method of fabricating nanowires and a method of fabricating a transistor having the same. The method may include: forming a template layer on a substrate, the template layer having a first lateral surface and a second lateral surface facing the first surface; forming pores in the template layer, the pores disposed between the first lateral surface and the second lateral surface in the template layer and having first apertures in the first lateral surface; forming a single-crystalline material layer contacting the first apertures disposed in the first lateral surface of the template layer; forming second apertures connecting pores disposed in the second lateral surface; supplying gaseous crystal growth materials through the second apertures; and forming crystalline nanowires in the pores by crystal growth from the single-crystalline material layer. The nanowires may be made of crystalline materials, e.g., Si or SiGe, and may be formed parallel to the substrate. Higher quality nanowires, whose orientation may be controlled, may be formed. A higher quality transistor may be formed on the substrate by applying a method of fabricating the nanowires.

    Abstract translation: 可以提供制造纳米线的方法和制造具有该纳米线的晶体管的方法。 该方法可以包括:在衬底上形成模板层,模板层具有第一侧表面和面向第一表面的第二侧表面; 在模板层中形成孔,孔设置在模板层中的第一侧表面和第二侧表面之间,并且在第一侧表面中具有第一孔; 形成与设置在模板层的第一侧表面中的第一孔接触的单晶材料层; 形成连接设置在所述第二侧表面中的孔的第二孔; 通过所述第二孔提供气态晶体生长材料; 以及通过从单晶材料层的晶体生长在孔中形成结晶纳米线。 纳米线可以由例如Si或SiGe的结晶材料制成,并且可以与基底平行地形成。 可以形成其取向可以被控制的更高质量的纳米线。 可以通过应用制造纳米线的方法在衬底上形成更高质量的晶体管。

    Semiconductor devices including transistors and methods of fabricating the same
    78.
    发明申请
    Semiconductor devices including transistors and methods of fabricating the same 有权
    包括晶体管的半导体器件及其制造方法

    公开(公告)号:US20070111605A1

    公开(公告)日:2007-05-17

    申请号:US11600741

    申请日:2006-11-17

    Abstract: A semiconductor device includes a transistor. The transistor includes a substrate having an inclined surface, a first upper surface extending from a lower portion of the inclined surface, and a second upper surface extending from an upper end of the inclined surface. A gate stack structure is formed on the inclined surface and includes a gate electrode. A first impurity region formed on one of the first and second upper surfaces contacts the gate stack structure. A second impurity region formed on the second upper surface contacts the gate stack structure. A channel between the first and second impurity regions is formed along the inclined surface in a crystalline direction.

    Abstract translation: 半导体器件包括晶体管。 晶体管包括具有倾斜表面的基板,从倾斜表面的下部延伸的第一上表面和从倾斜表面的上端延伸的第二上表面。 栅极堆叠结构形成在倾斜表面上并且包括栅电极。 形成在第一和第二上表面中的一个上的第一杂质区域接触栅极堆叠结构。 形成在第二上表面上的第二杂质区域接触栅堆叠结构。 第一和第二杂质区之间的通道在结晶方向上沿着倾斜表面形成。

    THIN FILM TRANSISTOR AND METHOD OF FABRICATING THE SAME
    79.
    发明申请
    THIN FILM TRANSISTOR AND METHOD OF FABRICATING THE SAME 有权
    薄膜晶体管及其制造方法

    公开(公告)号:US20070108483A1

    公开(公告)日:2007-05-17

    申请号:US11557360

    申请日:2006-11-07

    CPC classification number: H01L29/78621 H01L29/66757

    Abstract: A thin film transistor having an offset or a lightly doped drain (LDD) structure by self alignment and a method of fabricating the same comprises a substrate, a silicon layer disposed on the substrate and including a channel region, a source region and a drain region at both sides of the channel region, and offset regions, each offset regions disposed between the channel region and one of the source and drain regions at both sides of the channel region, a gate insulating layer covering the channel region and the offset regions disposed at both sides of the channel region excluding the source and drain regions, and a gate layer formed on the channel region excluding the offset regions. The thin film transistor has the structure in which an offset or LDD is obtained without an additional mask process.

    Abstract translation: 具有通过自对准的偏移或轻掺杂漏极(LDD)结构的薄膜晶体管及其制造方法包括:衬底,设置在衬底上的硅层,并且包括沟道区,源极区和漏极区 在通道区域的两侧和偏移区域,每个偏移区域设置在沟道区域和沟道区域两侧的源极和漏极区域之一之间,覆盖沟道区域的栅极绝缘层和设置在沟道区域的偏移区域 除了源极和漏极区域之外的沟道区域的两侧,以及形成在除偏移区域之外的沟道区域上的栅极层。 薄膜晶体管具有在没有附加掩模处理的情况下获得偏移或LDD的结构。

    Semi-conductor-on-insulator structure, semiconductor devices using the same and method of manufacturing the same

    公开(公告)号:US20060267017A1

    公开(公告)日:2006-11-30

    申请号:US11397866

    申请日:2006-04-05

    CPC classification number: H01L29/78687 H01L29/66742 H01L29/78603

    Abstract: Semiconductor-on-insulator (SOI) structures, semiconductor devices using the same and methods of manufacturing the same, and more particularly, to a structure with a single-crystalline (for example, germanium (x-Ge)) layer on an insulating layer, semiconductor devices using the same, and methods of manufacturing the same. The SOI structure may include a single-crystalline substrate formed of a first semiconductor material, a first insulating layer formed on the substrate and having at least one window exposing a portion of the substrate, a first epitaxial growth region formed on a surface of the substrate exposed by the window and formed of at least one of the first semiconductor material and a second semiconductor material, and a first single-crystalline layer formed on the first insulating layer and the first epitaxial growth region and formed of the second semiconductor material, and crystallized using a surface of the first epitaxial growth region as a seed layer for crystallization.

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