SYSTEMS AND PROCESSES FOR PLASMA TUNING
    72.
    发明申请

    公开(公告)号:US20200090907A1

    公开(公告)日:2020-03-19

    申请号:US16134200

    申请日:2018-09-18

    Abstract: Systems and methods may be used to enact plasma tuning. Exemplary semiconductor processing chambers may include a pedestal positioned within the chamber and configured to support a substrate. The pedestal may include an electrode operable to form a plasma within a processing region of the semiconductor processing chamber, with the processing region at least partially defined by the pedestal. The pedestal may include a heater embedded within the pedestal, and the heater may be coupled with a power supply. An RF filter may be coupled between the power supply and the heater. A shunt capacitor may also be coupled between the RF filter and the heater.

    THERMAL MANAGEMENT SYSTEMS AND METHODS FOR WAFER PROCESSING SYSTEMS

    公开(公告)号:US20200066556A1

    公开(公告)日:2020-02-27

    申请号:US16673296

    申请日:2019-11-04

    Abstract: A workpiece holder includes a puck having a cylindrical axis, a radius about the cylindrical axis, and a thickness. At least a top surface of the puck is substantially planar, and the puck defines one or more thermal breaks. Each thermal break is a radial recess that intersects at least one of the top surface and a bottom surface of the cylindrical puck. The radial recess has a thermal break depth that extends through at least half of the puck thickness, and a thermal break radius that is at least one-half of the puck radius. A method of processing a wafer includes processing the wafer with a first process that provides a first center-to-edge process variation, and subsequently, processing the wafer with a second process that provides a second center-to-edge process variation that substantially compensates for the first center-to-edge process variation.

    Flow control features of CVD chambers

    公开(公告)号:US10550472B2

    公开(公告)日:2020-02-04

    申请号:US14481774

    申请日:2014-09-09

    Abstract: Apparatus and methods for gas distribution assemblies are provided. In one aspect, a gas distribution assembly is provided comprising an annular body comprising an annular ring having an inner annular wall, an outer wall, an upper surface, and a bottom surface, an upper recess formed into the upper surface, and a seat formed into the inner annular wall, an upper plate positioned in the upper recess, comprising a disk-shaped body having a plurality of first apertures formed therethrough, and a bottom plate positioned on the seat, comprising a disk-shaped body having a plurality of second apertures formed therethrough which align with the first apertures, and a plurality of third apertures formed between the second apertures and through the bottom plate, the bottom plate sealingly coupled to the upper plate to fluidly isolate the plurality of first and second apertures from the plurality of third apertures.

    Dual-channel showerhead with improved profile

    公开(公告)号:US10546729B2

    公开(公告)日:2020-01-28

    申请号:US15285331

    申请日:2016-10-04

    Abstract: Described processing chambers may include a chamber housing at least partially defining an interior region of the semiconductor processing chamber. The chambers may include a pedestal. The chambers may include a first showerhead positioned between the lid and the processing region, and may include a faceplate positioned between the first showerhead and the processing region. The chambers may also include a second showerhead positioned within the chamber between the faceplate and the processing region of the semiconductor processing chamber. The second showerhead may include at least two plates coupled together to define a volume between the at least two plates. The at least two plates may at least partially define channels through the second showerhead, and each channel may be characterized by a first diameter at a first end of the channel and may be characterized by a plurality of ports at a second end of the channel.

    Chamber with flow-through source
    77.
    发明授权

    公开(公告)号:US10541113B2

    公开(公告)日:2020-01-21

    申请号:US16291494

    申请日:2019-03-04

    Abstract: Described processing chambers may include a chamber housing at least partially defining an interior region of a semiconductor processing chamber. The chamber may include a showerhead positioned within the chamber housing, and the showerhead may at least partially divide the interior region into a remote region and a processing region in which a substrate can be contained. The chamber may also include an inductively coupled plasma source positioned between the showerhead and the processing region. The inductively coupled plasma source may include a conductive material within a dielectric material.

    Rotatable substrate support having radio frequency applicator

    公开(公告)号:US10460915B2

    公开(公告)日:2019-10-29

    申请号:US15582282

    申请日:2017-04-28

    Abstract: A substrate support assembly includes a shaft assembly, a pedestal coupled to a portion of the shaft assembly, and a first rotary connector coupled to the shaft assembly, wherein the first rotary connector comprises a first coil member surrounding a rotatable shaft member that is electrically coupled to the shaft assembly, the first coil member being rotatable with the rotatable shaft, and a second coil member surrounding the first coil member, the second coil member being stationary relative to the first coil member, wherein the first coil member electrically couples with the second coil member when the rotating radio frequency applicator is energized and provides a radio frequency signal/power to the pedestal through the shaft assembly.

    PLASMA HEALTH DETERMINATION IN SEMICONDUCTOR SUBSTRATE PROCESSING REACTORS

    公开(公告)号:US20180366378A1

    公开(公告)日:2018-12-20

    申请号:US15625454

    申请日:2017-06-16

    Abstract: Methods of monitoring a plasma while processing a semiconductor substrate are described. In embodiments, the methods include determining the difference in power between the power delivered from the plasma power supply and the power received by the plasma in a substrate processing chamber. The power received may be determined using a V/I sensor positioned after the matching circuit. The power reflected or the power lost is the difference between the delivered power and the received power. The process may be terminated by removing the delivered power if the reflected power is above a setpoint. The VRF may further be fourier transformed into frequency space and compared to the stored fourier transform of a healthy plasma process. Missing frequencies from the VRF fourier transform may independently or further indicate an out-of-tune plasma process and the process may be terminated.

    MULTI-LAYER PLASMA EROSION PROTECTION FOR CHAMBER COMPONENTS

    公开(公告)号:US20180330923A1

    公开(公告)日:2018-11-15

    申请号:US15965794

    申请日:2018-04-27

    Abstract: A method of applying a multi-layer plasma resistant coating on an article comprises performing plating or ALD to form a conformal first plasma resistant layer on an article, wherein the conformal first plasma resistant layer is formed on a surface of the article and on walls of high aspect ratio features in the article. The conformal first plasma resistant coating has a porosity of approximately 0% and a thickness of approximately 200 nm to approximately 1 micron. One of electron beam ion assisted deposition (EB-IAD), plasma enhanced chemical vapor deposition (PECVD), aerosol deposition or plasma spraying is then performed to form a second plasma resistant layer that covers the conformal first plasma resistant layer at a region of the surface but not at the walls of the high aspect ratio features.

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