公开(公告)号：US06768332B2

公开(公告)日：2004-07-27

申请号：US10385565

申请日：2003-03-12

申请人： Yueh Lung Lin ,  Ho Ming Tong ,  Yao Hsin Feng ,  Su Tao ,  Chi Cheng Pan ,  Kuo Pin Yang ,  Sung Ching Hung

发明人： Yueh Lung Lin ,  Ho Ming Tong ,  Yao Hsin Feng ,  Su Tao ,  Chi Cheng Pan ,  Kuo Pin Yang ,  Sung Ching Hung

IPC分类号： G10R3126

CPC分类号： G01R31/2884

摘要： A semiconductor wafer includes a plurality of areas and an array of dice disposed within each of the areas. The feature of the present invention is that at least two fiducial marks are disposed in each of the areas. The present invention further provides a method of testing a sawed semiconductor wafer.

公开(公告)号：US06462421B1

公开(公告)日：2002-10-08

申请号：US09546627

申请日：2000-04-10

申请人： Kao-Yu Hsu ,  Su Tao

发明人： Kao-Yu Hsu ,  Su Tao

IPC分类号： H01L2940

CPC分类号： H01L25/0657 ,  H01L24/73 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2924/00014 ,  H01L2924/01087 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599

摘要： A multichip module mainly comprises a first chip disposed on the upper surface of a substrate by wire bonding and a second chip disposed on the lower surface of the substrate by flip-chip bonding wherein the first chip and the second chip are of the same type. The upper surface of the substrate is provided with a plurality of wire bondable pads for electrical connecting to the first chip. The lower surface of the substrate is provided with a plurality of flip-chip pads for electrical connecting to the second chip. According to the present invention, the first and second chips are both oriented face up (with their bonding pads up with respect to the substrate) for bonding to the substrate. Thus, address assignment of the bonding pads on the two semiconductor chips conforms to each other. Consequently, circuit layout on the upper and lower surfaces of the substrate can use substantially the same design wherein common conductive traces on the upper and lower surfaces of the substrate are electrically connected by plated through holes.

摘要翻译： 多芯片模块主要包括通过引线键合设置在基板的上表面上的第一芯片和通过倒装芯片接合设置在基板的下表面上的第二芯片，其中第一芯片和第二芯片是相同类型的。 衬底的上表面设置有用于电连接到第一芯片的多个可焊接焊盘。 衬底的下表面设置有用于电连接到第二芯片的多个倒装芯片焊盘。 根据本发明，第一和第二芯片既面向上（其相对于基板的接合焊盘向上），用于粘合到基板。 因此，两个半导体芯片上的接合焊盘的地址分配彼此一致。 因此，在基板的上表面和下表面上的电路布局可以使用基本上相同的设计，其中基板的上表面和下表面上的公共导电迹线通过电镀通孔电连接。

公开(公告)号：US06392424B1

公开(公告)日：2002-05-21

申请号：US09373187

申请日：1999-08-12

申请人： Chin-Chen Wang ,  Yao-Hsin Feng ,  Su Tao

发明人： Chin-Chen Wang ,  Yao-Hsin Feng ,  Su Tao

IPC分类号： G01R3102

CPC分类号： G01R1/0408

摘要： A press plate mainly includes a plate and a probe. The plate has an opening which corresponds to a chip of the substrate and inner finger thereof, and the probe is elastically attached to the edge of the opening for wire bond checking. After the wire bonding process, the wire connecting the chip and the inner finger of the substrate and the probe of the wire bond checking system form a loop. Then a current is sent to the substrate from the wire bond checking system to check for the occurrence of wire occurring lift bond or missing wire.

摘要翻译： 压板主要包括板和探针。 该板具有对应于基板和其内指的芯片的开口，并且探针弹性地附接到开口的边缘以进行引线键合检查。 在引线接合工艺之后，连接芯片和基板的内指以及引线键合检查系统的探针的导线形成环路。 然后从线焊检查系统将电流发送到基板，以检查发生电线接合或缺失电线的发生。

公开(公告)号：US06369439B1

公开(公告)日：2002-04-09

申请号：US09366637

申请日：1999-08-04

申请人： Su Tao ,  Kuo-Pin Yang ,  Tai-Chun Huang

发明人： Su Tao ,  Kuo-Pin Yang ,  Tai-Chun Huang

IPC分类号： H01L23465

CPC分类号： H01L23/13 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2924/3511 ,  H01L2924/00014

摘要： A strip mainly includes a plurality of guide holes, a plurality of position holes, a plurality of separation holes, a plurality of second slots and a plurality of substrate areas. Guide holes are arranged on two sides of the strip for carrying during processing, and position holes are arranged at four corners of the strip for positioning on the machine during processing. Separation holes and slots are to be contiguous to the substrate areas and separate the substrate areas from one another so that the discontinuous warpage of the substrate area affects the peripheral substrate areas. Therefore, it can reduce the chance of breaking chip in the substrate area. The two ends of the substrate are adjacent to the slots to reduce the stress of other substrates in the longitudinal direction actuating the chip during heat treatment in processing. The strip further includes a metal layer surrounding the substrate areas to increase the stiffness of the entirety of the strip.

摘要翻译： 一条带主要包括多个导向孔，多个位置孔，多个分隔孔，多个第二槽和多个基板区域。 引导孔布置在条的两侧，用于在加工过程中传送，并且定位孔布置在条的四个角处，用于在加工期间定位在机器上。 分离孔和槽将与衬底区域相邻并且将衬底区域彼此分开，使得衬底区域的不连续翘曲影响外围衬底区域。 因此，可以减少在基板区域中芯片断裂的机会。 衬底的两端与槽相邻，以减少处理过程中热处理期间致动芯片的纵向方向上的其它衬底的应力。 条带还包括围绕衬底区域的金属层，以增加整个条带的刚度。

公开(公告)号：US06229702B1

公开(公告)日：2001-05-08

申请号：US09323904

申请日：1999-06-02

申请人： Su Tao ,  Chin-Long Wu ,  Tai-Chun Huang ,  Han-Hsiang Huang ,  Shih-Kuang Chen ,  Shin-Hua Chao

发明人： Su Tao ,  Chin-Long Wu ,  Tai-Chun Huang ,  Han-Hsiang Huang ,  Shih-Kuang Chen ,  Shin-Hua Chao

IPC分类号： H05K720

CPC分类号： H01L23/4334 ,  H01L23/3675 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/16151 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： A ball grid array semiconductor package includes a substrate, a die mounted on the substrate and electrically connected to the substrate by bonding wires, a heat ring mounted on the substrate to surround the die and the bonding wires, and a heat slug mounted on the heat ring to entirely cover the die and the bonding wires thereby providing improved heat dissipation efficiency and overall electrical performance. Encapsulation material is filled into an inner space surrounded by the heat ring, heat slug and substrate to form an encapsulant for protecting the die and bonding wires. The heat ring and heat slug has at least a portion of surface area sequentially coated with a metal medium layer and an insulation layer to enhance the bonding degree between the encapsulant and the heat ring and heat slug.

摘要翻译： 球栅阵列半导体封装包括基板，安装在基板上并通过接合线电连接到基板的芯片，安装在基板上以围绕晶片和接合线的热环，以及安装在热源上的散热片 环以完全覆盖模具和接合线，从而提供改善的散热效率和整体电气性能。 将封装材料填充到由热环，热块和衬底包围的内部空间中，以形成用于保护管芯和接合线的密封剂。 热环和热块具有至少一部分表面积顺序地涂覆有金属介质层和绝缘层，以增强密封剂与热环和加热块之间的结合度。

公开(公告)号：US06204559B1

公开(公告)日：2001-03-20

申请号：US09444365

申请日：1999-11-22

申请人： Chun Hung Lin ,  Yire Zine Lee ,  Su Tao ,  Jian Wen Chen

发明人： Chun Hung Lin ,  Yire Zine Lee ,  Su Tao ,  Jian Wen Chen

IPC分类号： H01L2352

CPC分类号： H01L23/4985 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/05599 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01087 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099

摘要： This invention moves at least one outer via outwardly to a location under the edge of the chip so as to form an offset via. Since the via is made of copper, the offset via provides sufficient supporting strength for the chip edge during molding process. Further, this invention also disposes a copper mesh on the substrate at the area without vias and traces so as to enhance the substrate strength for supporting the chip. According to another aspect of this invention, dummy via holes are provided for the substrate at the area under the chip edge for supporting the chip. Since the copper mesh, offset via, the dummy via hole are made of copper having sufficient supporting strength for the chip, the crack problem during molding process can be eliminated.

摘要翻译： 本发明将至少一个外部通孔向外移动到芯片边缘下方的位置，以形成偏移通孔。 由于通孔由铜制成，偏移通孔在成型过程中为芯片边缘提供足够的支撑强度。 此外，本发明还在没有通孔和迹线的区域上在基板上配置铜网，以增强用于支撑芯片的基板强度。 根据本发明的另一方面，在用于支撑芯片的芯片边缘下方的区域处为基板设置虚设通孔。 由于铜网，偏移通孔，虚拟通孔由具有足够的支撑强度的铜制成，因此可以消除模制过程中的裂纹问题。

公开(公告)号：US06176416B1

公开(公告)日：2001-01-23

申请号：US09346681

申请日：1999-07-02

申请人： Yu-Fang Tsai ,  Su Tao

发明人： Yu-Fang Tsai ,  Su Tao

IPC分类号： B23K3100

CPC分类号： H01L24/85 ,  B23K20/005 ,  B23K2101/38 ,  H01L24/48 ,  H01L24/49 ,  H01L24/78 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/49051 ,  H01L2224/73265 ,  H01L2224/78301 ,  H01L2224/85181 ,  H01L2224/85203 ,  H01L2224/85205 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2224/45099 ,  H01L2924/00

摘要： A method of making low profile wire connection comprising steps of: connecting a wire to a first bonding point, moving a capillary straight up a first length, moving the capillary away from a second bonding point thus making the first reverse action to bend the wire in an appropriate angle so as to form the first bent point, again raising the capillary a second length, again moving the capillary in the direction of the second bonding point to bend the wire in an appropriate angle so as to form the second bent point, again raising the capillary a third length, moving the capillary to the second bonding point thus making an action to bend the wire in an appropriate angle so as to form the third bent point, raising the capillary a fourth length by feeding out the wire to a length which is enough to make a wire loop, and then moving the capillary down to the second bonding point where the bonding is performed.

摘要翻译： 一种制造低轮廓线连接的方法，包括以下步骤：将线连接到第一接合点，将毛细管直线移动第一长度，将毛细管从第二接合点移开，从而进行第一反向动作以使线弯曲 适当的角度以形成第一弯曲点，再次将毛细管再次升高第二长度，再次沿着第二接合点的方向移动毛细管以使线材以适当的角度弯曲以再次形成第二弯曲点 使毛细管升高第三长度，从而使毛细管移动到第二粘合点，从而使电线以适当的角度弯曲以形成第三弯曲点，从而将毛细管送出长度为第四长度 这足以制造线环，然后将毛细管向下移动到进行接合的第二接合点。

公开(公告)号：US6093960A

公开(公告)日：2000-07-25

申请号：US330036

申请日：1999-06-11

申请人： Su Tao ,  Kuang-Lin Lo ,  Hsin-Hsing Wei

发明人： Su Tao ,  Kuang-Lin Lo ,  Hsin-Hsing Wei

IPC分类号： H01L23/433 ,  H01L23/48 ,  H01L23/28 ,  H01L29/44

CPC分类号： H01L23/4334 ,  H01L2224/05599 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/85399 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/3025

摘要： A semiconductor package has a die and a plurality of leads electrically connected to the die with bonding wires. A heat spreader has an upper face thermally contacted with the die. The heat spreader is formed by a copper core having at least a portion of surface sequentially coated with a metal medium layer and an insulation layer, wherein the metal medium layer has an adhesion degree with insulation material higher than copper. A package body encapsulates the die, the heat spreader and the plurality of leads, wherein the surface area of the heat spreader that contacts with the package body is coated with the metal medium layer and the insulation layer.

摘要翻译： 半导体封装具有管芯和多个引线，其使用接合线电连接到管芯。 散热器具有与模具热接触的上表面。 散热器由铜芯形成，铜芯具有依次涂覆有金属介质层和绝缘层的表面的至少一部分，其中金属介质层具有高于铜的绝缘材料的粘合度。 包装体封装模具，散热器和多个引线，其中与封装主体接触的散热器的表面积涂覆有金属介质层和绝缘层。

公开(公告)号：US5474433A

公开(公告)日：1995-12-12

申请号：US277296

申请日：1994-07-21

申请人： Yu-Choung Chang ,  Shwu-Er Huang ,  Su Tao ,  Chih-Cheng Yang

发明人： Yu-Choung Chang ,  Shwu-Er Huang ,  Su Tao ,  Chih-Cheng Yang

IPC分类号： F04C18/02 ,  F04C23/00 ,  F04C27/00 ,  F04C18/04

CPC分类号： F04C18/0215 ,  F04C27/005 ,  F04C23/008

摘要： An axial sealing mechanism of a volute compressor comprises a fixed volute member, a orbiting volute member, and an isolating member which is fastened to the back of the fixed volute member and provided with back pressure chambers into which an intermediate-pressure working fluid or a high-pressure working fluid is introduced via the compression chambers formed by the fixed volute member and the orbiting volute member. The pressing member in the back pressure chamber is therefore forced to urge axially the fixed volute member so as to overcome the axial thrust and the overturn moment of force, which exert on the fixed volute member at the time when the compression chambers are in operation. The axial gap between the fixed volute member and the orbiting volute member is thus minimized so as to prevent the working fluid from leaking out from the compression chambers and to improve the volumetric efficiency of the volute compressor.

摘要翻译： 蜗壳压缩机的轴向密封机构包括固定的蜗壳构件，轨道蜗壳构件和隔离构件，该隔离构件紧固到固定蜗壳构件的后部并设置有背压室，中压工作流体或 通过由固定蜗壳构件和绕动蜗壳构件形成的压缩室引入高压工作流体。 因此，背压室中的按压构件被迫沿轴向推动固定蜗壳构件，以克服在压缩室运行时施加在固定蜗壳构件上的轴向推力和翻转力矩。 固定涡卷构件与旋转蜗壳构件之间的轴向间隙因此被最小化，以防止工作流体从压缩腔室泄漏并提高蜗壳式压缩机的体积效率。

公开(公告)号：US07473581B2

公开(公告)日：2009-01-06

申请号：US11221780

申请日：2005-09-09

申请人： Su Tao

发明人： Su Tao

IPC分类号： H01L21/44

CPC分类号： H01L23/3128 ,  H01L21/304 ,  H01L21/6836 ,  H01L21/78 ,  H01L24/27 ,  H01L24/29 ,  H01L24/48 ,  H01L24/83 ,  H01L24/92 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68327 ,  H01L2224/05554 ,  H01L2224/274 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83856 ,  H01L2224/92247 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of wafer stacking packaging. The method comprises providing a die array including a plurality of singulated first dies cut from a first wafer; providing a second wafer with inseparate the second dies and an adhesive layer on an active surface thereof; pre-cutting the second wafer to a specified depth from the active surface thereof; stacking the active surface of second wafer onto a backside of the first dies, wherein each of the second dies only stack on one of the first dies; thinning the second wafer from the backside thereof to form a plurality of singulated the second dies stacked on the first dies simultaneously.

摘要翻译： 晶圆堆叠包装方法。 该方法包括提供包括从第一晶片切割的多个单个的第一裸片的管芯阵列; 提供具有第二模具的第二晶片和其活性表面上的粘合剂层; 将第二晶片从其有效表面预切割到指定深度; 将第二晶片的有源表面堆叠到第一裸片的背面，其中每个第二裸片仅堆叠在第一裸片之一上; 从其背面使第二晶片变薄，以形成多个分开的第一模具上的第二模具。