公开(公告)号：US20060050582A1

公开(公告)日：2006-03-09

申请号：US10934719

申请日：2004-09-03

申请人： Frederick Perner

发明人： Frederick Perner

IPC分类号： G11C7/00

CPC分类号： G11C7/062 ,  G11C7/065 ,  G11C8/10 ,  G11C11/16

摘要： A gain stage in a sense amplifier receives an input signal representing a stored value and senses if the input signal is less than or not less than a reference signal and generates an output signal indicative of a first state when the input signal is less than the reference signal and an output signal indicative of a second state when the input signal is not less than the reference signal. The gain stage further comprises an integrated latch configured to latch the output signal in either the first or second state. Additionally, a controller operates a sense amplifier having multiple operating modes. Sample mode switch logic causes the sense amplifier to sample a first voltage applied to the sense amplifier's input and hold and compare mode switch logic causes the sense amplifier to hold the first voltage for comparison with a second voltage applied to the sense amplifier's input.

公开(公告)号：US20050237795A1

公开(公告)日：2005-10-27

申请号：US10832912

申请日：2004-04-26

申请人： Frederick Perner ,  Thomas Anthony ,  Robert Walmsley ,  Lung Tran

发明人： Frederick Perner ,  Thomas Anthony ,  Robert Walmsley ,  Lung Tran

IPC分类号： G11C11/16 ,  G11C11/14

CPC分类号： G11C11/16 ,  G11C11/1675

摘要： A method of performing a thermally assisted write operation on a selected two conductor spin valve memory (SVM) cell having a material wherein the coercivity is decreased upon an increase in temperature. In a particular embodiment, a first write magnetic field is established by a first write current flowing from a first voltage potential to a second voltage potential as applied to the first conductor. A second write magnetic field is established by a second write current flowing from a third voltage potential to a fourth voltage potential as applied to the second conductor. The voltage potential of the first conductor is greater than the voltage potential of the second conductor. As a result, a third current, flows from the first conductor through the SVM cell to the second conductor. The SVM cell has an internal resistance such that the flowing current generates heat within the SVM cell. As the SVM cell is self heated, the coercivity of the SVM cell falls below the combined write magnetic fields.

摘要翻译： 在具有其中矫顽力在温度升高时减小的材料的所选择的两个导体自旋阀存储器（SVM）单元上进行热辅助写入操作的方法。 在特定实施例中，当施加到第一导体时，通过从第一电压电位流向第二电压电位的第一写入电流建立第一写入磁场。 第二写入磁场通过施加到第二导体的从第三电压电位流向第四电压电位的第二写入电流来建立。 第一导体的电压电位大于第二导体的电压电位。 结果，第三电流从第一导体流过SVM电池流到第二导体。 SVM单元具有内部电阻，使得流动电流在SVM单元内产生热量。 由于SVM单元是自加热的，所以SVM单元的矫顽力低于组合的写入磁场。

公开(公告)号：US20050185456A1

公开(公告)日：2005-08-25

申请号：US11112691

申请日：2005-04-21

申请人： Janice Nickel ,  Manoj Bhattacharyya ,  Frederick Perner

发明人： Janice Nickel ,  Manoj Bhattacharyya ,  Frederick Perner

IPC分类号： H01L27/105 ,  G11C11/14 ,  G11C11/16 ,  H01L21/8229 ,  H01L21/8246 ,  H01L27/22 ,  H01L29/76 ,  H01L29/82 ,  H01L43/00 ,  H01L43/08

CPC分类号： H01L27/222 ,  G11C11/16 ,  G11C11/1675 ,  H01L43/08

摘要： A thin film device and a method of providing thermal assistance therein is disclosed. Accordingly, a heater material is utilized to thermally assist in the operation of the thin film device. By utilizing a heater material to thermally assist in the operation of the thin film device, a substantial improvement in the accuracy and performance of the thin film device is achieved. A first aspect of the present invention is a thin film device. The thin film device includes at least one patterned thin film layer, a heater material coupled to the at least one patterned thin film layer for providing thermal assistance to the at least one of the patterned thin film layers and a conductor coupled to the heater material for supplying energy to the heater material.

摘要翻译： 公开了薄膜装置及其中提供热辅助的方法。 因此，使用加热器材料来热辅助薄膜器件的操作。 通过利用加热材料热辅助薄膜器件的操作，实现了薄膜器件的精度和性能的显着提高。 本发明的第一方面是一种薄膜器件。 所述薄膜器件包括至少一个图案化薄膜层，耦合到所述至少一个图案化薄膜层的加热器材料，用于向所述图案化薄膜层中的至少一个提供热辅助，以及耦合到所述加热器材料的导体， 向加热器材料供应能量。

公开(公告)号：US20050152182A1

公开(公告)日：2005-07-14

申请号：US10753539

申请日：2004-01-08

申请人： Thomas Anthony ,  Frederick Perner ,  Heon Lee

发明人： Thomas Anthony ,  Frederick Perner ,  Heon Lee

IPC分类号： G11C11/02 ,  G11C11/14 ,  G11C11/15 ,  H01L21/8246 ,  H01L27/10 ,  H01L27/105 ,  H01L43/08

CPC分类号： G11C11/15

摘要： A random access memory (MRAM) that includes a magnetic memory cell that is switchable between two states under the influence of a magnetic field. The MARAM also includes an electrical bit line coupled to the magnetic memory cell for generating the magnetic field. The electrical bit line includes a conductive component and a magnetic component to guide magnetic flux associated with the magnetic field towards the magnetic memory cell. A thermal insulator is positioned between the conductive portion and the magnetic memory cell, and the magnetic component has at least one guiding portion that extends from the conductive component towards the magnetic memory cell to guide the magnetic flux around at least a portion of the thermal insulator.

摘要翻译： 一种随机存取存储器（MRAM），其包括在磁场影响下在两个状态之间切换的磁存储单元。 MARAM还包括耦合到磁存储单元的电位线，用于产生磁场。 电位线包括导电部件和磁性部件，以将与磁场相关联的磁通量引向磁存储器单元。 热绝缘体位于导电部分和磁存储单元之间，并且磁性部件具有至少一个引导部分，该引导部分从导电部件朝向磁存储器单元延伸，以引导围绕热绝缘体的至少一部分的磁通量 。

公开(公告)号：US20050077555A1

公开(公告)日：2005-04-14

申请号：US10681483

申请日：2003-10-08

申请人： Frederick Perner ,  Thomas Anthony

发明人： Frederick Perner ,  Thomas Anthony

IPC分类号： H01L27/10 ,  G11C7/18 ,  G11C11/15 ,  H01L21/00 ,  H01L21/82 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/22 ,  H01L29/76 ,  H01L31/062 ,  H01L43/08

CPC分类号： H01L27/222 ,  G11C11/15

摘要： A memory includes an array of magnetic memory cells, each magnetic memory cell being adapted to store a bit of information, interconnects in communication with the magnetic memory cells, and conductors in communication with the magnetic memory cells and the interconnects, the conductors filling spaces between adjacent magnetic memory cells of the array.

摘要翻译： 存储器包括磁存储器单元阵列，每个磁存储单元适于存储信息位，与磁存储单元通信的互连以及与磁存储单元和互连通信的导体，导体之间填充空间 阵列的相邻磁存储单元。

公开(公告)号：US06804145B2

公开(公告)日：2004-10-12

申请号：US10286081

申请日：2002-11-01

申请人： Frederick Perner

发明人： Frederick Perner

IPC分类号： G11C1100

CPC分类号： G11C5/025 ,  G11C7/06 ,  G11C11/15

摘要： The invention includes a memory cell sensing system. The memory cell sensing system includes a plurality of memory cells located on a first plane of an integrated circuit. The system further includes a plurality of sense amplifiers located on a sense plane that is adjacent to the first plane. Each sense amplifier is connectable to at least one memory cell based upon a relative location of each sense amplifier with respect to locations of the at least one memory cell. The invention also includes a method of sensing a state of a selected memory cell within a plurality of memory cells. A plurality of the memory cells are located on a first plane of an integrated circuit. A plurality of sense amplifiers are located on a sense plane that is adjacent to the first plane. The method includes connecting a sense amplifier to at least one memory cell based upon a relative location of each sense amplifier with respect to locations of the at least one memory cell.

公开(公告)号：US06788605B2

公开(公告)日：2004-09-07

申请号：US10195818

申请日：2002-07-15

申请人： Manish Sharma ,  Frederick Perner

发明人： Manish Sharma ,  Frederick Perner

IPC分类号： G11C700

CPC分类号： G11C14/0036 ,  G11C11/005 ,  G11C11/404 ,  G11C11/405 ,  G11C14/00

摘要： The invention includes an apparatus and a method that provides a memory back-up system. The memory back-up system includes a first memory cell, and a non-volatile memory cell that is interfaced to the first memory cell. Control circuitry allows data to be written to either the first memory cell or the non-volatile memory cell, and provides transfer of the data from either the first memory cell or the non-volatile memory cell, to the other of either the first memory cell or the non-volatile memory cell. The memory back-up system can also include a plurality of first memory cells, and a plurality of non-volatile memory cells that are interfaced to the first memory cells. Control circuitry allows data to be written to either the first memory cells or the non-volatile memory cells, and that provides transfer of the data from either the first memory cells or the non-volatile memory cells, to the other of either the first memory cells or the non-volatile memory cells.

摘要翻译： 本发明包括提供存储器备份系统的装置和方法。 存储器备份系统包括第一存储器单元和与第一存储器单元接口的非易失性存储器单元。 控制电路允许将数据写入第一存储器单元或非易失性存储单元，并且将数据从第一存储器单元或非易失性存储单元传送到第一存储单元 或非易失性存储单元。 存储器备份系统还可以包括多个第一存储器单元以及与第一存储器单元相连接的多个非易失性存储器单元。 控制电路允许将数据写入第一存储器单元或非易失性存储器单元，并且将数据从第一存储器单元或非易失性存储器单元传送到第一存储器 单元或非易失性存储单元。

公开(公告)号：US08971091B2

公开(公告)日：2015-03-03

申请号：US13884140

申请日：2011-01-31

申请人： Wei Yi ,  Muhammad Shakeel Qureshi ,  Frederick Perner ,  Richard Carter

发明人： Wei Yi ,  Muhammad Shakeel Qureshi ,  Frederick Perner ,  Richard Carter

IPC分类号： G11C11/00 ,  G11C13/00 ,  H01L27/10

CPC分类号： G11C13/0069 ,  G11C13/0007 ,  G11C2013/0066 ,  G11C2013/0078 ,  G11C2213/32 ,  G11C2213/55 ,  G11C2213/77 ,  G11C2213/81 ,  H01L27/101

摘要： A method of switching a memristive device in a two-dimensional array senses a leakage current through the two-dimensional array when a voltage of half of a switching voltage is applied to a row line of the memristive device. A leakage compensation current is generated according to the sensed leakage current, and a switching current ramp is also generated. The leakage compensation current and the switching current ramp are combined to form a combined switching current, which is applied to the row line of the memristive device. When a resistance of the memristive device reaches a target value, the combined switching current is removed from the row line.

摘要翻译： 当二维阵列中的忆阻器件的切换被施加到忆阻器件的行线上时，通过二维阵列切换忆阻器件的方法来感测通过二维阵列的漏电流。 根据检测到的漏电流产生泄漏补偿电流，并且还产生开关电流斜坡。 泄漏补偿电流和开关电流斜坡组合形成组合开关电流，其被施加到忆阻器件的行线。 当忆阻器件的电阻达到目标值时，组合的开关电流从行线上去除。

公开(公告)号：US20140198559A1

公开(公告)日：2014-07-17

申请号：US14239053

申请日：2011-08-26

申请人： Frederick Perner

发明人： Frederick Perner

IPC分类号： G11C13/00

CPC分类号： G11C13/004 ,  G11C11/15 ,  G11C11/16 ,  G11C13/0007 ,  G11C2013/0054

摘要： A read circuit for sensing a resistance state of a resistive switching device in a crosspoint array utilizes a transimpedance equipotential preamplifier connected to a selected column line of the resistive switching device in the array. The equipotential preamplifier delivers a sense current while maintaining the selected column line at a reference voltage near a biasing voltage applied to unselected row lines of the array. A reference resistor is selectively connected to the equipotential preamplifier for setting a reference current, wherein the equipotential preamplifier is set to produce a preamplifier output voltage having a magnitude depending on whether the sense current is smaller or greater than the reference current. A voltage comparator is connected to the equipotential preamplifier to compare the preamplifier output voltage with a setup reference voltage and generate a comparator output voltage indicative of the resistance state of the resistive switching device.

摘要翻译： 用于感测交叉点阵列中的电阻式开关器件的电阻状态的读取电路利用连接到阵列中的电阻式开关器件的选定列线的跨阻抗等电位前置放大器。 等电位前置放大器提供感测电流，同时将选定的列线保持在靠近施加到阵列的未选行行的偏置电压的参考电压。 参考电阻器选择性地连接到等电位前置放大器以设置参考电流，其中等电位前置放大器被设置为产生具有取决于感测电流是小于还是大于参考电流的幅度的前置放大器输出电压。 电压比较器连接到等电位前置放大器，以将前置放大器输出电压与设置参考电压进行比较，并生成表示电阻开关器件的电阻状态的比较器输出电压。

公开(公告)号：US20130235651A1

公开(公告)日：2013-09-12

申请号：US13884107

申请日：2011-01-31

申请人： Frederick Perner ,  Wei Yi ,  Matthew D. Pickett

发明人： Frederick Perner ,  Wei Yi ,  Matthew D. Pickett

IPC分类号： G11C13/00

CPC分类号： G11C13/0069 ,  G11C13/0002 ,  G11C13/0007 ,  G11C13/0064 ,  G11C2013/0066 ,  G11C2013/0073 ,  G11C2013/0078 ,  G11C2211/5624 ,  G11C2211/5645 ,  G11C2213/15

摘要： A method of switching a memristive device applies a current ramp of a selected polarity to the memristive device. The resistance of the device during the current ramp is monitored. When the resistance of the memristive device reaches the target value, the current ramp is removed.

摘要翻译： 一种切换忆阻器件的方法将所选极性的电流斜坡应用于忆阻器件。 监测电流斜坡期间器件的电阻。 当忆阻器的电阻达到目标值时，电流斜坡被去除。