公开(公告)号：US10727085B2

公开(公告)日：2020-07-28

申请号：US14985034

申请日：2015-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yong Lin ,  Rongwei Zhang ,  Benjamin Stassen Cook ,  Abram Castro

IPC: H01L23/00 ,  H01L23/495 ,  H01L23/31 ,  H01L25/065 ,  H01L23/13 ,  H01L23/12 ,  H01L23/15 ,  H01L23/14 ,  H01L21/50 ,  H01L21/60

Abstract: A method includes applying a die attach material to a die pad of an integrated circuit package. The die attach material is employed as a bonding material to the die pad. The method includes mounting an integrated circuit die to the die pad of the integrated circuit via the die attach material. The method includes printing an adhesion deposition material on the die attach material appearing at the interface of the integrated circuit die and the die pad of the integrated circuit package to mitigate delamination between the integrated circuit die and the die pad.

公开(公告)号：US20200168747A1

公开(公告)日：2020-05-28

申请号：US16668004

申请日：2019-10-30

Applicant: Texas Instruments Incorporated

Inventor： Scott Robert Summerfelt ,  Benjamin Stassen Cook

IPC: H01L29/88 ,  H01L23/522 ,  H01L29/66

Abstract: In an integrated circuit, a metal-insulator-metal (MIM) diode includes: a first metallization structure level having a first metal layer; a first dielectric layer over the first metal layer; a metal contact or via on the first metal layer and extending through a portion of the first dielectric layer; and a second metallization structure level having a second metal layer; and a second dielectric layer over the second metal layer. The diode has a first electrode on the metal contact or via, a multilayer dielectric structure on the first electrode, and a second electrode between the multilayer dielectric structure and the second metal layer.

公开(公告)号：US10573586B2

公开(公告)日：2020-02-25

申请号：US15913648

申请日：2018-03-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Daniel Yong Lin

IPC: H01L23/495 ,  H01L21/67 ,  H01L21/48 ,  H01L21/56 ,  H01L23/29 ,  H01L23/00

Abstract: Described examples include a substrate made of a first material and having a surface. First and second nozzles respectively dispense a first solvent paste including electrically conductive nanoparticles and a second solvent paste including non-conductive nanoparticles, while moving over the surface of the substrate. The first and second nozzles additively deposit a uniform layer including sequential and contiguous zones, alternating between the first solvent paste and the second solvent paste. Energy is applied to sinter together the nanoparticles and diffuse the nanoparticles into the substrate. The sintered nanoparticles form a layer composed of an alternating sequence of electrically conductive zones contiguous with electrically non-conductive zones.

公开(公告)号：US10549986B2

公开(公告)日：2020-02-04

申请号：US15697525

申请日：2017-09-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Juan Alejandro Herbsommer ,  Simon Joshua Jacobs ,  Benjamin Stassen Cook ,  Adam Joseph Fruehling

IPC: B81C1/00 ,  H01L23/08 ,  H01L21/768

Abstract: An illustrate method (and device) includes etching a cavity in a first substrate (e.g., a semiconductor wafer), forming a first metal layer on a first surface of the first substrate and in the cavity, and forming a second metal layer on a non-conductive structure (e.g., glass). The method also may include removing a portion of the second metal layer to form an iris to expose a portion of the non-conductive structure, forming a bond between the first metal layer and the second metal layer to thereby attach the non-conductive structure to the first substrate, sealing an interface between the non-conductive structure and the first substrate, and patterning an antenna on a surface of the non-conductive structure.

公开(公告)号：US20200035599A1

公开(公告)日：2020-01-30

申请号：US16048774

申请日：2018-07-30

Applicant: Texas Instruments Incorporated

Inventor： Paul Merle Emerson ,  Benjamin Stassen Cook

IPC: H01L23/525 ,  H01L49/02 ,  H01L23/64 ,  H01L21/78 ,  H01L21/288 ,  H01L21/66

Abstract: A first conductive routing structure is electrically connected to a first electronic component. A second conductive routing structure is electrically connected to a second electronic component. An additive deposition process deposits a material over a surface of a processed wafer to form a conductive or resistive structure, which extends from a portion of the first conductive routing structure to a portion of the second conductive routing structure, to configure a circuit including the first and second electronic components.

公开(公告)号：US10529641B2

公开(公告)日：2020-01-07

申请号：US15361390

申请日：2016-11-26

Applicant: Texas Instruments Incorporated

Inventor： Archana Venugopal ,  Benjamin Stassen Cook ,  Luigi Colombo ,  Robert Reid Doering

IPC: H01L23/367 ,  H01L21/768 ,  H01L23/373 ,  H01L23/522

Abstract: An integrated circuit has a thermal routing structure above a top interconnect level. The top interconnect level includes interconnects connected to lower interconnect levels, and does not include bond pads, probe pads, input/output pads, or a redistribution layer to bump bond pads. The thermal routing structure extends over a portion, but not all, of a plane of the integrated circuit containing the top interconnect level. The thermal routing structure includes a layer of nanoparticles in which adjacent nanoparticles are attached to each other. The layer of nanoparticles is free of an organic binder material. The thermal routing structure has a thermal conductivity higher than the metal in the top interconnect level. The layer of nanoparticles is formed by an additive process.

公开(公告)号：US10520900B2

公开(公告)日：2019-12-31

申请号：US15393096

申请日：2016-12-28

Applicant: Texas Instruments Incorporated

Inventor： Bradley Allen Kramer ,  Benjamin Stassen Cook ,  Juan Alejandro Herbsommer

IPC: G04F5/14 ,  H03B17/00 ,  H03L7/26 ,  H01S5/024 ,  H01S5/0687 ,  H01S5/183 ,  H01S5/00 ,  H01S5/022

Abstract: In described examples, an apparatus includes a physics cell and an electronic circuit. The physics cell includes an atomic chamber, a laser source, a modulator, a photodetector and a field coil. The electronic circuit includes a frequency synthesizer, a controller and a digital to analog converter.

公开(公告)号：US10444102B2

公开(公告)日：2019-10-15

申请号：US15698528

申请日：2017-09-07

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Juan Alejandro Herbsommer ,  Adam Joseph Fruehling ,  Swaminathan Sankaran ,  Benjamin Stassen Cook

IPC: G01L11/00 ,  G01L11/02

Abstract: A pressure transducer includes a cavity, dipolar molecules disposed within the cavity, and pressure measurement circuitry. The pressure measurement circuitry is configured to measure a width of an absorption peak of the dipolar molecules, and to determine a value of pressure in the cavity based on the width of the absorption peak.

公开(公告)号：US10354890B2

公开(公告)日：2019-07-16

申请号：US15864919

申请日：2018-01-08

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Benjamin Stassen Cook ,  Yong Lin

IPC: H01L23/495 ,  H01L21/56 ,  H01L23/31

Abstract: A device comprises a substrate and an adhesive nanoparticle layer patterned into zones of electrical conductance and insulation on top of the substrate surface. A diffusion region adjoining the surface comprises an admixture of the nanoparticles in the substrate material. When the nanoparticle layer is patterned from originally all-conductive nanoparticles, the insulating zones are created by selective oxidation; when the nanoparticle layer is patterned from originally all-non-conductive nanoparticles, the conductive zones are created by depositing selectively a volatile reducing agent. A package of insulating material is in touch with the nanoparticle layer and fills any voids in the nanoparticle layer.

公开(公告)号：US10347508B2

公开(公告)日：2019-07-09

申请号：US15614819

申请日：2017-06-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yong Lin ,  Rongwei Zhang ,  Benjamin Stassen Cook ,  Abram Castro

IPC: H01L21/50 ,  H01L23/00 ,  H01L23/495 ,  H01L23/13 ,  H01L23/15 ,  H01L23/31 ,  H01L23/14 ,  H01L23/12 ,  H01L21/60

Abstract: A method includes applying a die attach material to a die pad of an integrated circuit. The die attach material is employed as a bonding material to the die pad. The method includes mounting an integrated circuit die to the die pad of the integrated circuit via the die attach material. The method includes printing an adhesion deposition material on the die attach material appearing at the interface of the integrated circuit die and the die pad of the integrated circuit to mitigate delamination between the integrated circuit die and the die pad.