公开(公告)号：US20060051920A1

公开(公告)日：2006-03-09

申请号：US10535941

申请日：2003-11-28

申请人： Shinya Yamaguchi ,  Masahiko Ando ,  Toshikazu Shimada ,  Natsuki Yokoyama ,  Shunri Oda ,  Nobuyoshi Koshida

发明人： Shinya Yamaguchi ,  Masahiko Ando ,  Toshikazu Shimada ,  Natsuki Yokoyama ,  Shunri Oda ,  Nobuyoshi Koshida

IPC分类号： H01L21/336

CPC分类号： H01L29/7881 ,  G11C23/00

摘要： An information memory device capable of reading and writing of information by mechanical operation of a floating gate layer, in which a gate insulation film has a cavity (6), and a floating gate layer (5) having two stable deflection states in the cavity (6), the state stabilized by deflecting toward the channel side of transistor, and the state stabilized by deflecting toward the gate (7) side, writing and reading of information can be made by changing the stable deflection state of the floating gate layer (5) by Coulomb interactive force between the electrons (or positive holes 8) accumulated in the floating gate layer (5) and external electric field, and by reading the channel current change based on the state of the floating gate layer (5).

摘要翻译： 一种能够通过机械操作读取和写入信息的信息存储装置，其中栅极绝缘膜具有空腔（6）和在空腔中具有两个稳定偏转状态的浮动栅层（​​5） 6），通过偏转晶体管的沟道侧稳定状态，并且通过偏向栅极（7）而稳定的状态，可以通过改变浮动栅极层（5）的稳定偏转状态来进行信息的写入和读取 ）通过积存在浮动栅极层（5）中的电子（或正空穴8）与外部电场之间的库仑相互作用力，并且基于浮动栅极层（5）的状态读取沟道电流变化。

公开(公告)号：US20050067621A1

公开(公告)日：2005-03-31

申请号：US10788369

申请日：2004-03-01

申请人： Yasushi Goto ,  Shuntaro Machida ,  Natsuki Yokoyama

发明人： Yasushi Goto ,  Shuntaro Machida ,  Natsuki Yokoyama

IPC分类号： H01L21/82 ,  H01H59/00 ,  H01L21/00

CPC分类号： H01H59/0009 ,  H01H2001/0042 ,  H01H2001/0063

摘要： Disclosed herein is a latchable MEMS switch device capable of retaining its ON or OFF state even after the external power source is turned off. It is unnecessary not only to introduce novel materials such as magnetic material but also to form complicated structures. At least one of the cantilever and pull-down electrode of a cold switch is connected to a second MEMS switch. A capacitor between the cantilever and pull-down electrode of the cold switch is charged by the second MEMS switch. Thereafter since the cold switch is isolated in the device, the charge remains stored. Therefore, the cold switch can remain in the ON state since the charge continues to create electrostatic attraction between the cantilever and the pull-down electrode.

摘要翻译： 这里公开了即使在外部电源关闭之后也能够保持其接通或关断状态的可闭锁的MEMS开关装置。 不仅不需要引入诸如磁性材料的新型材料，而且形成复杂的结构。 冷开关的悬臂和下拉电极中的至少一个连接到第二MEMS开关。 冷开关的悬臂和下拉电极之间的电容器由第二MEMS开关充电。 此后，由于冷开关在器件中隔离，所以电荷保持存储。 因此，由于电荷继续在悬臂与下拉电极之间产生静电引力，所以冷开关可以保持在导通状态。

公开(公告)号：US06204184B1

公开(公告)日：2001-03-20

申请号：US09276969

申请日：1999-03-26

申请人： Akio Nishida ,  Kikuo Kusukawa ,  Toshiaki Yamanaka ,  Natsuki Yokoyama ,  Shinichiro Kimura ,  Norio Suzuki ,  Osamu Tsuchiya ,  Atsushi Ogishima

发明人： Akio Nishida ,  Kikuo Kusukawa ,  Toshiaki Yamanaka ,  Natsuki Yokoyama ,  Shinichiro Kimura ,  Norio Suzuki ,  Osamu Tsuchiya ,  Atsushi Ogishima

IPC分类号： H01L21302

CPC分类号： H01L27/10894 ,  H01L21/31053 ,  H01L21/76229 ,  H01L21/823437 ,  H01L21/823481 ,  H01L27/10814

摘要： In a method of manufacturing a semiconductor device having a memory mat portion in which an active region and a field region are formed densely, after a polishing stopper film is deposited on a semiconductor substrate, there are formed grooves by etching a polishing stopper film of a field region and the semiconductor substrate. Then, after an insulating film is deposited so as to fill the grooves, the insulating film is partly removed from the memory mat portion by etching. Under this state, the insulating film is chemically mechanically polished until the polishing stopper film is exposed. The film thickness of the polishing stopper film on the active region can be reduced, and an electrical element isolation characteristic of the field region can be improved. At the same time, upon chemical mechanical polishing, a silicon substrate can be prevented from being exposed at the central portion of the memory mat portion and the insulating film can be prevented from being left on the silicon nitride film near the outer periphery, thereby making it possible to form elements having uniform electrical characteristics on all active regions of the memory mat portion.

摘要翻译： 在制造半导体器件的方法中，其具有密集形成有源区和场区的存储垫部分，在半导体衬底上沉积抛光阻挡膜之后，通过蚀刻抛光阻挡膜形成凹槽 场区域和半导体衬底。 然后，在沉积绝缘膜以填充凹槽之后，通过蚀刻将绝缘膜部分地从存储垫部分除去。 在这种状态下，绝缘膜被化学机械抛光直到抛光阻挡膜露出。 能够减少有源区域上的研磨停止膜的膜厚，能够提高场区域的电气元件隔离特性。 同时，在化学机械抛光时，可以防止硅衬底暴露在存储垫部分的中心部分，并且可以防止绝缘膜留在靠近外周的氮化硅膜上，从而使 可以在存储垫部分的所有有效区域上形成具有均匀电特性的元件。

公开(公告)号：US06099598A

公开(公告)日：2000-08-08

申请号：US106147

申请日：1998-06-29

申请人： Natsuki Yokoyama ,  Yoshifumi Kawamoto ,  Eiichi Murakami ,  Fumihiko Uchida ,  Kenichi Mizuishi ,  Yoshio Kawamura

发明人： Natsuki Yokoyama ,  Yoshifumi Kawamoto ,  Eiichi Murakami ,  Fumihiko Uchida ,  Kenichi Mizuishi ,  Yoshio Kawamura

IPC分类号： B65G49/07 ,  B23Q41/00 ,  B23Q41/02 ,  C23C14/56 ,  C23C16/54 ,  G05B19/418 ,  H01L21/00 ,  H01L21/02 ,  H01L21/027 ,  H01L21/205 ,  H01L21/285 ,  H01L21/304 ,  H01L21/3065 ,  H01L21/3205 ,  H01L21/677 ,  H01L21/68 ,  C23C14/00

CPC分类号： C23C14/568 ,  C23C16/54 ,  G05B19/41865 ,  H01L21/67161 ,  H01L21/67167 ,  H01L21/67173 ,  H01L21/67184 ,  H01L21/67276 ,  H01L21/67727 ,  H01L21/67745 ,  G05B2219/45031 ,  Y02P90/14 ,  Y02P90/20 ,  Y02P90/28 ,  Y10S414/135 ,  Y10S414/137 ,  Y10S438/908 ,  Y10T29/41

摘要： Disclosed is a fabricating system including a plurality of processing apparatuses connected to each other by means of an inter-apparatus transporter, wherein one group of semiconductor wafers are processed in processing apparatuses and other group of wafers are transported to specified processing apparatuses for a time interval from (To+T) to a time To; and another group of wafers are processed and the remaining group of wafers are transported for a time interval from (To+T) to (To+2T). Since processing apparatuses can receive at least one of works from the inter-apparatus transporter for a time interval T min, the distribution of works from the transporter to processing apparatuses is completed for the time interval T min. The transporter is emptied for each time interval T min, and works are unloaded to the emptied transporter, which makes easy the scheduling, control and management of the transporting of a plurality of works in the fabricating system. Moreover, since the fabricating system including processing apparatuses is periodically controlled at a cycle time T min, the scheduling of a plurality of works can be made easy, to enhance the level of optimization, thus improving the productivity.

摘要翻译： 公开了一种制造系统，其包括通过机构间传送器彼此连接的多个处理装置，其中一组半导体晶片在处理装置中被处理，并且其他组的晶片被传送到指定的处理装置一段时间间隔 从（To + T）到一个时间To; 并且处理另一组晶片，并且剩余的晶片组从（To + T）到（To + 2T）的时间间隔被传输。 由于处理装置可以从时间间隔T min接收来自装置间运送装置的作品中的至少一个，因此在时间间隔T min内完成从运送装置到处理装置的作品的分配。 在每个时间间隔T min内运输运输车被清空，并且卸载到排空运输车，这使得在制造系统中运输多个作业的调度，控制和管理变得容易。 此外，由于包括处理装置的制造系统在周期时间T min周期性地进行控制，因此能够容易地进行多个作业的调度，提高优化等级，提高生产率。

公开(公告)号：US5601686A

公开(公告)日：1997-02-11

申请号：US642510

申请日：1996-05-03

申请人： Yoshio Kawamura ,  Yoshifumi Kawamoto ,  Fumihiko Uchida ,  Kenichi Mizuishi ,  Natsuki Yokoyama ,  Eiichi Murakami ,  Yoshinori Nakayama ,  Eiichi Seya

发明人： Yoshio Kawamura ,  Yoshifumi Kawamoto ,  Fumihiko Uchida ,  Kenichi Mizuishi ,  Natsuki Yokoyama ,  Eiichi Murakami ,  Yoshinori Nakayama ,  Eiichi Seya

IPC分类号： B65G49/00 ,  B65G49/07 ,  H01L21/00 ,  H01L21/02 ,  H01L21/027 ,  H01L21/677

CPC分类号： H01L21/67748 ,  H01L21/67167 ,  H01L21/6719 ,  H01L21/67196 ,  H01L21/67742 ,  Y10S414/135 ,  Y10S414/139 ,  Y10S438/935

摘要： A wafer transport method including the steps of preparing a semiconductor process equipment having a transport chamber, a process chamber, an interface means for connecting the transport chamber to the process chamber, and a transport means for transporting a semiconductor wafer from the transport chamber to the process chamber by way of the interface means; inserting the transport means mounting a substrate in a communicating corridor including a supply means and an exhaust means; and transporting the substrate while performing the supply and exhaust by sequentially controlling a supply shutoff means, an exhaust shutoff means, and a communicating shutoff means according to the position of a conductance part formed of a gap between the transport means and the communicating corridor. With this method, the substrate is transported at a high throughput without the contamination on the substrate while keeping the different atmospheric conditions of the transport chamber and the process chamber, thereby manufacturing a semiconductor device with a high performance.

摘要翻译： 一种晶片输送方法，包括以下步骤：制备具有输送室的半导体工艺设备，处理室，用于将输送室连接到处理室的接口装置，以及用于将半导体晶片从输送室输送到 处理室; 将安装基板的输送装置插入包括供给装置和排气装置的通信走廊中; 并且通过根据由传送装置和通信走廊之间的间隙形成的电导部分的位置顺序地控制供给关闭装置，排气关闭装置和连通关闭装置，在执行供应和排出的同时运送基板。 利用该方法，在保持输送室和处理室的不同大气条件的同时，以高通量输送基板而不会在基板上产生污染，从而制造具有高性能的半导体器件。

公开(公告)号：US4897709A

公开(公告)日：1990-01-30

申请号：US199269

申请日：1988-05-26

申请人： Natsuki Yokoyama ,  Yoshio Homma ,  Kenji Hinode ,  Kiichiro Mukai

发明人： Natsuki Yokoyama ,  Yoshio Homma ,  Kenji Hinode ,  Kiichiro Mukai

IPC分类号： H01L21/3205 ,  H01L21/28 ,  H01L21/285 ,  H01L21/768 ,  H01L21/822 ,  H01L23/52 ,  H01L23/532 ,  H01L27/04 ,  H01L27/108 ,  H01L29/43

CPC分类号： H01L21/76843 ,  H01L21/76841 ,  H01L21/76877 ,  H01L23/53223 ,  H01L27/10808 ,  H01L2924/0002

摘要： A semiconductor device includes a titanium nitride film as a barrier which is formed in a hole. The width or diameter of the hole is smaller than 1 .mu.m, and the aspect ratio thereof is larger than 0.7. The sidewall of the hole is substantially perpendicular to the surface of a semiconductor substrate. By the low pressure CVD method with a cold wall type CVD apparatus, it becomes possible to form the titanium nitride film having excellent characteristics with a good step coverage in a considerably fine hole having a large aspect ratio.

摘要翻译： 半导体器件包括形成在孔中的作为势垒的氮化钛膜。 孔的宽度或直径小于1μm，纵横比大于0.7。 孔的侧壁基本上垂直于半导体衬底的表面。 通过使用冷壁型CVD装置的低压CVD法，可以在具有大纵横比的相当细小的孔中形成具有优异的阶梯覆盖性的优良特性的氮化钛膜。