利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

275 条记录 (耗时 0.022 秒)

    Semiconductor apparatus
    71.
    发明授权
    Semiconductor apparatus 有权
    半导体装置

    公开(公告)号：US07151401B2

    公开(公告)日：2006-12-19

    申请号：US10791825

    申请日：2004-03-04

    申请人： Takahiro Inoue

    发明人： Takahiro Inoue

    IPC分类号： H03K17/687

    CPC分类号： H03K17/0406 ,  H03K17/04123 ,  H03K17/04206 ,  H03K17/164 ,  H03K17/167

    摘要： Disclosed is a semiconductor apparatus having an IGBT, which includes a switch SWon 1 for supplying a gate current during an operation for turning on the gate of the IGBT, a switch SWoff 1 for discharging a gate capacitance during an operation for turning off the gate, a switch SWon 2 for increasing the gate current, a timer 14 for turning on the switch SWon 2 in conjunction with the turn-on of the switch SWon 1 and then maintaining the turn-on of the switch SWon 2 only for a first predetermined time, a switch SWoff 2 for increasing the discharge current during the gate turn-off operation, and a timer 15 for turning on the switch SWoff 2 in conjunction with the turn-on of the switch SWoff 1 and then maintaining the turn-on of the switch SWoff 2 only for a second predetermined time.

    摘要翻译： 公开了一种具有IGBT的半导体装置，其包括用于在用于接通IGBT的栅极的操作期间提供栅极电流的开关SWon 1，用于在关闭栅极的操作期间对栅极电容进行放电的开关SWoff 1， 用于增加栅极电流的开关SWon 2，与开关SWon 1的接通一起接通开关SWon2的定时器14，然后仅将开关SWon 2的导通保持在第一预定时间 ，用于在栅极关断操作期间增加放电电流的开关SWoff 2，以及与开关SWoff 1的导通相关联地接通开关SWoff2的定时器15，然后保持开关SWoff 2的导通 开关SWoff 2只有第二个预定时间。

    Output driver with feedback slew rate control
    73.
    发明申请
    Output driver with feedback slew rate control 审中-公开
    具有反馈压摆率控制的输出驱动器

    公开(公告)号：US20060158224A1

    公开(公告)日：2006-07-20

    申请号：US11075085

    申请日：2005-03-08

    申请人： Luo Yan-Bin

    发明人： Luo Yan-Bin

    IPC分类号： H03K19/094

    CPC分类号： H03K17/167

    摘要： An output driver circuit comprises a primary output driver and a secondary output driver, where the primary and secondary output drivers have outputs at an output terminal and inputs at an input terminal. A slew rate control circuit is provided for disabling the secondary output driver in response to a signal at the output terminal

    摘要翻译： 输出驱动器电路包括主输出驱动器和辅助输出驱动器，其中主输出驱动器和次输出驱动器在输出端子处具有输出并在输入端子处输入。 提供了一个转换速率控制电路，用于响应于输出端的信号使二次输出驱动器无效

    Circuit for controlling leakage
    74.
    发明授权
    Circuit for controlling leakage 有权

    公开(公告)号：US07061265B2

    公开(公告)日：2006-06-13

    申请号：US10916980

    申请日：2004-08-12

    申请人： Hung C. Ngo ,  Jente B. Kuang ,  Kevin J. Nowka

    发明人： Hung C. Ngo ,  Jente B. Kuang ,  Kevin J. Nowka

    IPC分类号： H03K19/03

    CPC分类号： H03K17/167 ,  H03K19/0016

    摘要： Leakage current in logic circuitry is managed by coupling and decoupling the voltage potentials of the power supply from circuitry with large high leakage devices. Driver circuits comprise a low leakage logic path for holding logic states of the output. A high leakage logic path in parallel with the low leakage logic path is used to assert each logic state in the forward direction from input to output. The large output device in each high leakage path that enhances the current drive of a logic state on the output are leakage stress relieved by allowing their drive inputs to collapse after the output logic state has been asserted. The high leakage logic paths employ multiple stages with collapsing logic states that are generated in response to asserted logic states on the output and logic states of the low leakage logic path thus reducing the device sizes needed to control leakage.

    Adaptive multi-mode system and method
    76.
    发明授权
    Adaptive multi-mode system and method 有权
    自适应多模式系统和方法

    公开(公告)号：US07009372B2

    公开(公告)日：2006-03-07

    申请号：US10811430

    申请日：2004-03-26

    申请人： Sehat Sutardja ,  Runsheng He ,  Jiancheng Zhang

    发明人： Sehat Sutardja ,  Runsheng He ,  Jiancheng Zhang

    IPC分类号： G05F1/40

    CPC分类号： H02M3/157 ,  H02M1/088 ,  H02M1/38 ,  H02M3/158 ,  H02M3/1588 ,  H02M2001/0009 ,  H02M2001/0012 ,  H02M2001/0025 ,  H02M2001/0048 ,  H03K5/1565 ,  H03K17/122 ,  H03K17/167 ,  H03K17/6871 ,  Y02B70/1466 ,  Y02B70/1491

    摘要： A control system to control an output regulator. The output regulator to convert an input voltage to a regulated output. The output regulator including a power stage to generate a power output from the input voltage and an output filter to filter the power output to generate the regulated output. A digital controller, responsive to a sense signal corresponding to the regulated output, to generate a drive signal to control the power stage. The digital controller including and selecting between at least three operating modes, a selected one of the operating modes to generate the drive signal

    摘要翻译： 用于控制输出调节器的控制系统。 输出稳压器将输入电压转换为稳压输出。 输出调节器包括产生从输入电压输出的功率级和输出滤波器，以过滤功率输出以产生调节输出。 响应于与调节输出对应的感测信号的数字控制器产生驱动信号以控制功率级。 数字控制器包括并在至少三种操作模式之间选择所选择的一种操作模式以产生驱动信号

    Current driver circuit
    77.
    发明授权
    Current driver circuit 失效
    电流驱动电路

    公开(公告)号：US06977525B2

    公开(公告)日：2005-12-20

    申请号：US10701500

    申请日：2003-11-06

    申请人： Yoshihide Komatsu

    发明人： Yoshihide Komatsu

    IPC分类号： H03K19/017 ,  H03K17/14 ,  H03K17/16 ,  H04L25/02 ,  H03K19/0175

    CPC分类号： H04L25/028 ,  H03K17/145 ,  H03K17/167 ,  H04L25/0276

    摘要： A current driver circuit has a current driver and a current compensation circuit. The current driver has a current source transistor connected to a power source potential level, while it is coupled to a pair of transmission lines. The current compensation circuit is coupled to the output side of the current source transistor for the compensation of an output current from the current driver in response to a common mode potential of the pair of transmission lines.

    摘要翻译： 电流驱动器电路具有电流驱动器和电流补偿电路。 电流驱动器具有连接到电源电位电平的电流源晶体管，同时耦合到一对传输线。 电流补偿电路耦合到电流源晶体管的输出侧，用于响应于该对传输线的共模电位补偿来自电流驱动器的输出电流。

    Bi-directional interface and communication link
    78.
    发明授权
    Bi-directional interface and communication link 有权
    双向接口和通信链路

    公开(公告)号：US06963218B1

    公开(公告)日：2005-11-08

    申请号：US10215924

    申请日：2002-08-09

    申请人： Mark A. Alexander ,  Austin H. Lesea

    发明人： Mark A. Alexander ,  Austin H. Lesea

    IPC分类号： H03K17/16 ,  H03K19/00 ,  H03K19/0185 ,  H04L5/16 ,  H04L25/02

    CPC分类号： H04L5/16 ,  H03K17/167 ,  H03K19/0005 ,  H03K19/018592 ,  H04L25/0278

    摘要： Method and apparatus for a bi-direction interface and communication link are described. More particularly, an input/output block is formed with a digitally controlled impedance output driver output coupled at an input/output node to an input terminal of a differential amplifier. Another terminal of the differential amplifier is used for inputting a reference voltage. As the digitally controlled impedance output buffer may be adjusted for impedance matching with transmission line impedance, no parallel terminating resistance is needed. Accordingly, two such input/output blocks may be coupled to form a bi-directional communication link with the advantage of an absence of parallel termination resistance at inputs to such input/output blocks.

    摘要翻译： 描述了用于双向接口和通信链路的方法和装置。 更具体地，输入/输出块形成有数字控制的阻抗输出驱动器输出，其在输入/输出节点耦合到差分放大器的输入端。 差分放大器的另一个端子用于输入参考电压。 由于数字控制的阻抗输出缓冲器可能被调整以用于与传输线路阻抗的阻抗匹配，因此不需要并联终端电阻。 因此，可以将两个这样的输入/输出块耦合以形成双向通信链路，其优点在于在这种输入/输出块的输入处不存在并行终端电阻。

    Power switch structure with low RDSon and low current limit
    79.
    发明授权
    Power switch structure with low RDSon and low current limit 有权
    电源开关结构具有低RDSon和低电流限制

    公开(公告)号：US06949961B2

    公开(公告)日：2005-09-27

    申请号：US10678769

    申请日：2003-10-06

    申请人： Stephen P. Robb ,  David K. Briggs

    发明人： Stephen P. Robb ,  David K. Briggs

    IPC分类号： H02H9/00 ,  H03K17/082 ,  H03K17/16 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

    CPC分类号： H03K17/0822 ,  H02H9/004 ,  H03K17/167

    摘要： In one embodiment, a power switch device (33) includes a first MOSFET device 41 and a second MOSFET device (42). A split gate structure (84) including a first gate electrode (48,87) controls the first MOSFET device (41). A second gate electrode (49,92) controls the second MOSFET device (42). A current limit device (38) is coupled to the first gate electrode (48,97) to turn on the first MOSFET device during a current limit mode. A comparator device (36) is coupled to the second gate electrode (49,92) to turn on the second MOSFET device (42) when the power switch device (33) is no longer in current limit mode.

    摘要翻译： 在一个实施例中，功率开关器件（33）包括第一MOSFET器件41和第二MOSFET器件（42）。 包括第一栅极（48,87）的分离栅极结构（84）控制第一MOSFET器件（41）。 第二栅电极（49,92）控制第二MOSFET器件（42）。 电流限制装置（38）耦合到第一栅电极（48,97），以在电流限制模式期间导通第一MOSFET器件。 当电源开关装置（33）不再处于限流模式时，比较器装置（36）耦合到第二栅电极（49,92）以接通第二MOSFET装置（42）。