PRESSURE SENSOR WITH TESTING DEVICE AND RELATED METHODS
    881.
    发明申请
    PRESSURE SENSOR WITH TESTING DEVICE AND RELATED METHODS 有权
    带测试装置的压力传感器及相关方法

    公开(公告)号:US20160103035A1

    公开(公告)日:2016-04-14

    申请号:US14511346

    申请日:2014-10-10

    Inventor: Alberto Pagani

    CPC classification number: G01L25/00 G01L1/16 G01L1/2206 G01L1/26

    Abstract: A pressure sensor is for positioning within a structure. The pressure sensor may include a pressure sensor integrated circuit (IC) having a pressure sensor circuit responsive to bending, and a transceiver circuit coupled to the pressure sensor circuit. The pressure sensor may include a support body having a recess therein coupled to the pressure sensor IC so that the pressure sensor IC bends into the recess when the pressure sensor IC is subjected to external pressure.

    Abstract translation: 压力传感器用于在结构内定位。 压力传感器可以包括具有响应于弯曲的压力传感器电路的压力传感器集成电路(IC)和耦合到压力传感器电路的收发器电路。 压力传感器可以包括其中具有凹部的支撑体,其联接到压力传感器IC,使得当压力传感器IC受到外部压力时,压力传感器IC弯曲到凹部中。

    Bi-synchronous electronic device and FIFO memory circuit with jump candidates and related methods
    883.
    发明授权
    Bi-synchronous electronic device and FIFO memory circuit with jump candidates and related methods 有权
    双同步电子设备和具有跳转候选和FIFO相关方法的FIFO存储器电路

    公开(公告)号:US09311975B1

    公开(公告)日:2016-04-12

    申请号:US14508321

    申请日:2014-10-07

    CPC classification number: G11C7/222 G06F5/06 G06F5/10 G06F2205/102

    Abstract: A bi-synchronous electronic device may include a FIFO memory circuit, and a first digital circuit coupled to the FIFO memory circuit and configured to operate based upon a first clock signal, and write to the FIFO memory circuit based upon a write pointer. The bi-synchronous electronic device may include second digital circuit coupled to the FIFO memory circuit and configured to operate based upon a second clock signal different from the first clock signal, and read from the FIFO memory circuit based upon a read pointer. The FIFO memory circuit may be configured to detect a jump in the write pointer to a new position, determine jump candidates for the read pointer from a current position, select a jump candidate, and synchronize the read pointer based upon the selected jump candidate.

    Abstract translation: 双同步电子设备可以包括FIFO存储器电路和耦合到FIFO存储器电路并被配置为基于第一时钟信号进行操作的第一数字电路,并且基于写指针写入FIFO存储器电路。 双同步电子设备可以包括耦合到FIFO存储器电路并被配置为基于与第一时钟信号不同的第二时钟信号进行操作的第二数字电路,并且基于读指针从FIFO存储器电路读取。 FIFO存储器电路可以被配置为检测写指针中的跳转到新位置,从当前位置确定读指针的跳转候选,选择跳转候选,并且基于所选择的跳转候选来同步读指针。

    SYSTEM FOR GENERATING A CALIBRATION SIGNAL, RELATED TRANSCEIVER AND METHOD
    884.
    发明申请
    SYSTEM FOR GENERATING A CALIBRATION SIGNAL, RELATED TRANSCEIVER AND METHOD 有权
    用于产生校准信号,相关收发器和方法的系统

    公开(公告)号:US20160094378A1

    公开(公告)日:2016-03-31

    申请号:US14829775

    申请日:2015-08-19

    Abstract: A calibration signal is generated from a modulating signal having a first frequency and a carrier signal having a second frequency. A single-sideband mixer modulates the modulating signal on the carrier signal. At least two frequency dividers by two connected in cascade receive the modulating signal modulated on the carrier signal and generate an output of the calibration signal.

    Abstract translation: 从具有第一频率的调制信号和具有第二频率的载波信号产生校准信号。 单边带混频器调制载波信号上的调制信号。 串联连接的至少两个分频器接收在载波信号上调制的调制信号,并产生校准信号的输出。

    DRIVER DEVICE FOR TRANSISTORS, AND CORRESPONDING INTEGRATED CIRCUIT
    885.
    发明申请
    DRIVER DEVICE FOR TRANSISTORS, AND CORRESPONDING INTEGRATED CIRCUIT 有权
    用于晶体管的驱动器件和相应的集成电路

    公开(公告)号:US20160094210A1

    公开(公告)日:2016-03-31

    申请号:US14797571

    申请日:2015-07-13

    Abstract: A driver device is for switching on and off a transistor for supplying a load by driving a control electrode of the transistor. The driver device includes a first terminal connected to the control electrode of the transistor, a second terminal connected between the transistor and the load, and a current-discharge path coupled to the first terminal. The current-discharge path includes a diode and is activated when the transistor is switched off. The diode becomes non-conductive to interrupt the current-discharge path when the voltage on the second terminal reaches a threshold value.

    Abstract translation: 驱动器件用于通过驱动晶体管的控制电极来接通和关断用于提供负载的晶体管。 驱动器件包括连接到晶体管的控制电极的第一端子,连接在晶体管和负载之间的第二端子以及耦合到第一端子的电流 - 放电路径。 电流放电路径包括二极管,并且当晶体管关断时被激活。 当第二端子上的电压达到阈值时,二极管变得不导通以中断电流 - 放电路径。

    Method of acquiring CDMA-modulated satellite signals and receiving apparatus implementing the method
    886.
    发明授权
    Method of acquiring CDMA-modulated satellite signals and receiving apparatus implementing the method 有权
    获取CDMA调制卫星信号的方法和实现该方法的接收装置

    公开(公告)号:US09297905B2

    公开(公告)日:2016-03-29

    申请号:US13719798

    申请日:2012-12-19

    CPC classification number: G01S19/30 G01S19/29

    Abstract: A method of acquiring a satellite signal includes providing a CDMA-modulated signal, defining a first search frequency interval and a first reception sensitivity, and performing a first acquisition of the modulated signal according to the first sensitivity and the first frequency interval in order to provide an acquisition or failed acquisition result. In case of a failed acquisition, performing a second acquisition of the modulated signal as a function of a second search frequency interval, narrower than the first frequency interval, and a second reception sensitivity, greater than the first sensitivity and depending on a power of a side lobe of the modulated signal.

    Abstract translation: 获取卫星信号的方法包括提供定义第一搜索频率间隔和第一接收灵敏度的CDMA调制信号,以及根据第一灵敏度和第一频率间隔执行调制信号的第一次采集,以便提供 收购或失败的收购结果。 在失败的获取的情况下,执行调制信号的第二次获取作为比第一频率间隔窄的第二搜索频率间隔的函数,以及大于第一灵敏度的第二接收灵敏度,并且取决于 调制信号的旁瓣。

    METHOD FOR CONTROLLING A MULTIPHASE INTERLEAVING CONVERTER AND CORRESPONDING CONTROLLER
    887.
    发明申请
    METHOD FOR CONTROLLING A MULTIPHASE INTERLEAVING CONVERTER AND CORRESPONDING CONTROLLER 有权
    用于控制多相互换转换器和相应控制器的方法

    公开(公告)号:US20160087527A1

    公开(公告)日:2016-03-24

    申请号:US14954798

    申请日:2015-11-30

    CPC classification number: H02M3/156 H02M3/1584

    Abstract: A method is provided for controlling a converter of the multiphase interleaving type. According to the method, there is detected when a change of the load applied to an output terminal of the converter occurs. All the phases of the converter are simultaneously turned off, and a driving interleaving phase shift is recovered so as to restart a normal operation of the converter. A controller for carrying out such a method is also provided.

    Abstract translation: 提供了一种用于控制多相交错类型的转换器的方法。 根据该方法,检测何时发生施加到转换器的输出端子的负载变化。 转换器的所有相同时关断,并且恢复驱动交错相移,以重新开始转换器的正常操作。 还提供了一种用于执行这种方法的控制器。

    LDMOS POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME
    888.
    发明申请
    LDMOS POWER SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME 审中-公开
    LDMOS功率半导体器件及其制造方法

    公开(公告)号:US20160087084A1

    公开(公告)日:2016-03-24

    申请号:US14964130

    申请日:2015-12-09

    Abstract: Methods form an electronic semiconductor device that includes a body having a first side and a second side opposite to one another and including a first structural region facing the second side, and a second structural region extending over the first structural region and facing the first side. A body region extends in the second structural region at the first side. A source region extends inside the body region and a lightly-doped drain region faces the first side of the body. A gate electrode is formed over the body region. A trench dielectric region extends through the second structural region in a first trench conductive region immediately adjacent to the trench dielectric region. A second trench conductive region is in electrical contact with the body region and source region. An electrical contact on the body is in electrical contact with the drain region through the first structural region.

    Abstract translation: 方法形成电子半导体器件,其包括具有彼此相对的第一侧和第二侧的主体,并且包括面向第二侧的第一结构区域和在第一结构区域上延伸并面向第一侧面的第二结构区域。 身体区域在第一侧的第二结构区域中延伸。 源极区域在体区内延伸,并且轻掺杂的漏极区域面向身体的第一侧。 在主体区域上形成栅电极。 沟槽电介质区域在与沟槽电介质区域紧邻的第一沟槽导电区域中延伸穿过第二结构区域。 第二沟槽导电区域与身体区域和源区域电接触。 身体上的电接触通过第一结构区域与漏区电接触。

    INTEGRATED VERTICAL TRENCH MOS TRANSISTOR
    890.
    发明申请
    INTEGRATED VERTICAL TRENCH MOS TRANSISTOR 审中-公开
    集成垂直三通MOS晶体管

    公开(公告)号:US20160087080A1

    公开(公告)日:2016-03-24

    申请号:US14949528

    申请日:2015-11-23

    Abstract: A VTMOS transistor in semiconductor material of a first type of conductivity includes a body region of a second type of conductivity and a source region of the first type of conductivity. A gate region extends into the main surface through the body region and is insulated from the semiconductor material. A region of the gate region extends onto the main surface is insulated from the rest of the gate region. An anode region of the first type of conductivity is formed into said insulated region, and a cathode region of the second type of conductivity is formed into said insulated region in contact with the anode region; the anode region and the cathode region define a thermal diode electrically insulated from the chip.

    Abstract translation: 第一导电类型的半导体材料中的VTMOS晶体管包括第二导电类型的体区和第一类导电性的源区。 栅极区域通过主体区域延伸到主表面并与半导体材料绝缘。 延伸到主表面上的栅极区域的区域与栅极区域的其余部分绝缘。 第一导电类型的阳极区域形成在所述绝缘区域中,并且第二导电类型的阴极区域形成为与阳极区域接触的所述绝缘区域; 阳极区域和阴极区域限定与芯片电绝缘的热二极管。

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