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    Resistive Memory Cells and Devices Having Asymmetrical Contacts
    81.
    发明申请
    Resistive Memory Cells and Devices Having Asymmetrical Contacts 有权
    具有不对称触点的电阻式存储单元和器件

    公开(公告)号：US20130240826A1

    公开(公告)日：2013-09-19

    申请号：US13862918

    申请日：2013-04-15

    Applicant: In-Gyu Baek ,  Moon-Sook Lee ,  Dong-Chul Kim

    Inventor： In-Gyu Baek ,  Moon-Sook Lee ,  Dong-Chul Kim

    IPC: H01L45/00

    CPC classification number: H01L45/04 ,  G11C11/161 ,  G11C11/1659 ,  G11C13/0007 ,  G11C2213/52 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2472 ,  H01L27/2481 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147

    Abstract: A memory cell includes a plug-type first electrode in a substrate, a magneto-resistive memory element disposed on the first electrode, and a second electrode disposed on the magneto-resistive memory element opposite the first electrode. The second electrode has an area of overlap with the magneto-resistive memory element that is greater than an area of overlap of the first electrode and the magneto-resistive memory element. The first surface may, for example, be substantially circular and have a diameter less than a minimum planar dimension (e.g., width) of the second surface. The magneto-resistive memory element may include a colossal magneto-resistive material, such as an insulating material with a perovskite phase and/or a transition metal oxide.

    Abstract translation: 存储单元包括衬底中的插塞式第一电极，设置在第一电极上的磁阻存储元件，以及设置在与第一电极相对的磁阻存储元件上的第二电极。 第二电极具有与磁阻存储元件重叠的区域，其大于第一电极和磁阻存储元件的重叠区域。 例如，第一表面可以是基本上圆形的并且具有小于第二表面的最小平面尺寸（例如，宽度）的直径。 磁阻存储元件可以包括巨磁阻材料，例如具有钙钛矿相和/或过渡金属氧化物的绝缘材料。

    RESISTIVE MEMORY
    84.
    发明申请
    RESISTIVE MEMORY 有权
    电阻记忆

    公开(公告)号：US20120020142A1

    公开(公告)日：2012-01-26

    申请号：US13184795

    申请日：2011-07-18

    Applicant: Hak Soo Yu ,  In Gyu Baek ,  Hong Sun Hwang ,  Su A. Kim ,  Mu Jin Seo

    Inventor： Hak Soo Yu ,  In Gyu Baek ,  Hong Sun Hwang ,  Su A. Kim ,  Mu Jin Seo

    IPC: G11C11/00

    CPC classification number: G11C8/14 ,  G11C8/10 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0023 ,  G11C13/0026 ,  G11C13/0028 ,  G11C2213/71

    Abstract: Provided is a semiconductor resistive memory device. The resistive memory device includes a plurality of unit cells. A source line and a data input/output line of the unit cells may be selectively connected to have a substantially same voltage level for equalization when the unit cells are in inactive or unselected state. The equalization may decrease current consumption and protect write error, and protect leakage current.

    Abstract translation: 提供了半导体电阻式存储器件。 电阻式存储器件包括多个单元电池。 单位单元的源极线和数据输入/输出线可以被选择性地连接以具有基本上相同的电压电平以用于在单位电池处于非活动状态或未选择状态时进行均衡。 均衡可能会降低电流消耗并保护写入错误，并保护漏电流。

    SEMICONDUCTOR MEMORY DEVICE
    85.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权
    半导体存储器件

    公开(公告)号：US20110305100A1

    公开(公告)日：2011-12-15

    申请号：US13152316

    申请日：2011-06-03

    Applicant: Hak-soo YU ,  In-gyu BAEK ,  Hong-sun Hwang ,  Young-kug MOON

    Inventor： Hak-soo YU ,  In-gyu BAEK ,  Hong-sun Hwang ,  Young-kug MOON

    IPC: G11C5/14

    CPC classification number: G11C5/063 ,  G11C5/025

    Abstract: A semiconductor memory device including a plurality of layers each including a memory cell array and which are stacked over each other; and at least one power plane for supplying power to the layers. The power plane includes a region to which a power voltage is applied and a region to which a ground voltage is applied. The region to which a power voltage is applied is located adjacent to the region to which a ground voltage is applied, and forms a decoupling capacitor therebetween to decouple an influx of power noise to the layers or generation of power noise in the layers

    Abstract translation: 一种半导体存储器件，包括多个层，每个层包括存储单元阵列并彼此堆叠; 以及用于向层供电的至少一个电力平面。 电力平面包括施加电源电压的区域和施加接地电压的区域。 施加电源电压的区域位于与施加接地电压的区域相邻的位置处，并且在其间形成去耦电容器以将功率噪声流入到层中或在层中产生功率噪声

    RESISTIVE MEMORY CELLS AND DEVICES HAVING ASYMMETRICAL CONTACTS
    86.
    发明申请
    RESISTIVE MEMORY CELLS AND DEVICES HAVING ASYMMETRICAL CONTACTS 审中-公开
    电阻记忆体和具有不对称接触的装置

    公开(公告)号：US20110204314A1

    公开(公告)日：2011-08-25

    申请号：US13100702

    申请日：2011-05-04

    Applicant: In-Gyu Baek ,  Moon-Sook Lee ,  Dong-Chul Kim

    Inventor： In-Gyu Baek ,  Moon-Sook Lee ,  Dong-Chul Kim

    IPC: H01L45/00

    CPC classification number: H01L45/04 ,  G11C11/161 ,  G11C11/1659 ,  G11C13/0007 ,  G11C2213/52 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2472 ,  H01L27/2481 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147

    Abstract: A memory cell includes a plug-type first electrode in a substrate, a magneto-resistive memory element disposed on the first electrode, and a second electrode disposed on the magneto-resistive memory element opposite the first electrode. The second electrode has an area of overlap with the magneto-resistive memory element that is greater than an area of overlap of the first electrode and the magneto-resistive memory element. The first surface may, for example, be substantially circular and have a diameter less than a minimum planar dimension (e.g., width) of the second surface. The magneto-resistive memory element may include a colossal magneto-resistive material, such as an insulating material with a perovskite phase and/or a transition metal oxide.

    Abstract translation: 存储单元包括衬底中的插塞式第一电极，设置在第一电极上的磁阻存储元件，以及设置在与第一电极相对的磁阻存储元件上的第二电极。 第二电极具有与磁阻存储元件重叠的区域，其大于第一电极和磁阻存储元件的重叠区域。 例如，第一表面可以是基本上圆形的并且具有小于第二表面的最小平面尺寸（例如，宽度）的直径。 磁阻存储元件可以包括巨磁阻材料，例如具有钙钛矿相和/或过渡金属氧化物的绝缘材料。

    Resistive memory cells and devices having asymmetrical contacts
    87.
    发明授权
    Resistive memory cells and devices having asymmetrical contacts 有权
    具有不对称触点的电阻式存储单元和器件

    公开(公告)号：US07961496B2

    公开(公告)日：2011-06-14

    申请号：US12612187

    申请日：2009-11-04

    Applicant: In-Gyu Baek ,  Moon-Sook Lee ,  Dong-Chul Kim

    Inventor： In-Gyu Baek ,  Moon-Sook Lee ,  Dong-Chul Kim

    IPC: G11C11/00

    CPC classification number: H01L45/04 ,  G11C11/161 ,  G11C11/1659 ,  G11C13/0007 ,  G11C2213/52 ,  H01L27/2409 ,  H01L27/2436 ,  H01L27/2472 ,  H01L27/2481 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147

    Abstract: A memory cell includes a plug-type first electrode in a substrate, a magneto-resistive memory element disposed on the first electrode, and a second electrode disposed on the magneto-resistive memory element opposite the first electrode. The second electrode has an area of overlap with the magneto-resistive memory element that is greater than an area of overlap of the first electrode and the magneto-resistive memory element. The first surface may, for example, be substantially circular and have a diameter less than a minimum planar dimension (e.g., width) of the second surface. The magneto-resistive memory element may include a colossal magneto-resistive material, such as an insulating material with a perovskite phase and/or a transition metal oxide.

    Abstract translation: 存储单元包括衬底中的插塞式第一电极，设置在第一电极上的磁阻存储元件，以及设置在与第一电极相对的磁阻存储元件上的第二电极。 第二电极具有与磁阻存储元件重叠的区域，其大于第一电极和磁阻存储元件的重叠区域。 例如，第一表面可以是基本上圆形的并且具有小于第二表面的最小平面尺寸（例如，宽度）的直径。 磁阻存储元件可以包括巨磁阻材料，例如具有钙钛矿相和/或过渡金属氧化物的绝缘材料。

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