公开(公告)号：US20080152260A1

公开(公告)日：2008-06-26

申请号：US11956655

申请日：2007-12-14

申请人： Long Cheng ,  Xing Fang ,  Sheng Lu ,  Qing Bo Wang ,  Meng Ye

发明人： Long Cheng ,  Xing Fang ,  Sheng Lu ,  Qing Bo Wang ,  Meng Ye

IPC分类号： G06K9/36

CPC分类号： G06F17/30905

摘要： In computer multimedia technology, a system, method and computer program product for optimizing images and transmission of images of a web-page transmitted over the Internet and furthermore, optimizing images of a web page on a network server. The method includes detecting the images in the web page to determine the relationship among the images; in response to the determination of the relationship among the images, combining two or more related images into a combinational image; and updating the web page to replace references to the related images with a reference to the combinational image. By optimizing web page images, the server's work required for handling heavy amount of HTTP requests in transmitting the web page images is decreased and the bandwidth requirement for transmitting the web page images is reduced. The quality of the original image is not lowered. And there is no need to make any change to the operation at the client side.

摘要翻译： 在计算机多媒体技术中，一种用于优化通过因特网传输的网页的图像和图像传输的系统，方法和计算机程序产品，此外，优化网络服务器上的网页的图像。 该方法包括检测网页中的图像以确定图像之间的关系; 响应于确定图像之间的关系，将两个或更多个相关图像组合成组合图像; 并且通过参考组合图像来更新网页以替换对相关图像的引用。 通过优化网页图像，服务器在传输网页图像时处理大量HTTP请求所需的工作减少，并减少了传送网页图像的带宽需求。 原始图像的质量不会降低。 而客户端的操作无需改动。

公开(公告)号：US07364957B2

公开(公告)日：2008-04-29

申请号：US11490012

申请日：2006-07-20

申请人： Kong-Beng Thei ,  Chung Long Cheng ,  Harry Chuang

发明人： Kong-Beng Thei ,  Chung Long Cheng ,  Harry Chuang

IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/8238 ,  H01L21/331

CPC分类号： H01L21/26586 ,  H01L21/26506 ,  H01L21/26513 ,  H01L29/105 ,  H01L29/1083 ,  H01L29/41766 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7843

摘要： A semiconductor device with improved source/drain junctions and methods for fabricating the device are disclosed. A preferred embodiment comprises a MOS transistor with a gate structure overlying a substrate, lightly doped source/drain regions formed in the substrate aligned to the gate structure, sidewall spacers formed on the sidewalls of the gate structure and overlying the lightly doped source/drain regions, deeper source/drain diffusions formed into the substrate aligned to the sidewall spacers and additional pocket implants of source/drain dopants formed at the boundary of the deeper source/drain diffusions and the substrate. In a preferred method, the additional pocket implants are formed using an angled ion implant with the angle being between 4 and 45 degrees from vertical. Additional embodiments include recesses formed in the source/drain regions and methods for forming the recesses.

公开(公告)号：US07332756B2

公开(公告)日：2008-02-19

申请号：US11285524

申请日：2005-11-21

申请人： Chung Long Cheng ,  Kong-Beng Thei ,  Harry Haklay Chuang

发明人： Chung Long Cheng ,  Kong-Beng Thei ,  Harry Haklay Chuang

IPC分类号： H01L29/76 ,  H01L29/66 ,  H01L21/8234 ,  H01L21/70

CPC分类号： H01L27/0629 ,  H01L29/66553 ,  H01L29/66583 ,  H01L29/78

摘要： A semiconductor structure having a damascene gate structure and a resistive device on a semiconductor substrate is disclosed. The structure includes a first dielectric layer having a first opening and a second opening formed on the semiconductor substrate, and one or more sidewall spacers formed on inner sides of the first opening, in which a portion of the semiconductor substrate is exposed. In addition, the structure includes a coating layer formed on inner sides and a bottom surface of the second opening, a damascene gate structure surrounded by the sidewall spacers formed in the first opening, and a resistive device formed on the coating layer in the second opening.

摘要翻译： 公开了一种在半导体衬底上具有镶嵌栅极结构和电阻器件的半导体结构。 该结构包括具有形成在半导体衬底上的第一开口和第二开口的第一电介质层，以及形成在第一开口的内侧上的一个或多个侧壁间隔物，半导体衬底的一部分露出。 此外，该结构包括形成在第二开口的内侧和底面上的涂层，由形成在第一开口中的侧壁隔离物包围的镶嵌栅极结构，以及形成在第二开口中的涂层上的电阻元件 。

公开(公告)号：US20080001188A1

公开(公告)日：2008-01-03

申请号：US11477953

申请日：2006-06-30

申请人： Chung-Long Cheng ,  Kong-Beng Thei ,  Sheng-Chen Chung ,  Tzung-Chi Lee ,  Harry Chuang

发明人： Chung-Long Cheng ,  Kong-Beng Thei ,  Sheng-Chen Chung ,  Tzung-Chi Lee ,  Harry Chuang

IPC分类号： H01L29/76 ,  H01L21/8234

CPC分类号： H01L21/84 ,  H01L27/1203 ,  H01L29/4238 ,  H01L29/78636

摘要： Silicon on insulator (SOI) devices and methods for fabricating the same are provided. An exemplary embodiment of a SOI device comprises a substrate. A first insulating layer is formed over the substrate. A plurality of semiconductor islands is formed over the first insulating layer, wherein the semiconductor islands are isolated from each other. A second insulating layer is formed over the first insulating layer, protruding over the semiconductor islands and surrounding thereof. At least one recess is formed in a portion of the second insulating layer adjacent to a pair of the semiconductor islands. A first dielectric layer is formed on a portion of each of the semiconductor islands. A conductive layer is formed over the first dielectric layer and over the second insulating layer exposed by the recess. A pair of source/drain regions is oppositely formed in portions of each of the semiconductor islands not covered by the first dielectric layer and the conductive layer.

摘要翻译： 提供绝缘体上硅（SOI）器件及其制造方法。 SOI器件的示例性实施例包括衬底。 在衬底上形成第一绝缘层。 在第一绝缘层上形成多个半导体岛，其中半导体岛彼此隔离。 在第一绝缘层上形成第二绝缘层，突出在半岛上并围绕它们。 在与一对半导体岛相邻的第二绝缘层的一部分中形成至少一个凹部。 第一电介质层形成在每个半导体岛的一部分上。 导电层形成在第一电介质层之上，并在由凹部露出的第二绝缘层之上。 一对源极/漏极区域相对地形成在未被第一介电层和导电层覆盖的半导体岛的每一个的部分中。

公开(公告)号：US20060115947A1

公开(公告)日：2006-06-01

申请号：US11334974

申请日：2006-01-18

申请人： Chung-Long Cheng ,  Kong-Beng Thei

发明人： Chung-Long Cheng ,  Kong-Beng Thei

IPC分类号： H01L29/76 ,  H01L21/336

CPC分类号： H01L29/785 ,  H01L21/32139 ,  H01L29/42384 ,  H01L29/66795

摘要： A method for forming a FIN-FET device employs a blanket planarizing layer formed upon a blanket topographic gate electrode material layer. The blanket planarizing layer is patterned and employed as a mask layer for patterning the blanket topographic gate electrode material layer to form a gate electrode. Since the blanket planarizing layer is formed as a planarizing layer, a photoresist layer formed thereupon is formed with enhanced resolution. As a result, the gate electrode is also formed with enhanced resolution. A resulting FIN-FET structure has the patterned planarizing layer formed in an inverted “U” shape upon the gate electrode.

公开(公告)号：US20050260827A1

公开(公告)日：2005-11-24

申请号：US10850747

申请日：2004-05-20

申请人： Chung-Long Cheng ,  Kong-Beng Thei ,  Jung-Hui Kao

发明人： Chung-Long Cheng ,  Kong-Beng Thei ,  Jung-Hui Kao

IPC分类号： H01L21/306 ,  H01L21/31 ,  H01L21/316 ,  H01L21/469 ,  H01L21/76 ,  H01L21/762

CPC分类号： H01L21/02057 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/02304 ,  H01L21/02307 ,  H01L21/31662 ,  H01L21/76224

摘要： A method for cleaning and forming an oxide film on a surface, particularly a silicon surface. The surface is initially cleaned and then exposed to ozone vapor, which forms the oxide film on the surface. The method is particularly useful for forming a pre-liner oxide film on trench surfaces in the fabrication of STI (shallow trench isolation) structures.

摘要翻译： 一种在表面特别是硅表面上清洗和形成氧化膜的方法。 表面最初被清洁，然后暴露于臭氧蒸汽，这在表面上形成氧化膜。 该方法在STI（浅沟槽隔离）结构的制造中在沟槽表面上形成预衬垫氧化膜特别有用。

公开(公告)号：US20050258476A1

公开(公告)日：2005-11-24

申请号：US10851376

申请日：2004-05-21

申请人： Chung-Long Cheng ,  Kong-Beng Thei

发明人： Chung-Long Cheng ,  Kong-Beng Thei

IPC分类号： H01L21/3213 ,  H01L21/336 ,  H01L29/423 ,  H01L29/76 ,  H01L29/786

CPC分类号： H01L29/785 ,  H01L21/32139 ,  H01L29/42384 ,  H01L29/66795

摘要： A method for forming a FIN-FET device employs a blanket planarizing layer formed upon a blanket topographic gate electrode material layer. The blanket planarizing layer is patterned and employed as a mask layer for patterning the blanket topographic gate electrode material layer to form a gate electrode. Since the blanket planarizing layer is formed as a planarizing layer, a photoresist layer formed thereupon is formed with enhanced resolution. As a result, the gate electrode is also formed with enhanced resolution. A resulting FIN-FET structure has the patterned planarizing layer formed in an inverted “U” shape upon the gate electrode.

摘要翻译： 用于形成FIN-FET器件的方法使用形成在覆盖的地形栅电极材料层上的覆盖平坦化层。 图案化覆盖层平坦化层并用作掩模层，用于图案化覆盖层形成的栅电极材料层以形成栅电极。 由于覆盖平坦化层形成为平坦化层，所以在其上形成的光致抗蚀剂层以更高的分辨率形成。 结果，栅电极也形成了增强的分辨率。 所得到的FIN-FET结构具有在栅电极上以倒U形形成的图案化平坦化层。

公开(公告)号：US06737303B2

公开(公告)日：2004-05-18

申请号：US10301632

申请日：2002-11-22

申请人： Horng-Long Cheng ,  Wei-Yang Chou ,  Chai-Yuan Sheu ,  Yu-Wu Wang ,  Jia-Chong Ho ,  Chi-Chang Liao

发明人： Horng-Long Cheng ,  Wei-Yang Chou ,  Chai-Yuan Sheu ,  Yu-Wu Wang ,  Jia-Chong Ho ,  Chi-Chang Liao

IPC分类号： H01L2100

CPC分类号： H01L51/0545 ,  H01L51/0012 ,  H01L51/0541

摘要： A process for forming an organic semiconducting layer having molecular alignment. First, a photoalignment organic layer is formed on a substrate or A dielectric layer. Next, the photoalignment organic layer is irradiated by polarized light through a mask, such that the photoalignment organic layer becomes an orientation layer having molecular alignment. Finally, an organic semiconducting layer is formed on the orientation layer, such that the organic semiconducting layer aligns according to the alignment of the orientation layer to exhibit molecular alignment. The present invention can form an organic semiconducting layer with different molecular alignments in different regions over the same substrate by means of polarized light exposure through a mask.

摘要翻译： 一种形成具有分子取向性的有机半导体层的方法。 首先，在基板或电介质层上形成光电转换有机层。 接下来，通过掩模将偏光有机层照射，使得光取向有机层成为具有分子取向的取向层。 最后，在取向层上形成有机半导体层，使得有机半导体层根据取向层的取向对准以显示分子对准。 本发明可以通过通过掩模的偏光曝光在相同的衬底上形成在不同区域中具有不同分子对准的有机半导体层。

公开(公告)号：US5941493A

公开(公告)日：1999-08-24

申请号：US872152

申请日：1997-07-10

申请人： Yung-Long Cheng

发明人： Yung-Long Cheng

IPC分类号： F16M11/06 ,  F16M11/08 ,  A47G29/00

CPC分类号： F16M11/105 ,  Y10S248/923

摘要： A LCD support structure including an upright support having a holder frame at one side, the holder frame having a disk-like support face and at least one first sliding element raised from the support face, and a LCD mounted on the holder frame of the upright support, the LCD having at least one second sliding element raised from a back side thereof and respectively slidably coupled to the at least one first sliding element of the upright support, for permitting the LCD to be turned about a horizontal axis within a predetermined angle.

摘要翻译： 一种LCD支撑结构，包括一个立柱支架，其一侧具有支架框架，该支架框架具有一盘形支撑面和至少一个从该支撑面升起的第一滑动元件，以及一LCD装在该支架的支架框架上 所述液晶显示器具有至少一个第二滑动元件，所述至少一个第二滑动元件从其后侧升高并且分别可滑动地联接到所述直立支撑件的所述至少一个第一滑动元件，以允许所述LCD围绕预定角度的水平轴转动。

公开(公告)号：US09239592B1

公开(公告)日：2016-01-19

申请号：US14470952

申请日：2014-08-28

申请人： Yu-Wen Liu ,  Chin-Kuo Huang ,  Long-Cheng Chang ,  Hsien-Tang Liao ,  Yi-Ju Liao

发明人： Yu-Wen Liu ,  Chin-Kuo Huang ,  Long-Cheng Chang ,  Hsien-Tang Liao ,  Yi-Ju Liao

IPC分类号： G06F1/16

CPC分类号： G06F1/1632 ,  G06F1/1681

摘要： A docking station including fixing base and at least one latching module is provided. The latching module includes a latching element, a first restoring element, a stopping element, a second restoring element and a pushing element. The first restoring element is connected to the latching element and the fixing base and drives the latching element to latch a tablet device. The stopping element is coupled to the latching element and has a recess. The second restoring element is connected to the stopping element and the fixing base and drives the stopping element to stop the latching element. The pushing element is adapted to be pushed and inserted into the recess to drive the stopping element to move away from the latching element, and the tablet device is adapted to be released from the latching element by pushing the latching element after the stopping element moves away from the latching element.

摘要翻译： 提供了包括固定底座和至少一个闩锁模块的对接站。 闩锁模块包括闩锁元件，第一恢复元件，止动元件，第二恢复元件和推动元件。 第一恢复元件连接到锁定元件和固定底座并驱动闩锁元件以锁定平板装置。 止动元件联接到闩锁元件并且具有凹部。 第二恢复元件连接到止动元件和固定基座，并驱动止动元件以停止闩锁元件。 推动元件适于被推入并插入到凹部中以驱动止动元件远离闩锁元件移动，并且平板装置适于在止动元件移开之后通过推动闩锁元件而从闩锁元件释放 从锁定元件。