公开(公告)号：US20250087533A1

公开(公告)日：2025-03-13

申请号：US18619626

申请日：2024-03-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Hsing Tsai ,  Ya-Lien Lee ,  Chih-Han Tseng ,  Kuei-Wen Huang ,  Kuan-Hung Ho ,  Ming-Uei Hung ,  Chih-Cheng Kuo ,  Yi-An Lai ,  Wei-Ting Chen

IPC: H01L21/768 ,  H01L21/8234 ,  H01L23/522 ,  H01L29/66 ,  H01L29/78

Abstract: A method of forming a semiconductor device includes: forming a via in a first dielectric layer disposed over a substrate; forming a second dielectric layer over the first dielectric layer; forming an opening in the second dielectric layer, where the opening exposes an upper surface of the via; selectively forming a capping layer over the upper surface of the via, where the capping layer has a curved upper surface that extends above a first upper surface of the first dielectric layer distal from the substrate; after forming the capping layer, forming a barrier layer in the opening over the capping layer and along sidewalls of the second dielectric layer exposed by the opening; and filling the opening by forming an electrically conductive material over the barrier layer.

公开(公告)号：US20250085623A1

公开(公告)日：2025-03-13

申请号：US18404776

申请日：2024-01-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Pei-Cheng HSU ,  Huan-Ling LEE ,  Hsin-Chang LEE ,  Chin-Kun WANG

IPC: G03F1/62 ,  H01L21/027

Abstract: A pellicle comprising a pellicle membrane with improved stability to hydrogen plasma is provided. The pellicle membrane includes a network of a plurality of carbon nanotubes. At least one carbon nanotube of the plurality of carbon nanotubes is surrounded by a multilayer protective coating that includes a stress control layer and a hydrogen permeation barrier layer over the stress control layer. The stress control layer and the hydrogen permeation barrier layer independently include an Me-containing nitride or an Me-containing oxynitride with Me selected from the group consisting of Si, Ti, Y, Hf, Zr, Zn, Mo, Cr and combinations thereof. The Me-containing nitride or the Me-containing oxynitride in the stress control layer has a first Me concentration, and the Me-containing nitride or the Me-containing oxynitride in the hydrogen permeation barrier layer has a second Me concentration less than the first Me concentration.

公开(公告)号：US20250085472A1

公开(公告)日：2025-03-13

申请号：US18463710

申请日：2023-09-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Hua Yu ,  Chung-Hao Tsai ,  Chieh-Yen Chen

IPC: G02B6/12 ,  H01L23/00 ,  H01L23/48 ,  H01L25/16

Abstract: Optical devices are presented herein. In an embodiment, the optical devices comprise a first active layer of first optical components, a first metallization layer over the first active layer, a first capacitor located within the first metallization layer, a first bond layer over the first metallization layer, and a first semiconductor device bonded to the first bond layer.

公开(公告)号：US20250085215A1

公开(公告)日：2025-03-13

申请号：US18404762

申请日：2024-01-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tai-Yu CHEN ,  Hsiao-Lun CHANG ,  Shang-Chieh CHIEN

IPC: G01N21/31 ,  G01N21/95

Abstract: A method includes positioning a substrate in an optical path of a multiwavelength light source; generating a first detection result by exposing a first region of the substrate to a first light having a first wavelength band selected by the light source; and generating a second detection result by exposing a second region of the substrate to a second light having a second wavelength band selected by the multiwavelength light source. A system includes a multiwavelength light source including a light source and a wavelength selector in an optical path of light generated by the light source. The system further includes a spectrometer operable to measure a spectrum of a first light selected by the wavelength selector; a mask stage operable to position a mask in the optical path; and a controller operable to adjust a parameter of the multiwavelength light source responsive to the spectrum of the first light.

公开(公告)号：US12249640B2

公开(公告)日：2025-03-11

申请号：US18524417

申请日：2023-11-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sai-Hooi Yeong ,  Sheng-Chen Wang ,  Bo-Yu Lai ,  Ziwei Fang ,  Feng-Cheng Yang ,  Yen-Ming Chen

IPC: H01L29/78 ,  H01L21/225 ,  H01L21/265 ,  H01L29/165 ,  H01L29/66

Abstract: Doping techniques for fin-like field effect transistors (FinFETs) are disclosed herein. An exemplary method includes forming a fin structure, forming a doped amorphous layer over a portion of the fin structure, and performing a knock-on implantation process to drive a dopant from the doped amorphous layer into the portion of the fin structure, thereby forming a doped feature. The doped amorphous layer includes a non-crystalline form of a material. In some implementations, the knock-on implantation process crystallizes at least a portion of the doped amorphous layer, such that the portion of the doped amorphous layer becomes a part of the fin structure. In some implementations, the doped amorphous layer includes amorphous silicon, and the knock-on implantation process crystallizes a portion of the doped amorphous silicon layer.

公开(公告)号：US12249623B2

公开(公告)日：2025-03-11

申请号：US17447099

申请日：2021-09-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yu-Cheng Shen ,  Guan-Jie Shen

IPC: H01L29/423 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786

Abstract: The present disclosure describes a semiconductor device and methods for forming the same. The semiconductor device includes nanostructures on a substrate and a source/drain region in contact with the nanostructures. The semiconductor device also includes a gate structure that includes first and second portions. The first portion is formed between each nanostructure of nanostructures. The second portion is formed under the bottom-most nanostructure of the plurality of nanostructures and extends under a top surface of the substrate.

公开(公告)号：US12249604B2

公开(公告)日：2025-03-11

申请号：US18360416

申请日：2023-07-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. ,  NATIONAL TAIWAN UNIVERSITY

Inventor： Chih-Hsiung Huang ,  Chung-En Tsai ,  Chee-Wee Liu ,  Kun-Wa Kuok ,  Yi-Hsiu Hsiao

IPC: H01L29/40 ,  H01L21/28 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/49 ,  H01L29/66

Abstract: A semiconductor device includes a substrate, a gate stack, and epitaxy structures. The substrate has a P-type region. The gate stack is over the P-type region of the substrate and includes a gate dielectric layer, a bottom work function (WF) metal layer, a top WF metal layer, and a filling metal. The bottom WF metal layer is over the gate dielectric layer. The top WF metal layer is over and in contact with the bottom WF metal layer. Dipoles are formed between the top WF metal layer and the bottom WF metal layer, and the dipoles direct from the bottom WF metal layer to the top WF metal layer. The filling metal is over the top WF metal layer. The epitaxy structures are over the P-type region of the substrate and on opposite sides of the gate stack.

公开(公告)号：US12249542B2

公开(公告)日：2025-03-11

申请号：US18512682

申请日：2023-11-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chun-Hao Kung ,  Chih-Chieh Chang ,  Kao-Feng Liao ,  Hui-Chi Huang ,  Kei-Wei Chen

IPC: H01L21/768 ,  H01L21/02 ,  H01L29/66

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first metal layer over a substrate, forming a dielectric layer over the first metal layer. The method includes forming a trench in the dielectric layer, and performing a surface treatment process on a sidewall surface of the trench to form a hydrophobic layer. The hydrophobic layer is formed on a sidewall surface of the dielectric layer. The method further includes depositing a metal material in the trench and over the hydrophobic layer to form a via structure.

公开(公告)号：US12249493B2

公开(公告)日：2025-03-11

申请号：US18172563

申请日：2023-02-22

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Sheng-Chun Yang ,  Yi-Ming Lin ,  Po-Wei Liang ,  Chu-Han Hsieh ,  Chih-Lung Cheng ,  Po-Chih Huang

IPC: H01L21/67 ,  C23C16/455 ,  C23C16/46 ,  C23C16/505 ,  H01J37/32 ,  H01L21/683

Abstract: A method includes loading a wafer over a wafer chuck in a process chamber; performing a deposition process on the loaded wafer; supplying a fluid medium to a fluid guiding structure in the wafer chuck from a fluid inlet port on the wafer chuck, the fluid guiding structure comprising a plurality of arc-shaped channels fluidly communicated with each other; guiding the fluid medium from a first one of the arc-shaped channels of the fluid guiding structure to a second one of the arc-shaped channels of the fluid guiding structure. The second one of the arc-shaped channels of the fluid guiding structure is concentric with the first one of the arc-shaped channels of the fluid guiding structure from a top view.

公开(公告)号：US20250081523A1

公开(公告)日：2025-03-06

申请号：US18239283

申请日：2023-08-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Ming Lee ,  Shih-Chieh Wu ,  Po-Yu Huang ,  I-Wen Wu ,  Fu-Kai Yang ,  Mei-Yun Wang

IPC: H01L29/417 ,  H01L21/8238 ,  H01L23/528 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor die and the method of forming the same are provided. The semiconductor die includes a first interconnect structure, a second interconnect structure including a conductive feature, and a device layer between the first interconnect structure and the second interconnect structure. The device layer includes a semiconductor fin, a first gate structure on the semiconductor fin, a source/drain region adjacent the first gate structure, and a shared contact extending through the semiconductor fin to be electrically connected to the source/drain region and the first gate structure. The conductive feature contacts the shared contact.