公开(公告)号：US20050199949A1

公开(公告)日：2005-09-15

申请号：US10923472

申请日：2004-08-20

申请人： Robert Chau ,  Brian Dovle ,  Jack Kavalieros ,  Douglas Barlage ,  Suman Datta ,  Scott Hareland

发明人： Robert Chau ,  Brian Dovle ,  Jack Kavalieros ,  Douglas Barlage ,  Suman Datta ,  Scott Hareland

IPC分类号： H01L21/336 ,  H01L29/423 ,  H01L29/786 ,  H01L21/00 ,  H01L29/76

CPC分类号： H01L29/785 ,  B82Y10/00 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/1033 ,  H01L29/41791 ,  H01L29/42384 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/772 ,  H01L29/7854 ,  H01L29/78645 ,  H01L29/78696 ,  H01L51/0048 ,  H01L51/0554 ,  Y10S977/742 ,  Y10S977/842 ,  Y10S977/938

摘要： The present invention is a semiconductor device comprising a semiconductor body having a top surface and laterally opposite sidewalls formed on a substrate. A gate dielectric layer is formed on the top surface of the semiconductor body and on the laterally opposite sidewalls of the semiconductor body. A gate electrode is formed on the gate dielectric on the top surface of the semiconductor body and adjacent to the gate dielectric on the laterally opposite sidewalls of the semiconductor body.

公开(公告)号：US20050148136A1

公开(公告)日：2005-07-07

申请号：US10748559

申请日：2003-12-29

申请人： Justin Brask ,  Mark Doczy ,  Jack Kavalieros ,  Matthew Metz ,  Chris Barns ,  Uday Shah ,  Suman Datta ,  Christopher Thomas ,  Robert Chau

发明人： Justin Brask ,  Mark Doczy ,  Jack Kavalieros ,  Matthew Metz ,  Chris Barns ,  Uday Shah ,  Suman Datta ,  Christopher Thomas ,  Robert Chau

IPC分类号： H01L21/8238 ,  H01L23/48

CPC分类号： H01L21/28097 ,  H01L21/823835 ,  H01L21/823842 ,  H01L27/1203 ,  H01L29/4975 ,  H01L29/66545 ,  Y10S438/926

摘要： A semiconductor device and a method for forming it are described. The semiconductor device comprises a metal NMOS gate electrode that is formed on a first part of a substrate, and a silicide PMOS gate electrode that is formed on a second part of the substrate.

摘要翻译： 对半导体装置及其形成方法进行说明。 半导体器件包括形成在衬底的第一部分上的金属NMOS栅电极和形成在衬底的第二部分上的硅化物PMOS栅电极。

公开(公告)号：US20080087985A1

公开(公告)日：2008-04-17

申请号：US11998236

申请日：2007-11-29

申请人： Justin Brask ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Suman Datta ,  Uday Shah ,  Gilbert Dewey ,  Robert Chau

发明人： Justin Brask ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Suman Datta ,  Uday Shah ,  Gilbert Dewey ,  Robert Chau

IPC分类号： H01L23/58

CPC分类号： H01L21/0228 ,  H01L21/02052 ,  H01L21/02175 ,  H01L21/28167 ,  H01L21/3141 ,  H01L29/513 ,  H01L29/517 ,  H01L2924/0002 ,  H01L2924/00

摘要： A buffer layer and a high-k metal oxide dielectric may be formed over a smooth silicon substrate. The substrate smoothness may reduce column growth of the high-k metal oxide gate dielectric. The surface of the substrate may be saturated with hydroxyl terminations prior to deposition.

摘要翻译： 可以在平滑的硅衬底上形成缓冲层和高k金属氧化物电介质。 衬底平滑度可能降低高k金属氧化物栅极电介质的柱生长。 在沉积之前，衬底的表面可能被羟基终止物饱和。

公开(公告)号：US20070040227A1

公开(公告)日：2007-02-22

申请号：US11586791

申请日：2006-10-26

申请人： Suman Datta ,  Justin Brask ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Robert Chau

发明人： Suman Datta ,  Justin Brask ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Robert Chau

IPC分类号： H01L29/94

CPC分类号： H01L29/4983 ,  H01L21/28079 ,  H01L21/28114 ,  H01L21/28194 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/42376 ,  H01L29/495 ,  H01L29/4958 ,  H01L29/51 ,  H01L29/66545 ,  H01L29/66606

摘要： In a metal gate replacement process, a cup-shaped gate metal oxide dielectric may have vertical portions that may be exposed to a reduction reaction. As a result of the reduction reaction, the vertical portions may be converted to metal, which adds to the existing gate electrode. In some cases, removing the vertical dielectric portions reduces fringe capacitance and may also advantageously slightly increased underdiffusion without adding heat, in some embodiments.

摘要翻译： 在金属栅极更换工艺中，杯状栅极金属氧化物电介质可以具有可能暴露于还原反应的垂直部分。 作为还原反应的结果，垂直部分可以转化为金属，这增加了现有的栅电极。 在一些实施例中，在一些实施例中，去除垂直电介质部分减少了边缘电容，并且还可以有利地稍微增加向下扩散而不加热。

公开(公告)号：US20060286729A1

公开(公告)日：2006-12-21

申请号：US11159430

申请日：2005-06-21

申请人： Jack Kavalieros ,  Annalisa Cappellani ,  Justin Brask ,  Mark Doczy ,  Matthew Metz ,  Suman Datta ,  Chris Barns ,  Robert Chau

发明人： Jack Kavalieros ,  Annalisa Cappellani ,  Justin Brask ,  Mark Doczy ,  Matthew Metz ,  Suman Datta ,  Chris Barns ,  Robert Chau

IPC分类号： H01L21/338

CPC分类号： H01L29/66636 ,  H01L21/28079 ,  H01L29/495 ,  H01L29/66545 ,  H01L29/7834

摘要： A complementary metal oxide semiconductor integrated circuit may be formed with a PMOS device formed using a replacement metal gate and a raised source drain. The raised source drain may be formed of epitaxially deposited silicon germanium material that is doped p-type. The replacement metal gate process results in a metal gate electrode and may involve the-removal of a nitride etch stop layer.

公开(公告)号：US20060278941A1

公开(公告)日：2006-12-14

申请号：US11151528

申请日：2005-06-13

申请人： Matthew Metz ,  Suman Datta ,  Mark Doczy ,  Justin Brask ,  Jack Kavalieros ,  Robert Chau

发明人： Matthew Metz ,  Suman Datta ,  Mark Doczy ,  Justin Brask ,  Jack Kavalieros ,  Robert Chau

IPC分类号： H01L29/94

CPC分类号： H01L21/31691 ,  H01L21/02197 ,  H01L21/02269 ,  H01L21/02293 ,  H01L21/28079 ,  H01L21/28194 ,  H01L29/495 ,  H01L29/517

摘要： A semiconductor device is described. That semiconductor device comprises a high-k gate dielectric layer that is formed on a substrate that applies strain to the high-k gate dielectric layer, and a metal gate electrode that is formed on the high-k gate dielectric layer.

公开(公告)号：US20060148182A1

公开(公告)日：2006-07-06

申请号：US11028378

申请日：2005-01-03

申请人： Suman Datta ,  Justin Brask ,  Jack Kavalieros ,  Matthew Metz ,  Mark Doczy ,  Robert Chau

发明人： Suman Datta ,  Justin Brask ,  Jack Kavalieros ,  Matthew Metz ,  Mark Doczy ,  Robert Chau

IPC分类号： H01L21/336

CPC分类号： H01L29/66871 ,  H01L29/7784

摘要： A quantum well transistor or high electron mobility transistor may be formed using a replacement metal gate process. A dummy gate electrode may be used to define sidewall spacers and source drain contact metallizations. The dummy gate electrode may be removed and the remaining structure used as a mask to etch a doped layer to form sources and drains self-aligned to said opening. A high dielectric constant material may coat the sides of said opening and then a metal gate electrode may be deposited. As a result, the sources and drains are self-aligned to the metal gate electrode. In addition, the metal gate electrode is isolated from an underlying barrier layer by the high dielectric constant material.

摘要翻译： 可以使用替代金属栅极工艺形成量子阱晶体管或高电子迁移率晶体管。 可以使用虚拟栅电极来限定侧壁间隔件和源漏接触金属化。 可以去除虚拟栅电极，并且将剩余的结构用作掩模以蚀刻掺杂层以形成源并且将其排列到所述开口自对准。 高介电常数材料可以覆盖所述开口的侧面，然后可以沉积金属栅极电极。 结果，源极和漏极与金属栅电极自对准。 此外，金属栅电极通过高介电常数材料与下面的阻挡层隔离。

公开(公告)号：US20060121727A1

公开(公告)日：2006-06-08

申请号：US11006074

申请日：2004-12-07

申请人： Matthew Metz ,  Suman Datta ,  Mark Doczy ,  Jack Kavalieros ,  Justin Brask ,  Robert Chau

发明人： Matthew Metz ,  Suman Datta ,  Mark Doczy ,  Jack Kavalieros ,  Justin Brask ,  Robert Chau

IPC分类号： H01L21/4763 ,  H01L21/44

CPC分类号： H01L21/28088 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4966

摘要： A method for making a titanium carbide layer is described. That method comprises alternately introducing a carbon containing precursor and a titanium containing precursor into a chemical vapor deposition reactor, while a substrate is maintained at a selected temperature. The reactor is operated for a sufficient time, and pulse times are selected for the carbon containing precursor and the titanium containing precursor, to form a titanium carbide layer of a desired thickness and workfunction on the substrate.

摘要翻译： 对碳化钛层的制造方法进行说明。 该方法包括在将基底保持在选定温度的同时将含碳前体和含钛前体交替引入化学气相沉积反应器。 反应器运行足够的时间，并且对于含碳的前体和含钛的前体选择脉冲时间，以在基底上形成所需厚度和功函数的碳化钛层。

公开(公告)号：US20060051880A1

公开(公告)日：2006-03-09

申请号：US10935784

申请日：2004-09-07

申请人： Mark Doczy ,  Gilbert Dewey ,  Suman Datta ,  Sangwoo Pae ,  Justin Brask ,  Jack Kavalieros ,  Matthew Metz ,  Adrian Sherrill ,  Markus Kuhn ,  Robert Chau

发明人： Mark Doczy ,  Gilbert Dewey ,  Suman Datta ,  Sangwoo Pae ,  Justin Brask ,  Jack Kavalieros ,  Matthew Metz ,  Adrian Sherrill ,  Markus Kuhn ,  Robert Chau

IPC分类号： H01L21/00 ,  H01L21/336 ,  H01L21/20

CPC分类号： H01L21/0214 ,  H01L21/02142 ,  H01L21/02175 ,  H01L21/022 ,  H01L21/28176 ,  H01L21/28194 ,  H01L21/3144 ,  H01L21/31691 ,  H01L28/56 ,  H01L29/517 ,  H01L29/518

摘要： A method for making a semiconductor device is described. That method comprises forming an oxide layer on a substrate, and forming a high-k dielectric layer on the oxide layer. The oxide layer and the high-k dielectric layer are then annealed at a sufficient temperature for a sufficient time to generate a gate dielectric with a graded dielectric constant.

公开(公告)号：US20060022277A1

公开(公告)日：2006-02-02

申请号：US10900582

申请日：2004-07-28

申请人： Jack Kavalieros ,  Justin Brask ,  Mark Doczy ,  Uday Shah ,  Chris Barns ,  Matthew Metz ,  Suman Datta ,  Robert Chau

发明人： Jack Kavalieros ,  Justin Brask ,  Mark Doczy ,  Uday Shah ,  Chris Barns ,  Matthew Metz ,  Suman Datta ,  Robert Chau

IPC分类号： H01L21/8238 ,  H01L29/94

CPC分类号： H01L21/28194 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/31111 ,  H01L21/32134 ,  H01L21/823807 ,  H01L21/823842 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/7843

摘要： A sacrificial gate structure, including nitride and fill layers, may be replaced with a metal gate electrode. The metal gate electrode may again be covered with a nitride layer covered by a fill layer. The replacement of the nitride and fill layers may reintroduce strain and provide an etch stop.