公开(公告)号：US20070292998A1

公开(公告)日：2007-12-20

申请号：US11558451

申请日：2006-11-10

申请人： Wei-Sheng Yu ,  Chien-Hung Chen

发明人： Wei-Sheng Yu ,  Chien-Hung Chen

IPC分类号： H01L21/338

CPC分类号： H01L27/1288 ,  G02F1/13439 ,  G02F1/13458 ,  G02F1/136209 ,  G02F2001/136222 ,  H01L27/1214

摘要： A thin film transistor array (TFT) substrate and a method for manufacturing the same are provided. The manufacturing method needs only or even less than six mask processes for manufacturing the TFT array substrate integrated with a color filter pattern. Therefore, the manufacturing method is simpler and the manufacturing cost is reduced. In addition, the manufacturing method needs not to form a contact window in a relative thick film layer such as a planarization layer or a color filter layer, so as to connect the pixel electrode to the source/drain, thus the difficulty of the manufacturing process is effectively reduced.

摘要翻译： 提供薄膜晶体管阵列（TFT）基板及其制造方法。 该制造方法仅需要或甚至少于六个用于制造与滤色器图案集成的TFT阵列基板的掩模工艺。 因此，制造方法更简单，制造成本降低。 此外，制造方法不需要在诸如平坦化层或滤色器层的相对厚膜层中形成接触窗口，以将像素电极连接到源极/漏极，因此制造过程的难度 有效减少。

公开(公告)号：US20060284957A1

公开(公告)日：2006-12-21

申请号：US11450257

申请日：2006-06-09

申请人： Ching-Yu Chou ,  Chien-Hung Chen

发明人： Ching-Yu Chou ,  Chien-Hung Chen

IPC分类号： G02B5/20

CPC分类号： G02B5/201 ,  B41M3/003 ,  G02F1/133516

摘要： A color filter includes a transparent substrate, a black matrix formed on the transparent substrate, a plurality of banks superposed on the black matrix, and a color layer formed of R, G and B color portions. The black matrix defines a plurality of sub-pixels of the color filter. The banks and the black matrix enclose a plurality of spaces for respectively accommodating the R, G and B color portions. Wherein, a plurality of groups is defined, each group includes a plurality of sub-pixels of concolorous color portions, at least one channel is formed on the bank between adjacent sub-pixels of concolorous color portions in the group. In a manufacturing method for the color filter, the ink can flow over between the adjacent sub-pixels in a defined group and level through the channel, thus the uniformity of the color portions can be improved.

摘要翻译： 滤色器包括透明基板，形成在透明基板上的黑矩阵，叠置在黑矩阵上的多个堤，以及由R，G和B彩色部分形成的彩色层。 黑矩阵定义滤色器的多个子像素。 堤和黑矩阵包围用于分别容纳R，G和B颜色部分的多个空间。 其中，定义多个组，每个组包括多个彩色部分的子像素，在组中的彩色部分的相邻子像素之间的组上形成至少一个通道。 在滤色片的制造方法中，油墨可以在限定的组中相邻的子像素之间流过，通过通道流过，从而可以提高颜色部分的均匀性。

公开(公告)号：US07054196B2

公开(公告)日：2006-05-30

申请号：US10728137

申请日：2003-12-03

申请人： Chien-Hung Chen ,  Shui-Chin Huang

发明人： Chien-Hung Chen ,  Shui-Chin Huang

IPC分类号： G11C16/04

CPC分类号： G11C16/10 ,  G11C16/0433 ,  H01L27/115

摘要： A method for programming a P-channel EEPROM having an N-well, a floating gate, a control gate, a P-type source region and a P-type drain region is provided. In the method, the N-well is grounded, a first positive voltage is applied to the control gate, a second positive voltage or a programming current is applied to the P-type source region, and a negative voltage is applied to the P-type drain region.

摘要翻译： 提供了一种用于编程具有N阱，浮动栅极，控制栅极，P型源极区域和P型漏极区域的P沟道EEPROM的方法。 在该方法中，N阱接地，第一正电压施加到控制栅极，第二正电压或编程电流施加到P型源极区域，负电压施加到P- 型漏极区域。

公开(公告)号：US06930002B1

公开(公告)日：2005-08-16

申请号：US10709370

申请日：2004-04-29

申请人： Chien-Hung Chen ,  Chungchin Shih

发明人： Chien-Hung Chen ,  Chungchin Shih

IPC分类号： G11C16/04 ,  H01L21/336 ,  H01L21/8247 ,  H01L27/115

CPC分类号： H01L27/11521 ,  G11C16/0416 ,  G11C2216/10 ,  H01L27/115 ,  H01L27/11558

摘要： A method for programming a single-poly EPROM cell at relatively low operation voltages (±Vcc) is disclosed. According to this invention, the single-poly EPROM cell includes a P-channel floating-gate transistor formed on an N well of a P type substrate, and an N-channel coupling device. The P-channel floating-gate transistor has a P+ doped drain, P+ doped source, a P channel defined between the P+ doped drain and P+ doped source, a tunnel oxide layer on the P channel, and a floating doped poly gate disposed on the tunnel oxide layer. The N-channel coupling device includes a floating poly electrode, which is electrically connected to the floating doped poly gate of the P-channel floating-gate transistor, and is capacitively coupled to a control region doped in the P type substrate.

摘要翻译： 公开了一种在相对低的操作电压（±Vcc）下编程单聚EPROM单元的方法。 根据本发明，单聚EPROM单元包括形成在P型衬底的N阱上的P沟道浮栅晶体管和N沟道耦合器件。 P沟道浮栅晶体管具有掺杂POD的掺杂漏极，P + SUP掺杂源，在P +掺杂的P + 漏极和P + SUP掺杂源，P沟道上的隧道氧化物层，以及设置在隧道氧化物层上的浮置掺杂多晶硅栅极。 N沟道耦合器件包括浮动多晶硅电极，其与P沟道浮栅晶体管的浮置掺杂多晶硅栅极电连接，并且电容耦合到掺杂在P型衬底中的控制区域。

公开(公告)号：US20050153543A1

公开(公告)日：2005-07-14

申请号：US10753657

申请日：2004-01-08

申请人： Shui-Chin Huang ,  Chien-Hung Chen

发明人： Shui-Chin Huang ,  Chien-Hung Chen

IPC分类号： H01L21/336 ,  H01L21/44 ,  H01L21/4763 ,  H01L21/60 ,  H01L21/8247

CPC分类号： H01L27/11521 ,  H01L21/76897

摘要： A self-aligned contact method includes, firstly, forming a plurality of stack structures on a semiconductor substrate. The stack structures separate each other and each has a first polysilicon layer, an insulating layer on the first polysilicon layer and a second polysilicon layer on the insulating layer. Secondly, a spacer forms on the sidewall of the stack structures, and then a dielectric layer is formed on the stack structures, the spacers and the semiconductor substrate. Finally, the portion of the second polysilicon layer is used as a buffer for forming a contact window by removing a portion of the dielectric layer. The contact window is located between two stack structures.

摘要翻译： 自对准接触方法首先在半导体衬底上形成多个堆叠结构。 堆叠结构彼此分离，并且每个具有第一多晶硅层，第一多晶硅层上的绝缘层和绝缘层上的第二多晶硅层。 其次，在堆叠结构的侧壁上形成间隔物，然后在堆叠结构，间隔物和半导体衬底上形成介电层。 最后，通过去除电介质层的一部分，将第二多晶硅层的部分用作形成接触窗的缓冲器。 接触窗口位于两个堆叠结构之间。

公开(公告)号：US06601281B1

公开(公告)日：2003-08-05

申请号：US09591325

申请日：2000-06-09

申请人： Chien-Hung Chen

发明人： Chien-Hung Chen

IPC分类号： B29C4100

CPC分类号： B29C45/0053 ,  B29C45/14065 ,  B29C70/682 ,  Y10T29/49799 ,  Y10T29/4998 ,  Y10T29/49993 ,  Y10T428/12194 ,  Y10T428/12486 ,  Y10T428/15 ,  Y10T428/20

摘要： A method for molding a molded substance to a substrate is provided. A substrate connected to a fixing portion by a connecting portion is prepared. The substrate is placed in a mold, wherein a portion of the fixing portion is protruding from the mold. The fixing portion is fixed by a fixing device outside the mold. Then, the molded substance covering the substrate is formed within the mold.

公开(公告)号：US06265269B1

公开(公告)日：2001-07-24

申请号：US09369266

申请日：1999-08-06

申请人： Chien-Hung Chen ,  Chih-Ta Wu ,  Ching-Shun Lin ,  Juinn-Sheng Chen

发明人： Chien-Hung Chen ,  Chih-Ta Wu ,  Ching-Shun Lin ,  Juinn-Sheng Chen

IPC分类号： H01L21336

CPC分类号： H01L29/42368 ,  H01L29/7813

摘要： A method for forming a concave bottom oxide layer in a trench, comprising: providing a semiconductor substrate; forming a pad oxide layer on the semiconductor substrate; forming a silicon nitride layer on the pad oxide layer; etching the silicon nitride layer, the pad oxide layer and the semiconductor substrate to form the trench in the semiconductor substrate; depositing a silicon oxide layer to refill into the trench and cover on the silicon nitride layer, wherein the silicon oxide layer has overhang portions at corners of the trench; anisotropically etching the silicon oxide layer to form a concave bottom oxide layer in the trench; etching the silicon oxide layer to remove the silicon oxide layer on the silicon nitride layer and the sidewalls of the trench; removing the silicon nitride layer and the pad oxide layer.

摘要翻译： 一种在沟槽中形成凹底部氧化物层的方法，包括：提供半导体衬底; 在所述半导体衬底上形成衬垫氧化物层; 在所述焊盘氧化物层上形成氮化硅层; 蚀刻氮化硅层，焊盘氧化物层和半导体衬底，以在半导体衬底中形成沟槽; 沉积硅氧化物层以重新填充到沟槽中并覆盖在氮化硅层上，其中氧化硅层在沟槽的拐角处具有突出部分; 各向异性地蚀刻氧化硅层以在沟槽中形成凹的底部氧化物层; 蚀刻氧化硅层以除去氮化硅层和沟槽的侧壁上的氧化硅层; 去除氮化硅层和衬垫氧化物层。

公开(公告)号：US06245643B1

公开(公告)日：2001-06-12

申请号：US09304013

申请日：1999-04-30

申请人： Wei-Shang King ,  Chien-Hung Chen ,  Ming-Kuan Kao

发明人： Wei-Shang King ,  Chien-Hung Chen ,  Ming-Kuan Kao

IPC分类号： H01L2176

CPC分类号： H01L21/76205

摘要： A method of forming a field oxide isolation region includes: forming a first pad oxide layer over a semiconductor substrate; forming a silicon nitride layer over the first pad oxide layer; patterning and etching the silicon nitride layer and the first pad oxide layer to expose a portion of the substrate, and simultaneously forming an undercut cavity; forming a second pad oxide layer over the exposed portion of the substrate; depositing a layer of polysilicon over the second pad oxide layer, the polysilicon layer filling the undercut cavity to form a polysilicon plug; removing portions of the polysilicon layer to form a polysilicon spacer; thermally oxidizing the substrate to substantially consume the polysilicon spacer but leave a polysilicon residual of the polysilicon plug, the thermal oxidation forming a thick oxide above the exposed portion of the substrate; substantially removing the silicon nitride layer; applying a first etching solution to the first pad oxide layer and the polysilicon residual, the first etching solution providing selective etching of the first pad oxide layer and the polysilicon residual so that the polysilicon residual is substantially removed and the first pad oxide layer is partially removed leaving a first pad oxide layer residual; and applying a second etching solution to remove the first pad oxide layer residual, thereby leaving the thick oxide to form the isolation region.

摘要翻译： 形成场氧化物隔离区域的方法包括：在半导体衬底上形成第一衬垫氧化层; 在所述第一衬垫氧化物层上形成氮化硅层; 图案化和蚀刻氮化硅层和第一衬垫氧化物层以暴露衬底的一部分，同时形成底切腔; 在衬底的暴露部分上形成第二焊盘氧化物层; 在所述第二衬垫氧化物层上沉积多晶硅层，所述多晶硅层填充所述底切腔以形成多晶硅插塞; 去除所述多晶硅层的部分以形成多晶硅间隔物; 热氧化衬底以基本上消耗多晶硅间隔物，但留下多晶硅插塞的多晶硅残留物，热氧化在衬底的暴露部分上形成厚氧化物; 基本上除去氮化硅层; 将第一蚀刻溶液施加到第一焊盘氧化物层和多晶硅残余物，第一蚀刻溶液提供对第一焊盘氧化物层和多晶硅残余物的选择性蚀刻，使得基本上去除多晶硅残余物并且部分地去除第一焊盘氧化物层 留下第一垫氧化层残留; 以及施加第二蚀刻溶液以去除所述第一衬垫氧化物层残留物，从而留下所述厚氧化物以形成所述隔离区域。

公开(公告)号：US06242352B1

公开(公告)日：2001-06-05

申请号：US09264013

申请日：1999-02-08

申请人： Chien-Hung Chen ,  Juan-Yuan Wu ,  Water Lu

发明人： Chien-Hung Chen ,  Juan-Yuan Wu ,  Water Lu

IPC分类号： H01L21302

CPC分类号： H01L22/20 ,  B24B37/042 ,  H01L21/31053 ,  H01L21/31055 ,  H01L21/76229

摘要： The present invention relates to a method for removing a first dielectric layer of a semiconductor wafer. The first dielectric layer is formed on the surface of a second dielectric layer of the semiconductor wafer. The method comprises performing a chemical mechanical polishing (CMP) process on the first dielectric layer to remove a predetermined thickness of the first dielectric layer, measuring the remaining thickness of the first dielectric layer, providing an etching table having a plurality of thickness ranges of the remaining first dielectric layer and corresponding etching back procedure or parameters of each of the thickness ranges, and performing an etching back process to horizontally remove the remaining first dielectric layer according to the etching back procedure or parameters of the thickness range corresponding to the measured thickness of the remaining first dielectric layer.

摘要翻译： 本发明涉及一种去除半导体晶片的第一介质层的方法。 第一电介质层形成在半导体晶片的第二电介质层的表面上。 该方法包括在第一电介质层上进行化学机械抛光（CMP）处理以去除第一介电层的预定厚度，测量第一电介质层的剩余厚度，提供具有多个厚度范围的蚀刻台 剩余的第一介电层和相应的回蚀程序或每个厚度范围的参数，并且根据蚀刻回程或对应于测量厚度的厚度范围的参数执行蚀刻回加工以水平去除剩余的第一介电层 剩余的第一介电层。

公开(公告)号：US06139680A

公开(公告)日：2000-10-31

申请号：US212371

申请日：1998-12-15

申请人： Chien-Hung Chen ,  Hsueh-Chung Chen

发明人： Chien-Hung Chen ,  Hsueh-Chung Chen

IPC分类号： B01D46/00 ,  B24B37/04 ,  B24B55/12 ,  C23F1/02

CPC分类号： B24B55/12 ,  B01D46/00 ,  B24B37/04

摘要： An improved exhaust line of a chemical-mechanical polisher will improve polishing performance. A chemical-mechanical polisher is in a polishing chamber, wherein the chemical-mechanical polisher contains a polishing table, a plurality of polishing pads on the polishing table, and a plurality of outlets on the polishing table. A plurality of exhaust lines is connected with the plurality of the outlets, wherein the exhaust lines are used to drive out exhaust gas and sewage generated in the polishing chamber. At least a gas-liquid separating device is connected with the plurality of the exhaust lines, wherein the gas-liquid separating device is used for separation of the exhaust and the sewage. The gas-liquid separating device comprises a sewage collector, a filter, a pump, and a sewage-collecting device. The sewage collector is connected with the plurality of the outlets, wherein the sewage collector is used for collecting the exhaust gas and the sewage driven out through the plurality of outlets. The filter is connected with the top of the gas-liquid separating device. The pump is connected with the filter. The sewage-collecting device is connected with the bottom of the gas-liquid separating device, wherein the sewage-collecting device is used for collecting the sewage.

摘要翻译： 化学机械抛光机的改进的排气管线将提高抛光性能。 化学机械抛光机在抛光室中，其中化学机械抛光机包含抛光台，抛光台上的多个抛光垫和抛光台上的多个出口。 多个排气管路与多个出口连接，其中排气管线用于驱除在抛光室中产生的废气和污水。 至少一个气液分离装置与多个排气管连接，其中气液分离装置用于分离废气和污水。 气液分离装置包括污水收集器，过滤器，泵和污水收集装置。 污水收集器与多个出口连接，其中污水收集器用于收集废气，并通过多个出口排出污水。 过滤器与气液分离装置的顶部连接。 泵与过滤器连接。 污水收集装置与气液分离装置的底部连接，其中污水收集装置用于收集污水。