Methods of forming hemisperical grained silicon on a template on a semiconductor work object
    82.
    发明申请
    Methods of forming hemisperical grained silicon on a template on a semiconductor work object 审中-公开
    在半导体工件上的模板上形成半晶粒硅的方法

    公开(公告)号:US20050051082A1

    公开(公告)日:2005-03-10

    申请号:US10943612

    申请日:2004-09-17

    CPC分类号: H01L28/84 H01L28/90

    摘要: The present invention provides a method of preparing a surface of a silicon wafer for formation of HSG structures. The method contemplates providing a wafer having at least one HSG template comprising polysilicon formed in BPSG, the HSG template being covered by silicon dioxide. The wafer is treated with a cleaning agent to clean the surface of the wafer. Next, the wafer is treated with a conditioning agent. The conditioning agent removes native oxide from the HSG template without excessively etching structural BPSG. Preferably, the conditioning agent also removes a thin layer of polysilicon on the HSG template. The wafer is then transferred to a process chamber for HSG formation.

    摘要翻译: 本发明提供一种制备用于形成HSG结构的硅晶片的表面的方法。 该方法考虑提供具有包含在BPSG中形成的多晶硅的至少一个HSG模板的晶片,HSG模板被二氧化硅覆盖。 用清洁剂处理晶片以清洁晶片的表面。 接下来,用调理剂处理晶片。 调理剂从HSG模板中除去天然氧化物,而不会过度蚀刻结构BPSG。 优选地,调理剂还在HSG模板上除去薄层的多晶硅。 然后将晶片转移到用于HSG形成的处理室。

    Methods of forming hemispherical grained silicon on a template on a semiconductor work object
    83.
    发明授权
    Methods of forming hemispherical grained silicon on a template on a semiconductor work object 失效
    在半导体工件上的模板上形成半球形晶粒硅的方法

    公开(公告)号:US06835617B2

    公开(公告)日:2004-12-28

    申请号:US10361107

    申请日:2003-02-07

    IPC分类号: H01L218242

    CPC分类号: H01L28/84 H01L28/90

    摘要: The present invention provides a method of preparing a surface of a silicon wafer for formation of HSG structures. The method contemplates providing a wafer having at least one HSG template comprising polysilicon formed in BPSG, the HSG template being covered by silicon dioxide. The wafer is treated with a cleaning agent to clean the surface of the wafer. Next, the wafer is treated with a conditioning agent. The conditioning agent removes native oxide from the HSG template without excessively etching structural BPSG. Preferably, the conditioning agent also removes a thin layer of polysilicon on the HSG template. The wafer is then transferred to a process chamber for HSG formation.

    摘要翻译: 本发明提供一种制备用于形成HSG结构的硅晶片的表面的方法。 该方法考虑提供具有包含在BPSG中形成的多晶硅的至少一个HSG模板的晶片,HSG模板被二氧化硅覆盖。 用清洁剂处理晶片以清洁晶片的表面。 接下来,用调理剂处理晶片。 调理剂从HSG模板中除去天然氧化物,而不会过度蚀刻结构BPSG。 优选地,调理剂还在HSG模板上除去薄层的多晶硅。 然后将晶片转移到用于HSG形成的处理室。

    High selectivity etching process for oxides
    84.
    发明授权
    High selectivity etching process for oxides 失效
    氧化物的高选择性蚀刻工艺

    公开(公告)号:US06355182B2

    公开(公告)日:2002-03-12

    申请号:US09780166

    申请日:2001-02-09

    IPC分类号: D44C122

    摘要: A process for etching oxides having differing densities which is not only highly selective, but which also produces uniform etches is provided and includes the steps of providing an oxide layer on a surface of a substrate, exposing the oxide layer to a liquid comprising a halide-containing species, and exposing the oxide layer to a gas phase comprising a halide-containing species. The process desirably is used to selectively etch a substrate surface in which the surface of the substrate includes on a first portion thereof a first silicon oxide and on a second portion thereof a second silicon oxide, with the first silicon oxide being relatively more dense than the second silicon oxide, such as, for example, a process which forms a capacitor storage cell on a semiconductor substrate.

    摘要翻译: 提供了不仅具有高选择性但也产生均匀蚀刻的具有不同密度的氧化物的方法,包括以下步骤:在衬底的表面上提供氧化物层,将氧化物层暴露于包含卤化物 - 并将氧化物层暴露于含有卤化物的物质的气相中。 该方法理想地用于选择性地蚀刻其中衬底的表面在其第一部分上包含第一氧化硅的衬底表面,并且在其第二部分上选择性地蚀刻第二氧化硅,其中第一氧化硅相对于 第二氧化硅,例如在半导体衬底上形成电容器存储单元的工艺。

    Shielded gate trench FET with multiple channels
    85.
    发明授权
    Shielded gate trench FET with multiple channels 有权
    多通道屏蔽栅沟槽FET

    公开(公告)号:US09224853B2

    公开(公告)日:2015-12-29

    申请号:US13553285

    申请日:2012-07-19

    申请人: James Pan

    发明人: James Pan

    摘要: In one embodiment, an apparatus can include a trench extending into a semiconductor region of a first conductivity type, an electrode disposed in the trench, and a source region of the first conductivity type abutting a sidewall of the trench. The apparatus can include a first well region of a second conductivity type disposed in the semiconductor region below the source region and abutting the sidewall of the trench lateral to the electrode where the second conductivity type is opposite the first conductivity type. The apparatus can also include a second well region of the second conductivity type disposed in the semiconductor region and abutting the sidewall of the trench, and a third well region of the first conductivity type disposed between the first well region and the second well region.

    摘要翻译: 在一个实施例中,装置可以包括延伸到第一导电类型的半导体区域中的沟槽,设置在沟槽中的电极以及与沟槽的侧壁邻接的第一导电类型的源极区域。 该装置可以包括设置在源极区域下方的半导体区域中的第二导电类型的第一阱区域,并且与第二导电类型与第一导电类型相反的电极的横向侧壁邻接沟槽的侧壁。 该装置还可以包括设置在半导体区域中并邻接沟槽的侧壁的第二导电类型的第二阱区域以及布置在第一阱区域和第二阱区域之间的第一导电类型的第三阱区域。

    Technique for controlling trench profile in semiconductor structures
    86.
    发明授权
    Technique for controlling trench profile in semiconductor structures 有权
    用于控制半导体结构中的沟槽轮廓的技术

    公开(公告)号:US08815744B2

    公开(公告)日:2014-08-26

    申请号:US12109302

    申请日:2008-04-24

    IPC分类号: H01L21/311

    摘要: A method for forming a semiconductor structure includes the following steps. Trenches are formed in a semiconductor region using a masking layer such that the trenches have a first depth, a first width along their bottom, and sidewalls having a first slope. The masking layer is removed, and a bevel etch is performed to taper the sidewalls of the trenches so that the sidewalls have a second slope less than the first slope.

    摘要翻译: 一种形成半导体结构的方法包括以下步骤。 在半导体区域中使用掩模层形成沟槽,使得沟槽具有第一深度,沿其底部的第一宽度和具有第一斜率的侧壁。 去除掩模层,并且执行斜面蚀刻以使沟槽的侧壁逐渐变细,使得侧壁具有小于第一斜率的第二斜率。

    Management of requested or pushed content in communications client devices
    87.
    发明授权
    Management of requested or pushed content in communications client devices 有权
    管理通信客户端设备中的请求或推送内容

    公开(公告)号:US08805775B1

    公开(公告)日:2014-08-12

    申请号:US11249554

    申请日:2005-10-13

    IPC分类号: G06F17/00 G06F7/00

    CPC分类号: G06F17/30902

    摘要: A system, a method and computer-readable media for managing content received over a network by a client device. A network transmission communicating an item of content is detected by a client device, and a determination is made whether the client device is in a mode of operation that allows the storing of uninvited media content. For example, the client device may be a mobile communication device monitoring the media being transmitted over a broadcast channel. When an item of content is observed traversing the broadcast channel, a set of user-defined preferences is accessed to determine whether to permit receiving the item. If permitted, the item of content is stored in a data store on the client device for subsequent presentation to the user.

    摘要翻译: 一种用于管理由客户端设备通过网络接收的内容的系统,方法和计算机可读介质。 通过客户端装置检测传送内容的网络传输,并且确定客户端装置是否处于允许存储未邀请的媒体内容的操作模式。 例如,客户端设备可以是监视通过广播信道发送的媒体的移动通信设备。 当通过广播频道观察内容项目时,访问一组用户定义的偏好以确定是否允许接收该项目。 如果允许的话,内容项被存储在客户端设备上的数据存储器中,以供随后呈现给用户。

    UCP4
    90.
    发明申请
    UCP4 有权

    公开(公告)号:US20120041176A1

    公开(公告)日:2012-02-16

    申请号:US13236459

    申请日:2011-09-19

    IPC分类号: C07K14/435 C12P21/06

    摘要: The present invention is directed to novel polypeptides having homology to certain human uncoupling proteins (“UCPs”) and to nucleic acid molecules encoding those polypeptides. Also provided herein are vectors and host cells comprising those nucleic acid sequences, chimeric polypeptide molecules comprising the polypeptides of the present invention fused to heterologous polypeptide sequences, antibodies which bind to the polypeptides of the present invention, and methods for producing the polypeptides of the present invention.

    摘要翻译: 本发明涉及与某些人解偶联蛋白(“UCP”)和编码那些多肽的核酸分子具有同源性的新型多肽。 本文还提供了包含那些核酸序列的载体和宿主细胞,包含与异源多肽序列融合的本发明多肽的嵌合多肽分子,与本发明的多肽结合的抗体,以及本发明多肽的制备方法 发明。