公开(公告)号：US11222710B1

公开(公告)日：2022-01-11

申请号：US16988897

申请日：2020-08-10

申请人： Micron Technology, Inc.

发明人： Mikai Chen ,  Zhenming Zhou ,  Zhenlei Shen ,  Murong Lang

IPC分类号： G11C29/44 ,  G11C29/02 ,  G11C29/12 ,  G11C5/06 ,  G11C5/02

摘要： A method includes determining, for a plurality of memory dice, a signal reliability characteristic and ranking the plurality of memory dice based, at least in part, on the determined reliability characteristics. The method can further include arranging the plurality of memory dice to form a memory device based, at least in part, on the ranking.

公开(公告)号：US11056166B2

公开(公告)日：2021-07-06

申请号：US16514840

申请日：2019-07-17

申请人： Micron Technology, Inc.

发明人： Tingjun Xie ,  Seungjune Jeon ,  Zhengang Chen ,  Zhenlei Shen ,  Charles See Yeung Kwong

IPC分类号： G11C7/00 ,  G11C11/406 ,  G11C11/16

摘要： A refresh operation can be performed at a memory sub-system The refresh operation can performed at a current frequency. A write count associated with the memory sub-system can be received. A determination can be made as to whether the write count associated with the memory sub-system satisfies a write count threshold. In response to determining that the write count associated with the memory sub-system satisfies the write count threshold, the refresh operation can be performed at an increased frequency relative to the current frequency.

公开(公告)号：US09318205B2

公开(公告)日：2016-04-19

申请号：US14626208

申请日：2015-02-19

申请人： Micron Technology, Inc.

发明人： Sivagnanam Parthasarathy ,  Patrick R. Khayat ,  Mustafa N. Kaynak ,  Zhenlei Shen

IPC分类号： G06F12/00 ,  G06F12/06 ,  G11C16/00 ,  G11C11/56 ,  G11C16/10 ,  G06F12/02 ,  G11C14/00 ,  G11C16/04 ,  G11C13/00

摘要： The present disclosure includes methods and apparatuses for mapping between program states and data patterns. One method includes: programming a group of G memory cells such that a combination of respective program states of the group maps to a constellation point corresponding to a received N unit data pattern, the group used to store N/G units of data per memory cell; wherein the constellation point is one of a number of constellation points of a constellation associated with mapping respective program state combinations of the group of memory cells to N unit data patterns; and wherein the constellation comprises a first mapping shell and a second mapping shell, the constellation points corresponding to the respective first and second mapping shells determined, at least partially, based on a polynomial expression of order equal to G.

公开(公告)号：US20140098614A1

公开(公告)日：2014-04-10

申请号：US14056713

申请日：2013-10-17

申请人： Micron Technology, Inc.

发明人： Zhenlei Shen ,  William H. Radke ,  Peter Feeley

IPC分类号： G11C16/34 ,  G11C16/26

CPC分类号： G11C16/34 ,  G11C11/5642 ,  G11C16/26 ,  G11C16/3495

摘要： The present disclosure includes methods, devices, and systems for dealing with threshold voltage change in memory devices. A number of embodiments include an array of memory cells and control circuitry having sense circuitry coupled to the array. The control circuitry is configured to determine changes in threshold voltages (Vts) associated with the memory cells without using a reference cell, and adjust the sense circuitry based on the determined changes and without using a reference cell.

摘要翻译： 本公开包括用于处理存储器件中的阈值电压变化的方法，装置和系统。 多个实施例包括具有耦合到阵列的感测电路的存储器单元阵列和控制电路。 控制电路被配置为确定与存储器单元相关联的阈值电压（Vts）的变化而不使用参考单元，并且基于所确定的变化并且不使用参考单元来调整感测电路。

公开(公告)号：US08576632B2

公开(公告)日：2013-11-05

申请号：US13667414

申请日：2012-11-02

申请人： Micron Technology, Inc.

发明人： Zhenlei Shen ,  William H. Radke ,  Peter Feeley

IPC分类号： G11C16/06

CPC分类号： G11C16/34 ,  G11C11/5642 ,  G11C16/26 ,  G11C16/3495

摘要： The present disclosure includes methods, devices, and systems for dealing with threshold voltage change in memory devices. A number of embodiments include an array of memory cells and control circuitry having sense circuitry coupled to the array. The control circuitry is configured to determine changes in threshold voltages (Vts) associated with the memory cells without using a reference cell, and adjust the sense circuitry based on the determined changes and without using a reference cell.

摘要翻译： 本公开包括用于处理存储器件中的阈值电压变化的方法，装置和系统。 多个实施例包括具有耦合到阵列的感测电路的存储器单元阵列和控制电路。 控制电路被配置为确定与存储器单元相关联的阈值电压（Vts）的变化而不使用参考单元，并且基于所确定的变化并且不使用参考单元来调整感测电路。

公开(公告)号：US20130058168A1

公开(公告)日：2013-03-07

申请号：US13667414

申请日：2012-11-02

申请人： MICRON TECHNOLOGY, INC.

发明人： Zhenlei Shen ,  William H. Radke ,  Peter Feeley

IPC分类号： G11C16/06

CPC分类号： G11C16/34 ,  G11C11/5642 ,  G11C16/26 ,  G11C16/3495

摘要： The present disclosure includes methods, devices, and systems for dealing with threshold voltage change in memory devices. A number of embodiments include an array of memory cells and control circuitry having sense circuitry coupled to the array. The control circuitry is configured to determine changes in threshold voltages (Vts) associated with the memory cells without using a reference cell, and adjust the sense circuitry based on the determined changes and without using a reference cell.

摘要翻译： 本公开包括用于处理存储器件中的阈值电压变化的方法，装置和系统。 多个实施例包括具有耦合到阵列的感测电路的存储器单元阵列和控制电路。 控制电路被配置为确定与存储器单元相关联的阈值电压（Vts）的变化而不使用参考单元，并且基于所确定的变化并且不使用参考单元来调整感测电路。

公开(公告)号：US11763896B2

公开(公告)日：2023-09-19

申请号：US17951593

申请日：2022-09-23

申请人： Micron Technology, Inc.

发明人： Seungjune Jeon ,  Zhenming Zhou ,  Zhenlei Shen

IPC分类号： G11C16/34 ,  G11C16/26 ,  G06F9/30 ,  G11C29/42 ,  G11C16/10

CPC分类号： G11C16/34 ,  G06F9/30101 ,  G11C16/10 ,  G11C16/26 ,  G11C29/42

摘要： A request to read data at the memory device is received. A first read operation is performed to read the data at the memory device using a first read threshold voltage. The data read at the memory device using the first read threshold voltage is determined to be associated with a first unsuccessful correction of an error. Responsive to determining that the data read at the memory device using the first read threshold voltage is associated with the first unsuccessful correction of the error, a second read threshold voltage is stored at a register to replace a preread threshold voltage previously stored at the register that is associated with the memory device. The first preread threshold voltage was previously used to perform a preread operation at the memory device. A second read operation to read the data at the memory device is performed using the second read threshold voltage.

公开(公告)号：US11756597B2

公开(公告)日：2023-09-12

申请号：US17393112

申请日：2021-08-03

申请人： Micron Technology, Inc.

发明人： Mikai Chen ,  Zhenlei Shen ,  Murong Lang ,  Zhenming Zhou

IPC分类号： G11C7/20 ,  G11C5/14 ,  G11C11/4096 ,  G11C7/10

CPC分类号： G11C7/20 ,  G11C5/148 ,  G11C7/1063 ,  G11C11/4096

摘要： A system includes a memory device having memory cells and a processing device operatively coupled to the memory device. The processing device is to perform operations including: determining a length of time the memory device has been powered off; and in response to determining that the length of time satisfies a threshold value: for each of multiple groups of memory cells, asserting a corresponding flag; determining, based on the length of time, one or more adjusted demarcation voltages to be used in reading a state of the multiple groups of memory cells; and storing the one or more adjusted demarcation voltages for use in performing memory operations.

公开(公告)号：US11720273B2

公开(公告)日：2023-08-08

申请号：US17323089

申请日：2021-05-18

申请人： Micron Technology, Inc.

发明人： Jian Huang ,  Zhenming Zhou ,  Zhenlei Shen

IPC分类号： G06F12/00 ,  G06F3/06 ,  G06F11/07

CPC分类号： G06F3/0644 ,  G06F3/0604 ,  G06F3/0688 ,  G06F11/076 ,  G06F11/0727

摘要： Disclosed is a system that comprises a memory device and a processing device, operatively coupled with the memory device, to perform operations that include, identifying, by the processing device, a plurality of partitions located on a die of the memory device. The operations performed by the processing device further include selecting, based on evaluating a predefined criterion reflecting a physical layout of the die of the memory device, a first partition and a second partition of the plurality of partitions. The operations performed by the processing device further include generating a codeword comprising first data residing on the first partition and second data residing on the second partition.

公开(公告)号：US20230168812A1

公开(公告)日：2023-06-01

申请号：US18103133

申请日：2023-01-30

申请人： Micron Technology, Inc.

发明人： Zhenming Zhou ,  Seungjune Jeon ,  Zhenlei Shen

IPC分类号： G06F3/06 ,  G06F12/10 ,  G06F7/58 ,  G06F12/02

CPC分类号： G06F3/0616 ,  G06F3/0652 ,  G06F3/0659 ,  G06F3/0679 ,  G06F7/588 ,  G06F12/10 ,  G06F12/0246 ,  G06F2212/1036 ,  G06F2212/7211

摘要： Systems and methods are disclosed including a processing device operatively coupled to memory device. The processing device performs operations comprising responsive to receiving a memory access command, determining a portion of the memory device that is referenced by a logical address specified by the memory access command; determining an endurance factor associated with the portion; and modifying, based on a value derived from the endurance factor, a media management metric associated with the portion of the memory device.