Apparatuses and methods for power regulation based on input power

    公开(公告)号:US09678524B2

    公开(公告)日:2017-06-13

    申请号:US14866152

    申请日:2015-09-25

    摘要: Apparatuses and methods for power regulation based on input power using circuitry are disclosed herein. An example apparatus may include a reference circuit configured to receive a first voltage and a second voltage and to provide an output reference voltage at an output node having a value equal to the second voltage subtracted from the first voltage. The reference circuit may be configured to mirror a current of a first circuit coupled between the second voltage and a reference voltage through a second circuit coupled between the first voltage and the output node. The example apparatus may further include a power circuit configured to provide a third voltage based on the output reference voltage. The third voltage may have a value that is equal to the output reference voltage.

    Cross-coupled input voltage sampling and driver amplifier flicker noise cancellation in a switched capacitor analog-to-digital converter
    85.
    发明授权
    Cross-coupled input voltage sampling and driver amplifier flicker noise cancellation in a switched capacitor analog-to-digital converter 有权
    开关电容模拟数字转换器中的交叉耦合输入电压采样和驱动放大器闪烁噪声消除

    公开(公告)号:US09525426B2

    公开(公告)日:2016-12-20

    申请号:US14615001

    申请日:2015-02-05

    摘要: A switching component comprises a plurality of switches configured to receive a differential signal at an input and is configured to provide a non-inverted version of the differential signal at an output during a first phase of operation and an inverted version of the differential signal at an output during a second phase of operation. A driver amplifier component is configured to receive the non-inverted version of the differential signal at an input during the first phase of operation and the inverted version of the differential signal at an input during the second phase of operation. A sampling capacitor component is configured to sample the output of the driver amplifier component during the first phase of operation and the second phase of operation.

    摘要翻译: 开关部件包括多个开关,其被配置为在输入处接收差分信号,并且被配置为在第一操作阶段期间的输出处提供差分信号的非反相形式,并且在第 在第二阶段的操作期间输出。 驱动器放大器组件被配置为在第一操作阶段的输入处接收差分信号的非反相版本,并且在第二操作阶段在输入处接收差分信号的反相版本。 采样电容器组件被配置为在第一操作阶段和第二阶段操作期间对驱动器放大器组件的输出进行采样。

    DRIVER CIRCUIT FOR SIGNAL TRANSMISSION AND CONTROL METHOD OF DRIVER CIRCUIT
    86.
    发明申请
    DRIVER CIRCUIT FOR SIGNAL TRANSMISSION AND CONTROL METHOD OF DRIVER CIRCUIT 有权
    信号传输驱动电路及驱动电路控制方法

    公开(公告)号:US20160191037A1

    公开(公告)日:2016-06-30

    申请号:US14822913

    申请日:2015-08-11

    申请人: MEDIATEK INC.

    IPC分类号: H03K17/10

    摘要: A driver circuit for receiving input data and generating an output signal to a termination element is disclosed, wherein the input data has a first bit and second bit, and the driver circuit includes: a pair of differential output terminals, arranged for outputting the output signal, wherein the pair of differential output terminals has a first output terminal and a second output terminal; a current mode drive unit, coupled to the pair of differential output terminals, for outputting a current from one of the first output terminal and the second output terminal, and receiving the current from the other of the first output terminal and the second output terminal according to the first bit; and a voltage mode drive unit, coupled to the pair of differential output terminals, for providing voltages to the first output terminal and the second output terminal according to at least the second bit.

    摘要翻译: 公开了一种用于接收输入数据并向终端元件产生输出信号的驱动电路,其中输入数据具有第一位和第二位,并且驱动电路包括:一对差分输出端,用于输出输出信号 ,其中所述一对差分输出端子具有第一输出端子和第二输出端子; 电流模式驱动单元,耦合到所述一对差分输出端子,用于从所述第一输出端子和所述第二输出端子之一输出电流,以及根据所述第一输出端子和所述第二输出端子中的另一个接收所述电流, 到第一位 以及耦合到所述一对差分输出端子的电压模式驱动单元,用于根据至少所述第二位向所述第一输出端子和所述第二输出端子提供电压。

    High voltage sustainable output buffer
    88.
    发明授权
    High voltage sustainable output buffer 有权
    高电压可持续输出缓冲器

    公开(公告)号:US08659327B2

    公开(公告)日:2014-02-25

    申请号:US13746374

    申请日:2013-01-22

    发明人: Yung-Feng Lin

    IPC分类号: H03K3/00

    CPC分类号: H03K17/10 H03K19/018528

    摘要: An output buffer includes a first output transistor, a first switch, a second switch and a third switch. The first output transistor is connected to a first operational voltage for outputting the first operational voltage as the data signal. The first switch is connected to a bulk of the first output transistor for receiving an enable signal. The second switch is connected to the first switch and a second operational voltage for receiving the enable signal, wherein the second operational voltage is lower than the first operational voltage. The third switch includes a first terminal connected to the bulk of the first output transistor, a control terminal connected to the first switch, and a second terminal connected to the first operational voltage.

    摘要翻译: 输出缓冲器包括第一输出晶体管,第一开关,第二开关和第三开关。 第一输出晶体管连接到用于输出第一工作电压的第一工作电压作为数据信号。 第一开关连接到第一输出晶体管的大部分,用于接收使能信号。 第二开关连接到第一开关和用于接收使能信号的第二工作电压,其中第二工作电压低于第一工作电压。 第三开关包括连接到第一输出晶体管的主体的第一端子,连接到第一开关的控制端子和连接到第一工作电压的第二端子。

    GATE DRIVER UNIT FOR ELECTRICAL SWITCHING DEVICE
    89.
    发明申请
    GATE DRIVER UNIT FOR ELECTRICAL SWITCHING DEVICE 有权
    电动开关装置的门驱动单元

    公开(公告)号:US20130328599A1

    公开(公告)日:2013-12-12

    申请号:US13964366

    申请日:2013-08-12

    申请人: ABB Research Ltd.

    IPC分类号: H03K17/30

    摘要: An exemplary apparatus and method for using intelligent gate driver units with distributed intelligence to control antiparallel power modules or parallel-connected electrical switching devices like IGBTs is disclosed. The intelligent gate drive units use the intelligence to balance the currents of the switching devices, even in dynamic switching events. The intelligent gate driver units can use master-slave or daisy chain control structures and instantaneous or time integral differences of the currents of parallel-connected switching devices as control parameters. Instead of balancing the currents, temperature can also be balanced with the intelligent gate driver units.

    摘要翻译: 公开了一种使用具有分布式智能的智能门驱动器单元来控制反并联功率模块或并联电气开关器件(例如IGBT)的示例性装置和方法。 智能门驱动单元即使在动态切换事件中也使用智能来平衡开关器件的电流。 智能栅极驱动器单元可以使用主从或菊花链控制结构以及并联开关器件电流的瞬时或时间积分差作为控制参数。 代替平衡电流,温度也可以与智能门驱动器单元平衡。

    Matrix-stages solid state ultrafast switch

    公开(公告)号:US08575990B2

    公开(公告)日:2013-11-05

    申请号:US13273767

    申请日:2011-10-14

    IPC分类号: H03K17/74

    摘要: A semiconductor switching device for switching high voltage and high current. The semiconductor switching device includes a control-triggered stage and one or more auto-triggered stages. The control-triggered stage includes a plurality of semiconductor switches, a breakover switch, a control switch, a turn-off circuit, and a capacitor. The control-triggered stage is connected in series to the one or more auto-triggered stages. Each auto-triggered stage includes a plurality of semiconductor switches connected in parallel, a breakover switch, and a capacitor. The control switch provides for selective turn-on of the control-triggered stage. When the control-triggered stage turns on, the capacitor of the control-triggered stage discharges into the gates of the plurality of semiconductor switches of the next highest stage to turn it on. Each auto-triggered stage turns on in a cascade fashion as the capacitor of the adjacent lower stage discharges or as the breakover switches of the auto-triggered stages turn on.