公开(公告)号：US20090316031A1

公开(公告)日：2009-12-24

申请号：US12456554

申请日：2009-06-18

Applicant: Yasuo Wakamori

Inventor： Yasuo Wakamori

IPC: H04N5/335

CPC classification number: H04N5/376 ,  H04N5/3532 ,  H04N5/35581 ,  H04N5/374

Abstract: Each pixel of a pixel matrix portion includes a photo diode, a floating diffusion, a transfer transistor for transferring a storage charge of the photo diode to the floating diffusion in response to a transfer pulse, a reset transistor for resetting the floating diffusion in response to a reset pulse, and a reading circuit for reading a voltage of the floating diffusion to a column signal line in response to a row selection pulse. A timing generator repeats a counting of subframes, and switches a frame consisting of the subframes in designated number. A vertical scanning circuit controls whether or not the reset pulse, the transfer pulse, and the row selection pulse should be fed to respective rows of the pixel matrix portion every subframe, and controls timings of the reset pulse and the transfer pulse in each subframe.

Abstract translation: 像素矩阵部分的每个像素包括光电二极管，浮动扩散，用于响应于传输脉冲将光电二极管的存储电荷转移到浮动扩散的转移晶体管，用于响应于 复位脉冲，以及用于响应于行选择脉冲将浮动扩散电压读取到列信号线的读取电路。 定时发生器重复子帧的计数，并且以指定的数量切换由子帧组成的帧。 垂直扫描电路控制每个子帧是否应将复位脉冲，转移脉冲和行选择脉冲馈送到像素矩阵部分的各行，并且控制每个子帧中的复位脉冲和转移脉冲的定时。

公开(公告)号：US07589776B2

公开(公告)日：2009-09-15

申请号：US11594905

申请日：2006-11-09

Applicant: Satoshi Yoshihara ,  Yasuhito Maki

Inventor： Satoshi Yoshihara ,  Yasuhito Maki

IPC: H04N5/335

CPC classification number: H04N5/3692 ,  H04N5/361 ,  H04N5/372 ,  H04N5/37213 ,  H04N5/374 ,  H04N5/376 ,  H04N5/3765 ,  H04N5/378

Abstract: When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping as generally supplied to an A/D converter is generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal output by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an OPB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.

Abstract translation: 当由固态摄像装置输出的信号被钳位到预定的参考电位时，产生一般在提供给A / D转换器的钳位之后的转移暂停期间产生的高电压。 一个采样/保持输出Va被钳位在钳位电平Vref之前的一段时间内，该时间段是在一行之前的像素的信号的信号的一半的时间点与信号输出的传送时钟的禁止周期的结束之间 通过第一钳位脉冲和第二像素的采样/保持输出的空传输单元，或者OPB单元的后续一个经由第二钳位脉冲钳位到钳位电平，以防止信号输出超过参考 电压在后期被提供给A / D转换器。

公开(公告)号：US20090213257A1

公开(公告)日：2009-08-27

申请号：US12392471

申请日：2009-02-25

Applicant: Koji NOJIMA

Inventor： Koji NOJIMA

IPC: H04N3/14 ,  H04N5/335

CPC classification number: H04N5/335 ,  H04N5/374 ,  H04N5/376

Abstract: Provided is an image sensor that may reduce the number of external terminals for downsizing of a chip, generate a write signal (RE) of a Y address with one pulse, and employ an external circuit having the same configuration as that of the conventional example. The image sensor uses an X-Y address scanning system in a pixel element matrix, and includes: a register latch that sets a Y address for selection of a row according to a write signal; a Y address register that decodes a Y address data from the register latch to output a Y address signal for selection of the row in the pixel element matrix; and an X address control unit that generates an X address signal for selection of a column. The register latch brings the Y address register into a disenable state so as to cause the Y address register not to output the Y address signal at timing at which the write signal is input to the Y address register, and brings the Y address register into an enable state so as to cause the Y address register to output the Y address signal at timing at which the input of the write signal is completed and the Y address data is written into the Y address register.

Abstract translation: 提供了一种图像传感器，其可以减少用于芯片尺寸减小的外部端子的数量，以一个脉冲产生Y地址的写入信号（RE），并且采用具有与传统示例相同的配置的外部电路。 图像传感器使用像素元素矩阵中的X-Y地址扫描系统，并且包括：寄存器锁存器，其根据写入信号设置用于选择行的Y地址; Y地址寄存器，用于从寄存器锁存器解码Y地址数据，以输出用于在像素元素矩阵中选择行的Y地址信号; 以及X地址控制单元，其生成用于选择列的X地址信号。 寄存器锁存器将Y地址寄存器置于禁止状态，以使Y地址寄存器不在写入信号输入到Y地址寄存器的定时输出Y地址信号，并将Y地址寄存器置于 使能状态，使Y地址寄存器在写入信号的输入完成并将Y地址数据写入Y地址寄存器的定时输出Y地址信号。

公开(公告)号：US20080310221A1

公开(公告)日：2008-12-18

申请号：US11818982

申请日：2007-06-15

Applicant: R. Jacob Baker

Inventor： R. Jacob Baker

IPC: G11C11/34 ,  G11C7/02 ,  H03M1/12

CPC classification number: G11C16/06 ,  G11C5/147 ,  G11C7/02 ,  G11C7/067 ,  G11C7/1006 ,  G11C7/1051 ,  G11C7/106 ,  G11C7/1069 ,  G11C13/0004 ,  G11C13/004 ,  H03M3/39 ,  H03M3/456 ,  H04N5/357 ,  H04N5/376

Abstract: Systems, methods, and devices are disclosed, including an electronic device that includes a first data location, a quantizing circuit, and a reference current source, all coupled to an electrical conductor. The reference current source may include a current mirror with a side coupled to the electrical conductor and a second data location coupled to another side of the current mirror.

Abstract translation: 公开了系统，方法和设备，包括包括第一数据位置，量化电路和参考电流源的电子设备，全部耦合到电导体。 参考电流源可以包括具有耦合到电导体的一侧的电流镜和耦合到电流镜的另一侧的第二数据位置。

公开(公告)号：US20080284762A1

公开(公告)日：2008-11-20

申请号：US12148756

申请日：2008-04-22

Applicant: Youji Sakioka ,  Eiji Makino

Inventor： Youji Sakioka ,  Eiji Makino

IPC: G09G5/00

CPC classification number: H04N5/376

Abstract: Disclosed herein is a driving apparatus for driving a pixel, including a first pMOS type transistor connected to a first potential a first nMOS type transistor connected in series to the first pMOS type transistor and connected to a second potential; and a control section configured to control the first pMOS type transistor and the first nMOS type transistor individually using a first on-signal for controlling the timing of turning on of one of the first pMOS type transistor and the first nMOS type transistor; a signal of a potential at a node between the first pMOS type transistor and the first nMOS type transistor being inputted as a driving signal for driving the pixel to the pixel.

Abstract translation: 本文公开了一种用于驱动像素的驱动装置，包括连接到第一电位的第一pMOS型晶体管与第一pMOS型晶体管串联连接到第二电位的第一nMOS型晶体管; 以及控制部，被配置为使用用于控制所述第一pMOS型晶体管和所述第一nMOS型晶体管中的一个的导通的定时的第一导通信号分别控制所述第一pMOS型晶体管和所述第一nMOS型晶体管; 在第一pMOS型晶体管和第一nMOS型晶体管之间的节点处的电位的信号被输入作为用于将像素驱动到像素的驱动信号。

公开(公告)号：US20080192136A1

公开(公告)日：2008-08-14

申请号：US12061806

申请日：2008-04-03

Applicant: Jeffery Steven Beck ,  Matthew Michael Borg

Inventor： Jeffery Steven Beck ,  Matthew Michael Borg

IPC: H04N5/335

CPC classification number: H01L27/14643 ,  H04N5/376

Abstract: A pixel circuit includes a pixel-capture device having a pixel node and operable to convert light intensity into a pixel signal at the pixel node, the pixel signal representing a captured pixel. A row node carries a row signal that is operable to both (a) enable passage of the pixel signal from the pixel node to a column node during a readout phase of the captured pixel, and (b) set the pixel node to a predetermined signal level during a reset phase of the captured pixel. The reset phase and the readout phase are configured to occur during different time intervals. A reset node is included for carrying a reset signal that is operable together with the row signal to (a) enable passage from the pixel node to the column node during the readout phase, and (b) set the pixel node to the predetermined signal level during the reset phase.

Abstract translation: 像素电路包括具有像素节点并且可操作以将光强转换为像素节点处的像素信号的像素捕获装置，该像素信号表示捕获的像素。 行节点携带行信号，其可操作以（a）在捕获的像素的读出阶段期间能够使像素信号从像素节点传递到列节点，并且（b）将像素节点设置为预定信号 在捕获的像素的复位阶段期间。 复位阶段和读出阶段被配置为在不同的时间间隔期间发生。 包括复位节点，用于携带与行信号一起可操作的复位信号，以便（a）在读出阶段期间能够从像素节点通过列节点，以及（b）将像素节点设置为预定信号电平 在复位阶段。

公开(公告)号：US07369168B2

公开(公告)日：2008-05-06

申请号：US10630647

申请日：2003-07-29

Applicant: Jeffery Steven Beck ,  Matthew Michael Borg

Inventor： Jeffery Steven Beck ,  Matthew Michael Borg

IPC: H04N5/335 ,  H04N1/04 ,  H01L31/113 ,  H01L27/00

CPC classification number: H01L27/14643 ,  H04N5/376

Abstract: A pixel circuit includes a silicon substrate having a photodiode that converts light intensity into a voltage signal and two metal layers disposed on the substrate having a pixel control circuit. The first metal layer includes a row trace and a reset trace and the second metal layer includes a column trace and a voltage supply trace. The row trace carries a signal that activates a switch for coupling the photodiode to the column trace during a readout phase and clears the voltage at the photodiode during a reset phase. The column trace interfaces with a signal capture circuit in a CMOS array of pixels for capturing a digital image that corresponds to each voltage level at each photodiode.

Abstract translation: 像素电路包括具有将光强度转换为电压信号的光电二极管的硅衬底和设置在具有像素控制电路的衬底上的两个金属层。 第一金属层包括行迹线和复位迹线，第二金属层包括列迹线和电压迹线。 行迹线传输一个信号，激活一个开关，用于在读出阶段将光电二极管耦合到列轨迹，并在复位阶段清除光电二极管的电压。 列轨迹与CMOS阵列中的信号捕获电路接口，用于捕获与每个光电二极管处的每个电压电平相对应的数字图像。

公开(公告)号：US20080049112A1

公开(公告)日：2008-02-28

申请号：US11571371

申请日：2005-06-16

Applicant: Youn Jung Lee

Inventor： Youn Jung Lee

IPC: H04N3/14

CPC classification number: H04N9/045 ,  H01L27/14603 ,  H01L27/14621 ,  H01L27/14645 ,  H04N5/376 ,  H04N2209/045

Abstract: The present invention relates to a CMOS image sensor. According to the present invention, the CMOS image sensor includes a two-dimensional pixel array (110), a row decoder (130), and a column decoder (150). The two-dimensional pixel array (110) includes rectangular unit pixels each having a width to length ratio of 1:2. The row decoder (130) is placed on one side of the pixel array to designate a row address. The column decoder (150) is placed on another side of the pixel array to be perpendicular to the row decoder and is adapted to extract data of respective pixels from a row selected by the row decoder, amplify the extracted data and generate image data including pixel values. As a result, the present invention is advantageous in that it can easily perform interpolation compared to an image sensor having regular quadrilateral unit pixels.

Abstract translation: CMOS图像传感器技术领域本发明涉及CMOS图像传感器。 根据本发明，CMOS图像传感器包括二维像素阵列（110），行解码器（130）和列解码器（150）。 二维像素阵列（110）包括宽度比为1:2的矩形单位像素。 行解码器（130）被放置在像素阵列的一侧以指定行地址。 列解码器（150）被放置在像素阵列的另一侧以垂直于行解码器，并且适于从行解码器选择的行中提取各个像素的数据，放大提取的数据并生成包括像素的图像数据 价值观。 结果，本发明的优点在于，与具有规则四边形单位像素的图像传感器相比，可以容易地执行插值。

公开(公告)号：US07336309B2

公开(公告)日：2008-02-26

申请号：US10332151

申请日：2001-07-03

Applicant: Moshe Stark

Inventor： Moshe Stark

IPC: H04N5/335

CPC classification number: H04N5/3535 ,  H04N5/2355 ,  H04N5/35509 ,  H04N5/376

Abstract: A method for compressing the dynamic range of an image sensor (202) including a multiplicity of pixels. The method includes the steps of exposing each of the pixels to light and producing an associated photocurrent per pixel, representative of the light exposure. Then, on a per-pixel basis, controlling exposure time of each of the pixels on the basis of a monotonically rising convex function of the associated photocurrent of each of the pixel.

Abstract translation: 一种用于压缩包括多个像素的图像传感器（202）的动态范围的方法。 该方法包括以下步骤：将每个像素曝光并产生代表曝光的每像素相关联的光电流。 然后，在每像素的基础上，基于每个像素的相关联的光电流的单调上升的凸函数来控制每个像素的曝光时间。

公开(公告)号：US20070008420A1

公开(公告)日：2007-01-11

申请号：US11430093

申请日：2006-05-09

Applicant: Jae-seob Roh

Inventor： Jae-seob Roh

IPC: H04N5/335

CPC classification number: H04N5/335 ,  H04N5/3745 ,  H04N5/376

Abstract: An image sensor and method thereof. In an example, the image sensor, may include a pixel array including a plurality of unit pixels, each of the plurality of unit pixels having a charge transfer unit for transferring charges accumulated in an optoelectronic converter to a charge detector via a charge transfer driving signal. The example image sensor may further include a row driving unit generating a boosted voltage, the boosted voltage set to a boosted voltage level higher than a power voltage level, the boosted voltage selectively boosted in response to a boosting voltage variable control signal. The row driving unit may selectively apply the charge transfer driving signal to the pixel array. In another example, the method may include selectively adjusting a voltage level of a charge transfer driving voltage and transferring the charge transfer driving voltage to a charge transfer unit for controlling an operation of the charge transfer unit.

Abstract translation: 一种图像传感器及其方法。 在一个示例中，图像传感器可以包括包括多个单位像素的像素阵列，多个单位像素中的每一个具有电荷转移单元，用于经由电荷转移驱动信号将累积在光电转换器中的电荷转移到电荷检测器 。 示例图像传感器还可以包括行驱动单元，其产生升压电压，升压电压被设置为高于电源电压电平的升压电压电平，升压电压响应于升压电压可变控制信号而选择性升压。 行驱动单元可以选择性地将电荷传递驱动信号施加到像素阵列。 在另一示例中，该方法可以包括选择性地调整电荷转移驱动电压的电压电平并将电荷转移驱动电压转移到用于控制电荷转移单元的操作的电荷转移单元。