公开(公告)号：US20140179031A1

公开(公告)日：2014-06-26

申请号：US13843690

申请日：2013-03-15

申请人： ADVANCED INQUIRY SYSTEMS, INC.

发明人： Douglas A. Preston ,  Morgan T. Johnson

IPC分类号： H01L21/66 ,  G01R31/28

CPC分类号： G01R1/06738 ,  G01R1/06744 ,  G01R1/07378 ,  G01R3/00 ,  G01R31/2886 ,  H01L22/14 ,  H01L22/32 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/15311 ,  H01L2924/00014

摘要： Nanospike contactors suitable for semiconductor device test, and associated systems and methods are disclosed. A representative apparatus includes a package having a wafer side positioned to face toward a device under test and an inquiry side facing away from the wafer side. A plurality of wafer side sites are carried at the wafer side of the package. The nanospikes can be attached to nanospike sites on a wafer side of the package. Because of their small size, multiple nanospikes make contact with a single pad/solderball on the semiconductor device. In some embodiments, after detecting that the device under test passes the test, the device under the test can be packaged to create a known good die in a package.

摘要翻译： 公开了适用于半导体器件测试的纳米针接触器，以及相关的系统和方法。 代表性的装置包括具有晶片侧的封装，该晶片侧被定位成面向被测器件和面向晶片侧的查询侧。 多个晶片侧位置在封装的晶片侧承载。 纳米针可以附着在包装的晶片侧的纳米级位置上。 由于它们的体积小，所以多个纳米球与半导体器件上的单个焊盘/焊球接触。 在一些实施例中，在检测到被测器件通过测试之后，可以封装测试的器件以在封装中创建已知的良好裸片。

公开(公告)号：US08405414B2

公开(公告)日：2013-03-26

申请号：US13247981

申请日：2011-09-28

申请人： Aaron Durbin ,  David Keith ,  Morgan T. Johnson

发明人： Aaron Durbin ,  David Keith ,  Morgan T. Johnson

IPC分类号： G01R31/20

CPC分类号： G01R1/07378 ,  G01R1/04 ,  G01R1/0408 ,  G01R1/0491 ,  G01R31/2601 ,  G01R31/2607 ,  G01R31/2886 ,  G01R31/2889

摘要： A wafer testing system and associated methods of use and manufacture are disclosed herein. In one embodiment, the wafer testing system includes an assembly for releaseably attaching a wafer to a wafer translator and the wafer translator to an interposer by means of separately operable vacuums, or pressure differentials. The assembly includes a wafer translator support ring coupled to the wafer translator, wherein a first flexible material extends from the wafer translator support ring so as to enclose the space between the wafer translator and the interposer so that the space may be evacuated by a first vacuum through one or more first evacuation paths. The assembly can further include a wafer support ring coupled to the wafer and the chuck, wherein a second flexible material extends from wafer support ring so as to enclose the space between the wafer and the wafer translator so that the space may be evacuated by a second vacuum through one or more second evacuation pathways.

摘要翻译： 本文公开了晶片测试系统及其相关的使用和制造方法。 在一个实施例中，晶片测试系统包括用于通过单独可操作的真空或压力差将晶片可释放地附接到晶片转换器和晶片转换器到组件。 组件包括耦合到晶片转换器的晶片转换器支撑环，其中第一柔性材料从晶片转换器支撑环延伸，以便包围晶片转换器和插入器之间的空间，使得空间可以被第一真空抽真空 通过一个或多个第一疏散路径。 组件还可以包括耦合到晶片和卡盘的晶片支撑环，其中第二柔性材料从晶片支撑环延伸，以便包围晶片和晶片转换器之间的空间，使得空间可被第二个 通过一个或多个第二排空路径进行真空。

公开(公告)号：US07724008B2

公开(公告)日：2010-05-25

申请号：US12325269

申请日：2008-12-01

申请人： Morgan T. Johnson

发明人： Morgan T. Johnson

IPC分类号： G01R31/02

CPC分类号： G01R1/07342 ,  G01R31/2886

摘要： Concurrent electrical access to the pads of integrated circuits on a wafer is provided by an edge-extended wafer translator that carries signals from one or more pads on one or more integrated circuits to contact terminals on the inquiry-side of the edge-extended wafer translator, including portions of the inquiry-side that are superjacent the wafer when the wafer and the edge-extended wafer translator are in a removably attached state, and portions of the inquiry side that reside outside a region defined by the intersection of the wafer and the edge-extended wafer translator. In a further aspect of the present invention, access to the pads of integrated circuits on a wafer is additionally provided by contact terminals in a second inquiry area located on the wafer-side of the edge-extended wafer translator in a region thereof bounded by its outer circumference and the circumference of the attached wafer.

摘要翻译： 通过边缘扩展晶片转换器提供对晶片上的集成电路的焊盘的并发电接口，其将信号从一个或多个集成电路上的一个或多个焊盘传送到边缘扩展晶片转换器的查询侧的接触端子 包括当晶片和边缘延伸晶片转换器处于可移除地附接状态时位于晶片上方的询问侧的部分以及位于由晶片和边缘延伸晶片转换器的相交处限定的区域之外的查询侧的部分 边缘延伸晶片转换器。 在本发明的另一方面，在位于边缘延伸晶片转换器的晶片侧的第二查询区域中的接触端子附加地提供对晶片上的集成电路焊盘的访问，该区域由其边界 外圆周和圆周。

公开(公告)号：US07532022B2

公开(公告)日：2009-05-12

申请号：US11811874

申请日：2007-06-11

申请人： Morgan T. Johnson

发明人： Morgan T. Johnson

IPC分类号： G01R31/02

CPC分类号： G01R31/2884 ,  G01R31/2851 ,  G01R31/2853 ,  G01R31/2855

摘要： An apparatus, suitable for coupling a pads of integrated circuits on wafer to the pogo pins of a pogo tower in a test system without the need of a probe card, includes a body having a first surface and a second surface, the body having a substantially circular central portion, and a plurality of bendable arms extending outwardly from the central portion, each bendable arm having a connector tab disposed at the distal end thereof; a first plurality of contact terminals disposed on the second surface of the central portion of the body, the first plurality of contact terminals arranged in pattern to match the layout of pads on a wafer to be contacted; at least one contact terminal disposed on the first surface of the plurality of connector tabs; and a plurality of electrically conductive pathways disposed in the body such that each of the first plurality of contact terminals is electrically connected to a corresponding one of the contact terminals on the first surface of the connector tabs.

摘要翻译： 一种适于将晶片上的集成电路的焊盘与测试系统中的浮标塔的弹簧销耦合而不需要探针卡的装置包括具有第一表面和第二表面的本体，该主体具有基本上 圆形中心部分和从中心部分向外延伸的多个可弯曲臂，每个可弯曲臂具有设置在其远端处的连接片; 设置在所述主体的中心部分的第二表面上的第一多个接触端子，所述第一多个接触端子以图案布置以匹配待接触的晶片上的焊盘的布局; 至少一个接触端子，设置在所述多个连接器接头的第一表面上; 以及设置在所述主体中的多个导电通路，使得所述第一多个接触端子中的每一个电连接到所述连接器接头的第一表面上的对应的一个接触端子。

公开(公告)号：US07498800B1

公开(公告)日：2009-03-03

申请号：US11880093

申请日：2007-07-18

申请人： Kenneth S. Whiteman

发明人： Kenneth S. Whiteman

IPC分类号： G01R31/28

CPC分类号： G01R1/0416 ,  G01R31/2831

摘要： A wafer/wafer translator pair in the attached state, with the wafer translator extending beyond the outer circumference of the wafer, is disposed on a rotation stage. At least one surface of the edge-extended wafer translator, in a peripheral annular region, provides contact pads electrically coupled to corresponding pads on the wafer, and a caliper-style contact block, operable to move perpendicularly the edge-extended wafer translator is positioned such the contact pads of the annular region may be electrically engaged with the contact block. After electrical communication between the wafer and the contact block, the contact block moves to a disengagement position, the rotation stage rotates the wafer/wafer translator pair to a new position and the contact block may then move into engagement with different contact pads in the annular region.

摘要翻译： 在晶片/晶片转换器对中，晶片平移器延伸超过晶片的外圆周，被安置在旋转平台上。 边缘延伸晶片转换器的至少一个表面在外围环形区域中提供电耦合到晶片上的相应焊盘的接触垫，并且卡钳式接触块可操作以垂直移动边缘延伸晶片转换器 这样环形区域的接触垫可以与接触块电接合。 在晶片和接触块之间的电气连通之后，接触块移动到分离位置，旋转台将晶片/晶片转换器对旋转到新的位置，接触块然后可以移动成与环形的不同接触垫接合 地区。

公开(公告)号：US20140197858A1

公开(公告)日：2014-07-17

申请号：US13744180

申请日：2013-01-17

申请人： Aaron Durbin ,  Morgan T. Johnson ,  Jose A. Santos

发明人： Aaron Durbin ,  Morgan T. Johnson ,  Jose A. Santos

IPC分类号： G01R31/26

CPC分类号： G01R31/2893 ,  G01R31/2831 ,  G01R31/2886

摘要： A wafer translator and a wafer, removably attached to each other, provides the electrical connection to electrical contacts on integrated circuits on a wafer in such a manner that the electrical contacts are substantially undamaged in the process of making such electrical connections. Various embodiments of the present invention provide a gasketless sealing means for facilitating the formation by vacuum attachment of the wafer/wafer translator pair. In this way, no gasket is required to be disposed between the wafer and the wafer translator. Air, or gas, is evacuated from between the wafer and wafer translator through one or more evacuation pathways in the gasketless sealing means.

摘要翻译： 晶片转换器和可移除地彼此连接的晶片提供与晶片上的集成电路上的电触点的电连接，使得在制造这种电连接的过程中电触头基本上没有损坏。 本发明的各种实施例提供了一种无垫圈密封装置，用于通过真空附接晶片/晶片转换器对来促进形成。 以这种方式，不需要在晶片和晶片转换器之间设置衬垫。 空气或气体通过无垫圈密封装置中的一个或多个抽空通道从晶片和晶片转换器之间排出。

公开(公告)号：US08704544B2

公开(公告)日：2014-04-22

申请号：US13068152

申请日：2011-03-10

申请人： Morgan T. Johnson

发明人： Morgan T. Johnson

IPC分类号： G01R31/20 ,  G01R31/28

CPC分类号： G01R31/2884 ,  G01R31/2851 ,  G01R31/2853 ,  G01R31/2855

摘要： An apparatus, suitable for coupling a pads of integrated circuits on wafer to the pogo pins of a pogo tower in a test system without the need of a probe card, includes a body having a first surface and a second surface, the body having a substantially circular central portion, and a plurality of bendable arms extending outwardly from the central portion, each bendable arm having a connector tab disposed at the distal end thereof; a first plurality of contact terminals disposed on the second surface of the central portion of the body, the first plurality of contact terminals arranged in pattern to match the layout of pads on a wafer to be contacted; at least one contact terminal disposed on the first surface of the plurality of connector tabs; and a plurality of electrically conductive pathways disposed in the body such that each of the first plurality of contact terminals is electrically connected to a corresponding one of the contact terminals on the first surface of the connector tabs.

摘要翻译： 一种适于将晶片上的集成电路的焊盘与测试系统中的浮标塔的弹簧销耦合而不需要探针卡的装置包括具有第一表面和第二表面的本体，该主体具有基本上 圆形中心部分和从中心部分向外延伸的多个可弯曲臂，每个可弯曲臂具有设置在其远端处的连接片; 设置在所述主体的中心部分的第二表面上的第一多个接触端子，所述第一多个接触端子以图案布置以匹配待接触的晶片上的焊盘的布局; 至少一个接触端子，设置在所述多个连接器接头的第一表面上; 以及设置在所述主体中的多个导电通路，使得所述第一多个接触端子中的每一个电连接到所述连接器接头的第一表面上的对应的一个接触端子。

公开(公告)号：US08536062B2

公开(公告)日：2013-09-17

申请号：US12284618

申请日：2008-09-22

申请人： Jens Ruffler

发明人： Jens Ruffler

IPC分类号： H01L21/302

CPC分类号： H01L21/02068 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/02166 ,  H01L2224/05001 ,  H01L2224/05082 ,  H01L2224/05624 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01018 ,  H01L2924/01033 ,  H01L2924/01072 ,  H01L2924/01075 ,  H01L2924/14 ,  H01L2924/00014

摘要： Methods are provided for removing an oxide layer from a metal pad on an integrated circuit in order to reduce contact resistance. In one embodiment, aluminum oxide, on the surface of a bond pad substantially comprised of aluminum, is reacted with a first chemical agent to form an inorganic salt, and the inorganic salt is then reacted with a second chemical agent leaving a substantially bare, that is, unoxidized, aluminum surface.

公开(公告)号：US08461024B2

公开(公告)日：2013-06-11

申请号：US13292037

申请日：2011-11-08

申请人： Morgan T. Johnson

发明人： Morgan T. Johnson

IPC分类号： H01L21/00

CPC分类号： G01R31/2889 ,  G01R1/07307 ,  G01R31/2601 ,  H01L21/67 ,  H01L21/67253 ,  H01L21/6835 ,  H01L21/6838 ,  H01L21/76256 ,  H01L21/78 ,  H01L22/14 ,  H01L22/20 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2924/014

摘要： A wafer translator is provided with a patterned layer of wafer bonding thermoset plastic and is removably attached with a wafer so as to form a wafer/wafer translator pair. The wafer translator acts as a mechanical support during a thinning process as well as during a wafer dicing operation. The singulated integrated circuits are then removed from the wafer translator. In some embodiments, wafer level testing of the integrated circuits on the wafer is performed subsequent to the wafer thinning process but before the wafer and wafer translator are separated. In other embodiments, wafer level testing of the integrated circuits on the wafer is performed subsequent to the wafer dicing operation but before the diced wafer and wafer translator are separated.

摘要翻译： 晶片转换器设置有晶片接合热固性塑料的图案化层，并且可移除地与晶片连接以形成晶片/晶片转换器对。 晶片转换器在薄化工艺期间以及在晶片切割操作期间用作机械支撑。 然后将单片化的集成电路从晶片转换器移除。 在一些实施例中，在晶片减薄处理之后但在晶片和晶片转换器分离之前执行晶片上的集成电路的晶片级测试。 在其他实施例中，在晶片切割操作之后，但是在切割的晶片和晶片转换器分离之前执行晶片上的集成电路的晶片级测试。

公开(公告)号：US20130021052A1

公开(公告)日：2013-01-24

申请号：US13068158

申请日：2011-03-10

申请人： Morgan T. Johnson

发明人： Morgan T. Johnson

IPC分类号： G01R31/26

CPC分类号： G01R1/07371 ,  G01R1/04 ,  G01R1/0408 ,  G01R1/07314 ,  G01R1/07342 ,  G01R31/2887 ,  G01R31/2889

摘要： Methods and apparatus for testing unsingulated integrated circuits on a wafer include adapting a wafer prober for use with full-wafer-contacter disposed on the wafer. Some embodiments include placing wafer on a chuck of the prober, aligning the wafer to a full-wafer contacter incorporated in the wafer prober, removably attaching the wafer to the full wafer contacter, separating the wafer from the chuck, and making electrical contact to one or more integrated circuits of the wafer by making physical contact with a surface of the full-wafer contacter that faces away from the wafer.

摘要翻译： 用于测试晶片上的非镶嵌集成电路的方法和装置包括使晶片探针适配用于设置在晶片上的全晶圆封装。 一些实施例包括将晶片放置在探测器的卡盘上，将晶片对准结晶在晶圆探针中的全晶圆封装，将晶片可移除地附接到全晶片连接器，将晶片与卡盘分离，并将电接触到一个 或更多的集成电路，通过与全晶圆连接器的远离​​晶片的表面进行物理接触。