公开(公告)号：US06791113B2

公开(公告)日：2004-09-14

申请号：US10414610

申请日：2003-04-15

申请人： Behnam Moradi ,  Er-Xuan Ping ,  Lingyi A. Zheng ,  John Packard

发明人： Behnam Moradi ,  Er-Xuan Ping ,  Lingyi A. Zheng ,  John Packard

IPC分类号： H01L27108

CPC分类号： H01L21/02326 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02271 ,  H01L21/3144 ,  H01L28/40 ,  H01L28/84 ,  Y10S438/964

摘要： The invention encompasses a method of forming a dielectric material. A nitrogen-comprising layer is formed on at least some of the surface of a rugged polysilicon substrate to form a first portion of a dielectric material. After the nitrogen-comprising layer is formed, at least some of the substrate is subjected to dry oxidation with one or both of NO and N2O to form a second portion of the dielectric material. The invention also encompasses a method of forming a capacitor. A layer of rugged silicon is formed over a substrate, and a nitrogen-comprising layer is formed on the layer of rugged silicon. Some of the rugged silicon is exposed through the nitrogen-comprising layer. After the nitrogen-comprising layer is formed, at least some of the exposed rugged silicon is subjected to dry oxidation conditions with one or both of NO and N2O. Subsequently, a conductive material layer is formed over the nitrogen-comprising layer. Additionally, the invention encompasses a capacitor structure. The structure includes a first capacitor electrode comprising a rugged polysilicon layer, a nitrogen-comprising layer on the rugged polysilicon layer, and a second capacitor electrode. The nitrogen-comprising layer is between the first and second capacitor electrodes.

摘要翻译： 本发明包括形成电介质材料的方法。 在坚固的多晶硅衬底的至少一些表面上形成含氮层以形成介电材料的第一部分。 在形成含氮层之后，至少一些基底用NO和N 2 O中的一种或两种进行干式氧化以形成介电材料的第二部分。 本发明还包括形成电容器的方法。 在衬底上形成一层坚固的硅，并且在坚固的硅层上形成含氮层。 一些粗糙的硅通过含氮层露出。 在形成含氮层之后，暴露的粗糙硅中的至少一些经受具有NO和N 2 O中的一种或两种的干燥氧化条件。 随后，在含氮层上形成导电材料层。 另外，本发明包括电容器结构。 该结构包括第一电容器电极，其包括坚固的多晶硅层，在凹凸多晶硅层上的含氮层和第二电容器电极。 含氮层位于第一和第二电容器电极之间。

公开(公告)号：US06518699B2

公开(公告)日：2003-02-11

申请号：US09907845

申请日：2001-07-17

申请人： John K. Lee ,  Behnam Moradi

发明人： John K. Lee ,  Behnam Moradi

IPC分类号： H01J162

CPC分类号： H01J3/022

摘要： An emitter substructure and methods for manufacturing the substructure are described. A substrate has a p-region formed at a surface of the substrate. A n-tank is formed such that the p-region surrounds a periphery of the n-tank. An emitter is formed on and electrically coupled to the n-tank. A dielectric layer is formed on the substrate that includes an opening surrounding the emitter. An extraction grid is formed on the dielectric layer. The extraction grid includes an opening surrounding and in close proximity to a tip of the emitter. An insulating region is formed at a lower boundary of the n-tank. The insulating region electrically isolates the emitter and the n-tank along at least a portion of the lower boundary beneath the opening. The insulating region thus functions to displace a depletion region associated with a boundary between the p-region and the n-tank from an area that can be illuminated by photons traveling through the extraction grid or openings in the extraction grid. This reduces distortion in field emission displays.

公开(公告)号：US06471561B2

公开(公告)日：2002-10-29

申请号：US09916159

申请日：2001-07-25

申请人： Tianhong Zhang ,  John K. Lee ,  Behnam Moradi

发明人： Tianhong Zhang ,  John K. Lee ,  Behnam Moradi

IPC分类号： H01J902

CPC分类号： H01J9/025 ,  H01J1/3044 ,  H01J2201/30446

摘要： A field emission display apparatus includes a plurality of emitters formed on a substrate. Each of the emitters includes a titanium silicide nitride outer layer so that the emitters are less susceptible to degradation. A dielectric layer is formed on the substrate and the emitters, and an opening is formed in the dielectric layer surrounding each of the emitters. A conductive extraction grid is formed on the dielectric layer substantially in a plane defined by the emitters, and includes an opening surrounding each of the emitters. A cathodoluminescent faceplate having a planar surface is disposed parallel to the substrate.

公开(公告)号：US06417617B2

公开(公告)日：2002-07-09

申请号：US09912618

申请日：2001-07-24

申请人： Tianhong Zhang ,  John K. Lee ,  Behnam Moradi

发明人： Tianhong Zhang ,  John K. Lee ,  Behnam Moradi

IPC分类号： H01J130

CPC分类号： H01J9/025 ,  H01J1/3044 ,  H01J2201/30446

摘要： A field emission display apparatus includes a plurality of emitters formed on a substrate. Each of the emitters includes a titanium silicide nitride outer layer so that the emitters are less susceptible to degradation. A dielectric layer is formed on the substrate and the emitters, and an opening is formed in the dielectric layer surrounding each of the emitters. A conductive extraction grid is formed on the dielectric layer substantially in a plane defined by the emitters, and includes an opening surrounding each of the emitters. A cathodoluminescent faceplate having a planar surface is disposed parallel to the substrate.

摘要翻译： 场致发射显示装置包括形成在基板上的多个发射体。 每个发射器包括硅化钛氮化物外层，使得发射体不易劣化。 在基板和发射体上形成电介质层，并且在围绕每个发射体的电介质层中形成开口。 导电提取栅格基本上在由发射器限定的平面中形成在介质层上，并且包括围绕每个发射器的开口。 具有平坦表面的阴极发光面板平行于基板设置。

公开(公告)号：US06362038B1

公开(公告)日：2002-03-26

申请号：US09563039

申请日：2000-05-01

申请人： John K. Lee ,  Behnam Moradi ,  Michael J. Westphal

发明人： John K. Lee ,  Behnam Moradi ,  Michael J. Westphal

IPC分类号： H01L218238

CPC分类号： H01L21/82385 ,  H01L27/0922 ,  H01L29/1087 ,  H01L29/4916 ,  H01L29/7835

摘要： CMOS devices and process for fabricating low voltage, high voltage, or both low voltage and high voltage CMOS devices are disclosed. According to the process, p-channel stops and source/drain regions of PMOS devices are implanted into a substrate in a single step. Further, gates for both NMOS and PMOS devices are doped with n-type dopant and NMOS gates are self-aligned.

摘要翻译： 公开了用于制造低电压，高电压或低电压和高电压CMOS器件的CMOS器件和工艺。 根据该过程，PMOS单元的p沟道停止点和源极/漏极区域在一个步骤中被注入到衬底中。 此外，NMOS和PMOS器件的栅极掺杂有n型掺杂剂，NMOS栅极是自对准的。

公开(公告)号：US06353285B1

公开(公告)日：2002-03-05

申请号：US09624362

申请日：2000-07-24

申请人： John K. Lee ,  Behnam Moradi

发明人： John K. Lee ,  Behnam Moradi

IPC分类号： H01J162

CPC分类号： H01J3/022

摘要： An emitter substructure and methods for manufacturing the substructure are described. A substrate has a p-region formed at a surface of the substrate. A n-tank is formed such that the p-region surrounds a periphery of the n-tank. An emitter is formed on and electrically coupled to the n-tank. A dielectric layer is formed on the substrate that includes an opening surrounding the emitter. An extraction grid is formed on the dielectric layer. The extraction grid includes an opening surrounding and in close proximity to a tip of the emitter. An insulating region is formed at a lower boundary of the n-tank. The insulating region electrically isolates the emitter and the n-tank along at least a portion of the lower boundary beneath the opening. The insulating region thus functions to displace a depletion region associated with a boundary between the p-region and the n-tank from an area that can be illuminated by photons traveling through the extraction grid or openings in the extraction grid. This reduces distortion in field emission displays.

摘要翻译： 描述了一种发射器子结构及其制造方法。 衬底具有形成在衬底的表面上的p区。 形成n型罐，使得p型区域围绕n型罐的周边。 发射极形成在n电池上并电耦合到n型电池。 在基板上形成介电层，该介质层包括围绕发射极的开口。 在电介质层上形成提取栅格。 提取格栅包括围绕并且紧邻发射器的尖端的开口。 在n型罐的下边界处形成绝缘区域。 绝缘区域沿着开口下方的下边界的至少一部分电隔离发射极和n坦克。 因此，绝缘区域用于从可以由穿过提取栅格中的光子或提取栅格中的开口的光子照射的区域移位与p区域和n坦克之间的边界相关联的耗尽区域。 这减少了场致发射显示器的失真。

公开(公告)号：US6064075A

公开(公告)日：2000-05-16

申请号：US196263

申请日：1998-11-19

申请人： David A. Cathey, Jr. ,  John K. Lee ,  Tianhong Zhang ,  Behnam Moradi

发明人： David A. Cathey, Jr. ,  John K. Lee ,  Tianhong Zhang ,  Behnam Moradi

IPC分类号： H01J1/05 ,  H01J9/02 ,  H01L21/00 ,  H01L21/4763 ,  H01L29/06

CPC分类号： H01J3/021 ,  H01J29/467 ,  H01J31/127 ,  H01J9/148 ,  H01J2203/0232 ,  H01J2329/463

摘要： Semiconductor devices may be made by forming a silicided layer on a silicon material such as that used to form the extractor of a field emission display. The silicided layer may be self-aligned with the emitter of a field emission display. If the silicided layer is treated at a temperature above 1000.degree. C. by exposure to a nitrogen source, the silicide is resistant to subsequent chemical attack such as that involved in a buffered oxide etching process.

摘要翻译： 半导体器件可以通过在诸如用于形成场致发射显示器的提取器的硅材料上形成硅化物层而制成。 硅化物层可以与场发射显示器的发射极自对准。 如果通过暴露于氮源在高于1000℃的温度下处理硅化物层，则硅化物对随后的化学侵蚀（例如涉及缓冲氧化物蚀刻工艺）是有抗性的。

公开(公告)号：US6024620A

公开(公告)日：2000-02-15

申请号：US196302

申请日：1998-11-19

申请人： David A. Cathey, Jr. ,  John K. Lee ,  Tianhong Zhang ,  Behnam Moradi

发明人： David A. Cathey, Jr. ,  John K. Lee ,  Tianhong Zhang ,  Behnam Moradi

IPC分类号： H01J1/05 ,  H01J9/02 ,  H01L21/00 ,  H01L21/4763 ,  H01L29/06

CPC分类号： H01J3/021 ,  H01J29/467 ,  H01J31/127 ,  H01J9/148 ,  H01J2203/0232 ,  H01J2329/463

摘要： Semiconductor devices may be made by forming a silicided layer on a silicon material such as that used to form the extractor of a field emission display. The silicided layer may be self-aligned with the emitter of a field emission display. If the silicided layer is treated at a temperature above 1000.degree. C. by exposure to a nitrogen source, the silicide is resistant to subsequent chemical attack such as that involved in a buffered oxide etching process.

公开(公告)号：US6015323A

公开(公告)日：2000-01-18

申请号：US775964

申请日：1997-01-03

申请人： Behnam Moradi ,  Kanwal K. Raina ,  Michael J. Westphal

发明人： Behnam Moradi ,  Kanwal K. Raina ,  Michael J. Westphal

IPC分类号： H01J9/02

CPC分类号： H01J9/025 ,  H01J2329/00

摘要： Improved field emission display includes a buffer layer of copper, aluminum, silicon nitride or doped or undoped amorphous, poly, or microcrystalline silicon located between a chromium gate electrode and associated dielectric layer in a cathode assembly. The buffer layer substantially reduces or eliminates the occurrence of an adverse chemical reaction between the chromium gate electrode and dielectric layer.

摘要翻译： 改进的场致发射显示器包括位于阴极组件中的铬栅电极和相关介电层之间的铜，铝，氮化硅或掺杂或未掺杂的非晶，多晶或微晶硅的缓冲层。 缓冲层基本上减少或消除了铬栅电极和电介质层之间不利的化学反应的发生。

公开(公告)号：US20120132979A1

公开(公告)日：2012-05-31

申请号：US13365472

申请日：2012-02-03

申请人： Kirk Prall ,  Behnam Moradi ,  Seiichi Aritome ,  Di Li ,  Chris Larsen

发明人： Kirk Prall ,  Behnam Moradi ,  Seiichi Aritome ,  Di Li ,  Chris Larsen

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： H01L29/66825 ,  H01L21/22 ,  H01L21/265 ,  H01L21/26506 ,  H01L21/324 ,  H01L27/1052 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/6659 ,  H01L29/66659 ,  H01L29/788

摘要： Disclosed is a method of forming memory devices employing halogen ion implantation and diffusion processes. In one illustrative embodiment, the method includes forming a plurality of word line structures above a semiconducting substrate, each of the word line structures comprising a gate insulation layer, performing an LDD ion implantation process to form LDD doped regions in the substrate between the word line structures, performing a halogen ion implantation process to implant atoms of halogen into the semiconducting substrate between the word line structures, and performing at least one anneal process to cause at least some of the atoms of halogen to diffuse into the gate insulation layers on adjacent word line structures.

摘要翻译： 公开了一种使用卤素离子注入和扩散工艺形成存储器件的方法。 在一个说明性实施例中，该方法包括在半导体衬底上形成多个字线结构，每个字线结构包括栅极绝缘层，执行LDD离子注入工艺，以在字线之间的衬底中形成LDD掺杂区域 结构，执行卤素离子注入工艺，以将卤素原子植入到半导体衬底中的字线结构之间，以及执行至少一个退火工艺以使至少一些卤素原子扩散到相邻字的栅极绝缘层中 线结构。