IN-SITU CLEAN TO REDUCE METAL RESIDUES AFTER ETCHING TITANIUM NITRIDE
    1.
    发明申请
    IN-SITU CLEAN TO REDUCE METAL RESIDUES AFTER ETCHING TITANIUM NITRIDE 审中-公开
    在硝基硝酸盐蚀刻后的现场清洁减少金属残留

    公开(公告)号:US20110130007A1

    公开(公告)日:2011-06-02

    申请号:US12884609

    申请日:2010-09-17

    IPC分类号: H01L21/467

    摘要: Methods of processing substrates having titanium nitride layers are provided. In some embodiments, a method for processing a substrate having a dielectric layer to be etched, a titanium nitride layer above the dielectric layer, and a patterned photoresist layer above the titanium nitride layer, includes etching a pattern into the titanium nitride layer by exposing the titanium nitride layer to a first plasma comprising a chlorine containing gas to form a hard mask; removing titanium nitride etch residues disposed on one or more surfaces of the process chamber and/or substrate by forming a second plasma in the process chamber from a reactive gas comprising at least one of carbon monoxide or carbon dioxide; and etching the dielectric layer through the hard mask with a third plasma comprising a fluorocarbon gas.

    摘要翻译: 提供了处理具有氮化钛层的衬底的方法。 在一些实施例中,一种用于处理具有要蚀刻的介电层,在电介质层上方的氮化钛层和在氮化钛层上方的图案化的光致抗蚀剂层的衬底的方法包括通过将图案暴露于氮化钛层 氮化钛层至含有含氯气体的第一等离子体,形成硬掩模; 通过在包括至少一种一氧化碳或二氧化碳的反应性气体中在所述处理室中形成第二等离子体来去除设置在所述处理室和/或衬底的一个或多个表面上的氮化钛蚀刻残留物; 并用包含碳氟化合物气体的第三等离子体通过硬掩模蚀刻电介质层。

    METHOD FOR FABRICATING LOW K DIELECTRIC DUAL DAMASCENE STRUCTURES
    2.
    发明申请
    METHOD FOR FABRICATING LOW K DIELECTRIC DUAL DAMASCENE STRUCTURES 审中-公开
    制备低K电介质双组分结构的方法

    公开(公告)号:US20090156012A1

    公开(公告)日:2009-06-18

    申请号:US11954550

    申请日:2007-12-12

    IPC分类号: H01L21/461

    摘要: Methods for forming dual damascene structures in low-k dielectric materials that facilitate reducing photoresist poison issues are provided herein. In some embodiments, such methods may include plasma etching a via through a first mask layer into a low-k dielectric material disposed on a substrate. The first mask layer may then be removed using a process including exposing the first mask layer to a first plasma comprising an oxygen containing gas and at least one of a dilutant gas or a passivation gas, and subsequently exposing the first mask layer to a second plasma comprising an oxygen containing gas and formed using one of either plasma bias power or plasma source power. An anti-reflective coating may then be deposited into the via and atop the low-k dielectric material. A trench may then be plasma etched through a second mask layer formed atop the anti-reflective coating into the low-k dielectric material.

    摘要翻译: 本文提供了在低k电介质材料中形成双重镶嵌结构的方法,其有助于减少光致抗蚀剂的毒性问题。 在一些实施例中,这样的方法可以包括将通过第一掩模层的通孔等离子体蚀刻到设置在基板上的低k电介质材料。 然后可以使用包括将第一掩模层暴露于包含含氧气体和稀释气体或钝化气体中的至少一种的第一等离子体的方法去除第一掩模层,并随后将第一掩模层暴露于第二等离子体 包括含氧气体并且使用等离子体偏置功率或等离子体源功率之一来形成。 然后可以将抗反射涂层沉积到低k电介质材料的通孔中。 然后可以通过在抗反射涂层顶部形成低k电介质材料的第二掩模层等离子体蚀刻沟槽。

    METHOD OF ETCHING AN ORGANIC LOW-K DIELECTRIC MATERIAL
    3.
    发明申请
    METHOD OF ETCHING AN ORGANIC LOW-K DIELECTRIC MATERIAL 失效
    蚀刻有机低K电介质材料的方法

    公开(公告)号:US20080237183A1

    公开(公告)日:2008-10-02

    申请号:US11691930

    申请日:2007-03-27

    IPC分类号: C23F1/00

    CPC分类号: H01L21/31138 H01L21/6708

    摘要: A method of etching organic low-k dielectric materials is provided herein. In one embodiment, a method of etching organic low-k dielectric materials includes placing a substrate comprising an exposed organic low-k dielectric material in an etch reactor; supplying a process gas comprising an oxygen-containing gas, a nitrogen-containing gas, and methane (CH4); and forming a plasma from the process gas to etch the organic low-k dielectric material. The organic low-k dielectric material may include polymer-based low-k dielectric materials, photoresists, or organic polymers. The oxygen-containing gas may be oxygen (O2) and the nitrogen-containing gas may be nitrogen (N2).

    摘要翻译: 本文提供了一种蚀刻有机低k电介质材料的方法。 在一个实施例中,蚀刻有机低k电介质材料的方法包括将包含暴露的有机低k电介质材料的衬底放置在蚀刻反应器中; 提供包含含氧气体,含氮气体和甲烷(CH 4 SO 4)的工艺气体; 以及从所述工艺气体形成等离子体以蚀刻所述有机低k电介质材料。 有机低k介电材料可以包括基于聚合物的低k介电材料,光致抗蚀剂或有机聚合物。 含氧气体可以是氧(O 2/2),含氮气体可以是氮气(N 2 O 2)。

    Method of heating a semiconductor substrate

    公开(公告)号:US06547978B2

    公开(公告)日:2003-04-15

    申请号:US10017001

    申请日:2001-12-13

    IPC分类号: B44C0122

    摘要: Copper can be pattern etched in a manner which provides the desired feature dimension and integrity, at acceptable rates, and with selectivity over adjacent materials. To provide for feature integrity, the portion of the copper feature surface which has been etched to the desired dimensions and shape must be protected during the etching of adjacent feature surfaces. This is particularly important for feature sizes less than about 0.5 &mgr;m, where presence of even a limited amount of a corrosive agent can eat away a large portion of the feature. The copper feature integrity is protected by several different mechanisms: 1) The reactive etchant species are designed to be only moderately aggressive, so that an acceptable etch rate is achieved without loss of control over the feature profile or the etch surface; 2) Hydrogen is applied over the etch surface so that it is absorbed onto the etch surface, where it acts as a boundary which must be crossed by the reactive species and a chemical modulator for the reactive species; and 3) Process variables are adjusted so that byproducts from the etch reaction are rendered more volatile and easily removable from the etch surface. In an inductively coupled plasma etch chamber, we have observed that the preferred chlorine reactive species are generated when the chlorine is dissociated from compounds rather than furnished as Cl2 gas.

    Method of pattern etching a low K dielectric layer
    5.
    发明授权
    Method of pattern etching a low K dielectric layer 失效
    图案蚀刻低K电介质层的方法

    公开(公告)号:US06331380B1

    公开(公告)日:2001-12-18

    申请号:US09549262

    申请日:2000-04-14

    IPC分类号: G03C558

    摘要: A first embodiment of the present invention pertains to a method of patterning a semiconductor device conductive feature while permitting easy removal of any residual masking layer which remains after completion of the etching process. A multi-layered masking structure is used which includes a layer of high-temperature organic-based masking material overlaid by either a patterned layer of inorganic masking material or by a layer of patterned high-temperature imageable organic masking material. The inorganic masking material is used to transfer a pattern to the high-temperature organic-based masking material and is then removed. The high-temperature organic-based masking material is used to transfer the pattern and then may be removed if desired. This method is also useful in the pattern etching of aluminum, even though aluminum can be etched at lower temperatures. A second embodiment of the present invention pertains to a specialized etch chemistry useful in the patterning of organic polymeric layers such as low k dielectrics, or other organic polymeric interfacial layers. This etch chemistry is useful for mask opening during the etch of a conductive layer or is useful in etching damascene structures where a metal fill layer is applied over the surface of a patterned organic-based dielectric layer. The etch chemistry provides for the use of etchant plasma species which minimize oxygen, fluorine, chlorine, and bromine content.

    摘要翻译: 本发明的第一实施例涉及一种图案化半导体器件导电特征的方法,同时允许容易地去除在蚀刻工艺完成之后保留的任何残留掩模层。 使用多层掩模结构,其包括由无机掩模材料的图案化层或由图案化的高温可成像有机掩蔽材料层覆盖的高温有机基掩蔽材料层。 无机掩模材料用于将图案转印到高温有机基掩蔽材料上,然后除去。 高温有机基掩蔽材料用于转移图案,然后如果需要可以去除。 这种方法在铝的图案蚀刻中也是有用的,即使在较低温度下可以蚀刻铝。 本发明的第二个实施方案涉及可用于图案化有机聚合物层如低k电介质或其它有机聚合物界面层的专用蚀刻化学物质。 该蚀刻化学物质可用于在导电层的蚀刻过程中的掩模开口,或者可用于蚀刻镶嵌结构,其中金属填充层施加在图案化有机基介质层的表面上。 蚀刻化学提供了使氧化物,氟,氯和溴含量最小化的蚀刻剂等离子体物质的使用。

    Method for high temperature etching of patterned layers using an organic
mask stack
    6.
    发明授权
    Method for high temperature etching of patterned layers using an organic mask stack 失效
    使用有机掩模叠层对图案化层进行高温蚀刻的方法

    公开(公告)号:US6143476A

    公开(公告)日:2000-11-07

    申请号:US991219

    申请日:1997-12-12

    摘要: The present disclosure pertains to a method of patterning a semiconductor device feature which provides for the easy removal of any residual masking layer which remains after completion of a pattern etching process. The method provides for a multi-layered masking structure which includes a layer of high-temperature organic-based masking material overlaid by either a layer of a high-temperature inorganic masking material which can be patterned to provide an inorganic hard mask, or by a layer of high-temperature imageable organic masking material which can be patterned to provide an organic hard mask. The hard masking material is used to transfer a pattern to the high-temperature organic-based masking material, and then the hard masking material is removed. The high-temperature organic-based masking material is used to transfer the pattern to an underlying semiconductor device feature.

    摘要翻译: 本公开涉及一种图案化半导体器件特征的方法,其提供容易去除在图案蚀刻工艺完成之后保留的任何残留掩模层。 该方法提供了一种多层掩模结构,其包括由可以被图案化以提供无机硬掩模的高温无机掩蔽材料层覆盖的高温有机基掩蔽材料层,或由 可以图案化以提供有机硬掩模的高温可成像有机掩模材料层。 使用硬掩模材料将图案转印到高温有机基掩蔽材料上,然后去除硬掩模材料。 高温有机基掩蔽材料用于将图案转移到下面的半导体器件特征。

    Plasma etching carbonaceous layers with sulfur-based etchants
    7.
    发明授权
    Plasma etching carbonaceous layers with sulfur-based etchants 失效
    用硫基蚀刻剂等离子体蚀刻碳质层

    公开(公告)号:US08133819B2

    公开(公告)日:2012-03-13

    申请号:US12035289

    申请日:2008-02-21

    IPC分类号: H01L21/302

    CPC分类号: H01L21/31116 H01L21/31138

    摘要: Etching of carbonaceous layers with an etchant gas mixture including molecular oxygen (O2) and a gas including a carbon sulfur terminal ligand. A high RF frequency source is employed in certain embodiments to achieve a high etch rate with high selectivity to inorganic dielectric layers. In certain embodiments, the etchant gas mixture includes only the two components, COS and O2, but in other embodiments additional gases, such as at least one of molecular nitrogen (N2), carbon monoxide (CO) or carbon dioxide (CO2) may be further employed to etch to carbonaceous layers.

    摘要翻译: 用包含分子氧(O 2)和包含碳硫末端配体的气体的蚀刻剂气体混合物蚀刻碳质层。 在某些实施方案中采用高RF频率源以实现对无机介电层的高选择性的高蚀刻速率。 在某些实施方案中,蚀刻剂气体混合物仅包括两种组分COS和O 2,但在其它实施方案中,另外的气体,例如分子氮(N 2),一氧化碳(CO)或二氧化碳(CO 2)中的至少一种可以是 进一步用于蚀刻到碳质层。

    Method of etching an organic low-k dielectric material
    8.
    发明授权
    Method of etching an organic low-k dielectric material 失效
    蚀刻有机低k电介质材料的方法

    公开(公告)号:US07585778B2

    公开(公告)日:2009-09-08

    申请号:US11691930

    申请日:2007-03-27

    IPC分类号: H01L21/302

    CPC分类号: H01L21/31138 H01L21/6708

    摘要: A method of etching organic low-k dielectric materials is provided herein. In one embodiment, a method of etching organic low-k dielectric materials includes placing a substrate comprising an exposed organic low-k dielectric material in an etch reactor; supplying a process gas comprising an oxygen-containing gas, a nitrogen-containing gas, and methane (CH4); and forming a plasma from the process gas to etch the organic low-k dielectric material. The organic low-k dielectric material may include polymer-based low-k dielectric materials, photoresists, or organic polymers. The oxygen-containing gas may be oxygen (O2) and the nitrogen-containing gas may be nitrogen (N2).

    摘要翻译: 本文提供了一种蚀刻有机低k电介质材料的方法。 在一个实施例中,蚀刻有机低k电介质材料的方法包括将包含暴露的有机低k电介质材料的衬底放置在蚀刻反应器中; 提供包含含氧气体,含氮气体和甲烷(CH 4)的工艺气体; 以及从所述工艺气体形成等离子体以蚀刻所述有机低k电介质材料。 有机低k介电材料可以包括基于聚合物的低k介电材料,光致抗蚀剂或有机聚合物。 含氧气体可以是氧(O 2),含氮气体可以是氮气(N 2)。

    Selective etching of low-k dielectrics
    9.
    发明授权
    Selective etching of low-k dielectrics 失效
    选择性蚀刻低k电介质

    公开(公告)号:US06897154B2

    公开(公告)日:2005-05-24

    申请号:US10172243

    申请日:2002-06-14

    CPC分类号: H01L21/31116 H01L21/31144

    摘要: The present invention provides a low-k dielectric etching process with high etching selectivities with respect to adjacent layers of other materials, such as an overlying photoresist mask and an underlying barrier/liner layer. The process comprises the step of exposing a portion of the low-k dielectric layer to a plasma of a process gas that includes a fluorocarbon gas, a nitrogen-containing gas, and an inert gas, wherein the volumetric flow ratio of inert:fluorocarbon gas is in the range of 20:1 to 100:1, and the volumetric flow ratio of fluorocarbon:nitrogen-containing gas is selected to provide a low-k dielectric to photoresist etching selectivity ratio greater than about 5:1 and a low-k dielectric etch rate higher than about 4000 Å/min.

    摘要翻译: 本发明提供了相对于其它材料的相邻层(例如覆盖光致抗蚀剂掩模和下面的阻挡层/衬里层)具有高蚀刻选择性的低k电介质蚀刻工艺。 该方法包括将低k电介质层的一部分暴露于包括碳氟化合物气体,含氮气体和惰性气体的工艺气体的等离子体的步骤,其中惰性:碳氟化合物气体的体积流量比 在20:1至100:1的范围内,选择碳氟化合物:含氮气体的体积流量比以提供低k电介质至光致抗蚀剂蚀刻选择比大于约5:1,低k 介电蚀刻速率高于约4000 / min。

    Etch process for dielectric materials comprising oxidized organo silane materials
    10.
    发明授权
    Etch process for dielectric materials comprising oxidized organo silane materials 失效
    包括氧化有机硅烷材料的电介质材料的蚀刻工艺

    公开(公告)号:US06762127B2

    公开(公告)日:2004-07-13

    申请号:US09938432

    申请日:2001-08-23

    IPC分类号: H01L21304

    摘要: The present invention provides a novel etching technique for etching a layer of C-doped silicon oxide, such as a partially oxidized organo silane material. This technique, employing CH2F2/Ar chemistry at low bias and low to intermediate pressure, provides high etch selectivity to silicon oxide and improved selectivity to organic photoresist. Structures including a layer of partially oxidized organo silane material (1004) deposited on a layer of silicon oxide (1002) were etched according to the novel technique, forming relatively narrow trenches (1010, 1012, 1014, 1016, 1030, 1032, 1034 and 1036) and wider trenches (1020, 1022, 1040 and 1042). The technique is also suitable for forming dual damascene structures (1152, 1154 and 1156). In additional embodiments, manufacturing systems (1410) are provided for fabricating IC structures of the present invention. These systems include a controller (1400) that is adapted for interacting with a plurality of fabricating stations (1420, 1422, 1424, 1426 and 1428).

    摘要翻译: 本发明提供一种用于蚀刻C掺杂氧化硅层的新颖蚀刻技术,例如部分氧化的有机硅烷材料。 这种在低偏压和低至中压下使用CH2F2 / Ar化学的技术为氧化硅提供了高蚀刻选择性,并提高了对有机光致抗蚀剂的选择性。 根据新技术蚀刻包括沉积在氧化硅层(1002)上的部分氧化的有机硅烷材料层(1004)的结构,形成相对窄的沟槽(1010,1012,1014,1016,1030,1032,1034和 1036)和较宽的沟槽(1020,1022,1040和1042)。 该技术也适用于形成双镶嵌结构(1152,1154和1156)。 在另外的实施例中,提供制造系统(1410)用于制造本发明的IC结构。 这些系统包括适于与多个制造站(1420,1422,1424,1426和1428)相互作用的控制器(1400)。