公开(公告)号：US08720053B2

公开(公告)日：2014-05-13

申请号：US12535895

申请日：2009-08-05

申请人： Shih-Chang Lee ,  Kun-Ching Chen ,  Ming-Loung Lu ,  Chun-Che Lee

发明人： Shih-Chang Lee ,  Kun-Ching Chen ,  Ming-Loung Lu ,  Chun-Che Lee

IPC分类号： H01K3/10

CPC分类号： H05K1/111 ,  H01L2224/48463 ,  H05K3/061 ,  H05K3/243 ,  H05K3/328 ,  H05K2201/09472 ,  H05K2201/09736 ,  H05K2203/0361 ,  H05K2203/049 ,  Y02P70/611 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165

摘要： A process for fabricating a circuit board that includes a dielectric layer, a circuit layer, and an insulation layer. The circuit layer is disposed on the dielectric layer and has a pad region and a trace region. The insulation layer is disposed on the circuit layer and covers the trace region. Here, a thickness of the pad region is less than a thickness of the trace region.

摘要翻译： 一种制造电路板的方法，该电路板包括电介质层，电路层和绝缘层。 电路层设置在电介质层上并具有焊盘区域和迹线区域。 绝缘层设置在电路层上并覆盖迹线区域。 这里，焊盘区域的厚度小于迹线区域的厚度。

公开(公告)号：US20120091569A1

公开(公告)日：2012-04-19

申请号：US12905085

申请日：2010-10-15

申请人： Bernd Karl Appelt ,  Kay Essig ,  Yuan-Chang Su ,  Chun-Che Lee ,  Kuang-Hsiung Chen

发明人： Bernd Karl Appelt ,  Kay Essig ,  Yuan-Chang Su ,  Chun-Che Lee ,  Kuang-Hsiung Chen

IPC分类号： H01L23/495 ,  H01L21/60

CPC分类号： H01L21/561 ,  H01L21/4821 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/49582 ,  H01L23/49861 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： The package structure includes a metal sheet having a first central block, a plurality of first metal blocks, a second central block and a plurality of second metal blocks, a first finish layer and a second finish layer, at least a chip disposed on the metal sheet and a package body encapsulating the chip. The package structure may further include at least an area block for wire routing.

摘要翻译： 封装结构包括具有第一中心块，多个第一金属块，第二中心块和多个第二金属块的金属片，第一精加工层和第二精加工层，至少设置在金属上的芯片 片材和封装体封装芯片。 封装结构还可以包括用于布线的至少一个区域块。

公开(公告)号：US20100060131A1

公开(公告)日：2010-03-11

申请号：US12441214

申请日：2006-09-13

申请人： Cheng-Wei Chan ,  Ming-Hung Chen ,  Shih-Yi Wen ,  Chun-Che Lee

发明人： Cheng-Wei Chan ,  Ming-Hung Chen ,  Shih-Yi Wen ,  Chun-Che Lee

IPC分类号： H01J61/52 ,  H01J5/50

CPC分类号： H01L33/647 ,  F21K9/00 ,  F21V19/0025 ,  F21V29/773 ,  F21Y2115/10 ,  H01L33/62 ,  H01L33/642 ,  H01L2224/48091 ,  H01L2924/3011 ,  H01L2924/00014

摘要： An LED bulb structure having an insertion end includes a first electrically conducting pin, a second electrically conducting pin having a die pad at an end thereof, and an LED unit electrically connected to the first electrically conducting pin and the second electrically conducting pin through a first leading wire and a second leading wire, respectively, and a cap enclosing the above-mentioned components and leaving part of the first electrically conducting pin and the second electrically conducting pin exposed thereoutside. The first and second electrically conducting pins are adapted to form bayonet connections. An LED bulb structure having a heat dissipation element has the heat dissipation element attached to the pin portions of the electrically conducting pins. An LED bulb structure having a heat-and-electricity separated element further has a thermally conducting pin.

摘要翻译： 具有插入端的LED灯泡结构包括第一导电销，在其一端具有芯片焊盘的第二导电销以及通过第一导电销与第一导电销和第二导电销电连接的LED单元 引线和第二引线，以及封闭上述部件的盖，并使第一导电销和第二导电销的一部分露出在外侧。 第一和第二导电销适于形成卡口连接。 具有散热元件的LED灯泡结构具有安装在导电销的销部分上的散热元件。 具有热电分离元件的LED灯泡结构还具有导热销。

公开(公告)号：US5982625A

公开(公告)日：1999-11-09

申请号：US44076

申请日：1998-03-19

申请人： Kun-Ching Chen ,  Tao-Yu Chen ,  Yung-I Yeh ,  Wu-Chang Wang ,  Chun-Che Lee ,  Chun-Hsiung Huang ,  Shyh-Ing Wu

发明人： Kun-Ching Chen ,  Tao-Yu Chen ,  Yung-I Yeh ,  Wu-Chang Wang ,  Chun-Che Lee ,  Chun-Hsiung Huang ,  Shyh-Ing Wu

IPC分类号： H01L21/56 ,  H05K7/02 ,  H01L23/28

CPC分类号： H01L21/565 ,  H01L2924/0002

摘要： A semiconductor packaging device includes a printed circuit board substrate, a mold gate formed on a periphery of the printed circuit board substrate through which a package encapsulant is poured to enclose electric elements mounted on a side of the printed circuit board, and a layer of non-metallic material covered on the side of the printed circuit board substrate in the mold gate area. The package encapsulant, after hardened, is bonded with the layer of non-metallic material, and the bonded package encapsulant/the layer of non-metallic material is degatable from the mold gate.

摘要翻译： 半导体封装装置包括印刷电路板基板，形成在印刷电路板基板周边上的模具浇口，通过该模具浇注封装密封剂以封装安装在印刷电路板一侧的电气元件， 金属材料覆盖在模具浇口区域中的印刷电路板基板的侧面上。 封装密​​封剂在硬化之后与非金属材料层结合，并且结合的封装密封剂/非金属材料层可从模具浇口脱模。

公开(公告)号：US09406658B2

公开(公告)日：2016-08-02

申请号：US12972046

申请日：2010-12-17

申请人： Chun-Che Lee ,  Yuan-Chang Su ,  Ming Chiang Lee ,  Shih-Fu Huang

发明人： Chun-Che Lee ,  Yuan-Chang Su ,  Ming Chiang Lee ,  Shih-Fu Huang

IPC分类号： H01L29/40 ,  H01L23/52 ,  H01L23/48 ,  H01L25/16 ,  H01L23/538 ,  H01L23/00

CPC分类号： H01L25/16 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/24 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/24195 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00

摘要： An embedded component device includes an electronic component including an electrical contact, an upper patterned conductive layer, a dielectric layer between the upper patterned conductive layer and the electronic component, a first electrical interconnect, a lower patterned conductive layer, a conductive via, and a second electrical interconnect. The dielectric layer has a first opening exposing the electrical contact, and a second opening extending from the lower patterned conductive layer to the upper patterned conductive layer. The first electrical interconnect extends from the electrical contact to the upper patterned conductive layer, and fills the first opening. The second opening has an upper portion exposing the upper patterned conductive layer and a lower portion exposing the lower patterned conductive layer. The conductive via is located at the lower portion of the second opening. The second electrical interconnect fills the upper portion of the second opening.

摘要翻译： 嵌入式组件装置包括电子部件，其包括电接触，上图案化导电层，上图案化导电层和电子部件之间的介电层，第一电互连，下图案化导电层，导电通孔和 第二电互连。 电介质层具有暴露电接触的第一开口和从下图案化导电层延伸到上图案化导电层的第二开口。 第一电互连从电接触延伸到上图案化导电层，并填充第一开口。 第二开口具有暴露上部图案化导电层的上部和暴露下部图案化导电层的下部。 导电通孔位于第二开口的下部。 第二电互连填充第二开口的上部。

公开(公告)号：US08309400B2

公开(公告)日：2012-11-13

申请号：US12905085

申请日：2010-10-15

申请人： Bernd Karl Appelt ,  Kay Essig ,  Yuan-Chang Su ,  Chun-Che Lee ,  Kuang-Hsiung Chen

发明人： Bernd Karl Appelt ,  Kay Essig ,  Yuan-Chang Su ,  Chun-Che Lee ,  Kuang-Hsiung Chen

IPC分类号： H01L21/00

CPC分类号： H01L21/561 ,  H01L21/4821 ,  H01L23/3107 ,  H01L23/3121 ,  H01L23/49582 ,  H01L23/49861 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/32257 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： The package structure includes a metal sheet having a first central block, a plurality of first metal blocks, a second central block and a plurality of second metal blocks, a first finish layer and a second finish layer, at least a chip disposed on the metal sheet and a package body encapsulating the chip. The package structure may further include at least an area block for wire routing.

摘要翻译： 封装结构包括具有第一中心块，多个第一金属块，第二中心块和多个第二金属块的金属片，第一精加工层和第二精加工层，至少设置在金属上的芯片 片材和封装体封装芯片。 封装结构还可以包括用于布线的至少一个区域块。

公开(公告)号：US20120153493A1

公开(公告)日：2012-06-21

申请号：US12972046

申请日：2010-12-17

申请人： CHUN-CHE LEE ,  YUAN-CHANG SU ,  MING CHIANG LEE ,  SHIH-FU HUANG

发明人： CHUN-CHE LEE ,  YUAN-CHANG SU ,  MING CHIANG LEE ,  SHIH-FU HUANG

IPC分类号： H01L23/48 ,  H01L21/28

CPC分类号： H01L25/16 ,  H01L23/5389 ,  H01L24/16 ,  H01L24/24 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L2224/04105 ,  H01L2224/16225 ,  H01L2224/24195 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/15153 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2924/00

摘要： An embedded component device includes an electronic component including an electrical contact, an upper patterned conductive layer, a dielectric layer between the upper patterned conductive layer and the electronic component, a first electrical interconnect, a lower patterned conductive layer, a conductive via, and a second electrical interconnect. The dielectric layer has a first opening exposing the electrical contact, and a second opening extending from the lower patterned conductive layer to the upper patterned conductive layer. The first electrical interconnect extends from the electrical contact to the upper patterned conductive layer, and fills the first opening. The second opening has an upper portion exposing the upper patterned conductive layer and a lower portion exposing the lower patterned conductive layer. The conductive via is located at the lower portion of the second opening. The second electrical interconnect fills the upper portion of the second opening.

摘要翻译： 嵌入式组件装置包括电子部件，其包括电接触，上图案化导电层，上图案化导电层和电子部件之间的介电层，第一电互连，下图案化导电层，导电通孔和 第二电互连。 电介质层具有暴露电接触的第一开口和从下图案化导电层延伸到上图案化导电层的第二开口。 第一电互连从电接触延伸到上图案化导电层，并填充第一开口。 第二开口具有暴露上部图案化导电层的上部和暴露下部图案化导电层的下部。 导电通孔位于第二开口的下部。 第二电互连填充第二开口的上部。

公开(公告)号：US20100071937A1

公开(公告)日：2010-03-25

申请号：US12535895

申请日：2009-08-05

申请人： Shih-Chang Lee ,  Kun-Ching Chen ,  Ming-Loung Lu ,  Chun-Che Lee

发明人： Shih-Chang Lee ,  Kun-Ching Chen ,  Ming-Loung Lu ,  Chun-Che Lee

IPC分类号： H05K1/09 ,  H05K3/10

CPC分类号： H05K1/111 ,  H01L2224/48463 ,  H05K3/061 ,  H05K3/243 ,  H05K3/328 ,  H05K2201/09472 ,  H05K2201/09736 ,  H05K2203/0361 ,  H05K2203/049 ,  Y02P70/611 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49155 ,  Y10T29/49158 ,  Y10T29/49165

摘要： A circuit board includes a dielectric layer, a circuit layer, and an insulation layer. The circuit layer is disposed on the dielectric layer and has a pad region and a trace region. The insulation layer is disposed on the circuit layer and covers the trace region. Here, a thickness of the pad region is less than a thickness of the trace region.

摘要翻译： 电路板包括电介质层，电路层和绝缘层。 电路层设置在电介质层上并具有焊盘区域和迹线区域。 绝缘层设置在电路层上并覆盖迹线区域。 这里，焊盘区域的厚度小于迹线区域的厚度。

公开(公告)号：US07910395B2

公开(公告)日：2011-03-22

申请号：US12441204

申请日：2006-09-13

申请人： Shih-Chang Shei ,  Ming-Hung Chen ,  Shih-Yi Wen ,  Chun-Che Lee

发明人： Shih-Chang Shei ,  Ming-Hung Chen ,  Shih-Yi Wen ,  Chun-Che Lee

IPC分类号： H01L21/00

CPC分类号： H01L27/156 ,  H01L33/385 ,  H01L33/44 ,  H01L33/62 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2224/05099

摘要： An LED structure includes a first substrate; an adhering layer formed on the first substrate; first ohmic contact layers formed on the adhering layer; epi-layers formed on the first ohmic contact layers; a first isolation layer covering the first ohmic contact layers and the epi-layers at exposed surfaces thereof; and first electrically conducting plates and second electrically conducting plates, both formed in the first isolation layer and electrically connected to the first ohmic contact layers and the epi-layers, respectively. The trenches allow the LED structure to facilitate complex serial/parallel connection so as to achieve easy and various applications of the LED structure in the form of single structures under a high-voltage environment.

摘要翻译： LED结构包括第一基板; 形成在所述第一基板上的粘附层; 形成在粘附层上的第一欧姆接触层; 形成在第一欧姆接触层上的外延层; 覆盖其暴露表面的第一欧姆接触层和外延层的第一隔离层; 以及第一导电板和第二导电板，两者分别形成在第一隔离层中并电连接到第一欧姆接触层和外延层。 沟槽允许LED结构促进复杂的串联/并联连接，以便在高压环境下以单结构的形式实现LED结构的简单和多种应用。

公开(公告)号：US20100059733A1

公开(公告)日：2010-03-11

申请号：US12441204

申请日：2006-09-13

申请人： Shih-Chang Shei ,  Ming-Hung Chen ,  Shih-Yi Wen ,  Chun-Che Lee

发明人： Shih-Chang Shei ,  Ming-Hung Chen ,  Shih-Yi Wen ,  Chun-Che Lee

IPC分类号： H01L33/00

CPC分类号： H01L27/156 ,  H01L33/385 ,  H01L33/44 ,  H01L33/62 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/16225 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2224/05099

摘要： An LED structure includes a first substrate; an adhering layer formed on the first substrate; first ohmic contact layers formed on the adhering layer; epi-layers formed on the first ohmic contact layers; a first isolation layer covering the first ohmic contact layers and the epi-layers at exposed surfaces thereof; and first electrically conducting plates and second electrically conducting plates, both formed in the first isolation layer and electrically connected to the first ohmic contact layers and the epi-layers, respectively. The first trenches or the second trenches allow the LED structure to facilitate complex serial/parallel connection so as to achieve easy and various applications of the LED structure in the form of single structures under a high-voltage environment.

摘要翻译： LED结构包括第一基板; 形成在所述第一基板上的粘附层; 形成在粘附层上的第一欧姆接触层; 形成在第一欧姆接触层上的外延层; 覆盖其暴露表面的第一欧姆接触层和外延层的第一隔离层; 以及第一导电板和第二导电板，两者分别形成在第一隔离层中并电连接到第一欧姆接触层和外延层。 第一沟槽或第二沟槽允许LED结构促进复杂的串联/并联连接，以便在高压环境下以单结构的形式实现LED结构的简单和多种应用。