公开(公告)号：US20100259350A1

公开(公告)日：2010-10-14

申请号：US12752529

申请日：2010-04-01

Applicant: Jeff Biar ,  Jacky Lee

Inventor： Jeff Biar ,  Jacky Lee

IPC: H01F27/28

CPC classification number: H01F17/0033 ,  H01F2027/2814

Abstract: A microinductor comprises an insulating substrate, a lower conductive winding, an upper conductive winding, and a core. The lower conductive winding is disposed on an upper surface of the substrate. The core is made of a material with high permeability and stacked over the lower conductive winding. The upper conductive winding is disposed on an upper surface of the core. The upper conductive winding electrically interconnects with the lower conductive winding so as to form an inductor coil.

Abstract translation: 微电感器包括绝缘衬底，下导电绕组，上导电绕组和芯。 下导电绕组设置在基板的上表面上。 芯由具有高磁导率的材料制成，并且堆叠在下导电绕组上。 上导电绕组设置在芯的上表面上。 上导电绕组与下导电绕组电连接以形成电感线圈。

公开(公告)号：US20100164058A1

公开(公告)日：2010-07-01

申请号：US12429870

申请日：2009-04-24

Applicant: Jeff BIAR ,  Jacky Lee

Inventor： Jeff BIAR ,  Jacky Lee

IPC: H01L27/04

CPC classification number: H01L23/3121 ,  H01L23/645 ,  H01L24/48 ,  H01L24/73 ,  H01L25/16 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/19103 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor chip package with inductors includes a substrate, a semiconductor chip, an inductor and an insulator cover. The substrate has an active surface with a patterned circuit thereon. The inductor disposes on the active surface of the substrate. The semiconductor chip stacks over the inductor and electrically interconnects with the patterned circuit of the substrate and the inductor. The insulator cover encapsulates the inductor and the chip.

Abstract translation: 具有电感器的半导体芯片封装包括基板，半导体芯片，电感器和绝缘体盖。 衬底具有其上具有图案化电路的有源表面。 电感器设置在基板的有源表面上。 半导体芯片堆叠在电感器上并与衬底和电感器的图案化电路电互连。 绝缘体盖封装电感和芯片。

公开(公告)号：US08468888B2

公开(公告)日：2013-06-25

申请号：US12951738

申请日：2010-11-22

Applicant: Ming-Ching Wu ,  Chih-Kung Huang ,  Jeff Biar ,  Kazuhiro Okada

Inventor： Ming-Ching Wu ,  Chih-Kung Huang ,  Jeff Biar ,  Kazuhiro Okada

IPC: G01P15/12 ,  G01P15/125 ,  G01L7/08

CPC classification number: G01P15/125 ,  B81B2201/0235 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C1/00158 ,  G01L9/0045 ,  G01L9/0054 ,  G01L9/0073 ,  G01L19/0092 ,  G01P15/123 ,  G01P2015/084

Abstract: A MEMS sensor capable of sensing acceleration and pressure includes a frame, a proof mass and flexible bridges connected between the frame and the proof mass in such a way that the proof mass is moveably suspended inside the frame. The proof mass is provided with a pressure sensing diaphragm and a sealed chamber corresponding to the diaphragm such that the proof mass is not only served as a moveable sensing element for acceleration measurement but also a pressure sensing element.

Abstract translation: 能够感测加速和压力的MEMS传感器包括框架，检测质量块和连接在框架和检验质量块之间的柔性桥梁，使得证明块可移动地悬挂在框架内。 检测质量体设有压力检测膜片和对应于隔膜的密封腔室，使得检测质量块不仅用作用于加速测量的可移动感测元件，而且还用作压力感测元件。

公开(公告)号：US20080248270A1

公开(公告)日：2008-10-09

申请号：US11972343

申请日：2008-01-10

Applicant: Jeff Biar ,  Chih-Kung Huang

Inventor： Jeff Biar ,  Chih-Kung Huang

IPC: H01L29/12

CPC classification number: H01L21/4846 ,  H01L21/4832 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3121 ,  H01L23/49816 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2224/73265 ,  Y10T428/24612 ,  Y10T428/24967 ,  H01L2924/00012

Abstract: A substrate for chip packaging comprises a carrier layer, an etching stopper and an active layer. The carrier layer is made of a conductive metal sheet with a predetermined thickness. The etching stopper is disposed on a side of the carrier layer. The active layer is made of conductive metal materials and disposed on a free side of the etching stopper in a wiring pattern formed by an etching process operating on the active layer.

Abstract translation: 用于芯片封装的衬底包括载体层，蚀刻阻挡层和有源层。 载体层由具有预定厚度的导电金属片制成。 蚀刻阻挡件设置在载体层的一侧。 有源层由导电金属材料制成，并且通过在有源层上操作的蚀刻工艺形成的布线图案中设置在蚀刻阻挡层的自由侧上。

公开(公告)号：US20080224299A1

公开(公告)日：2008-09-18

申请号：US11868092

申请日：2007-10-05

Applicant: Jeff BIAR ,  Chih-Kung HUANG

Inventor： Jeff BIAR ,  Chih-Kung HUANG

IPC: H01L23/48

CPC classification number: H01L23/13 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/4911 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/18165 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A base substrate for chip scale package includes a carrier member made of electrical conductive metals with a first through opening; an active member laminated by a base layer made of electrical conductive metal and an intermediate layer made of electrical insulating or dielectric material, the active member having a through opening with a diameter larger that the diameter of the through opening of the base metal member; the active member being coupled with the carrier member in such a way that the intermediate layer is adhered to an upper surface of the carrier member, and these through openings are aligned to define a shoulder around the through opening of the base metal plate.

Abstract translation: 用于芯片级封装的基底衬底包括由具有第一通孔的导电金属制成的载体构件; 由导电金属制成的基层层叠的活性物质和由电绝缘或电介质材料制成的中间层，所述活性构件具有直径大于所述基底金属构件的通孔的直径的通孔; 活性构件与载体构件结合，使得中间层粘附到载体构件的上表面，并且这些通孔对齐以限定围绕贱金属板的通孔的肩部。

公开(公告)号：US20110228481A1

公开(公告)日：2011-09-22

申请号：US12727870

申请日：2010-03-19

Applicant: Jeff BIAR

Inventor： Jeff BIAR

IPC: H05K7/20 ,  F28F7/00

CPC classification number: C09K5/14

Abstract: A highly thermally conductive interface means comprises a plurality of non-particulate solid components and a liquid bonding paste. The non-particulate solid components are made of high heat-conducting materials and dispersedly disposed on interfaces between heat sources and heat sinks. The liquid bonding paste is applied on interfaces between heat sources and heat sinks and filled into gaps formed among each of said non-particulate solid components so that the heat sources, heat sinks and each of said non-particulate solid components are bonded together.

Abstract translation: 高导热性界面装置包括多个非颗粒固体组分和液体粘合膏。 非颗粒固体组分由高导热材料制成，并分散地设置在热源和散热片之间的界面上。 将液体粘合膏施加到热源和散热器之间的界面上，并填充到每个所述非颗粒固体组分之间形成的间隙中，使得热源，散热器和每个所述非颗粒固体组分结合在一起。

公开(公告)号：US20110141747A1

公开(公告)日：2011-06-16

申请号：US12694449

申请日：2010-01-27

Applicant: Jeff BIAR

Inventor： Jeff BIAR

IPC: F21V3/00 ,  H01K1/30

CPC classification number: H01K1/30 ,  F21K9/232 ,  F21V3/02 ,  F21V5/00 ,  F21Y2115/10

Abstract: A bulb for an electric lamp having a light-emitting element includes a light transmittable shell body for housing the light-emitting element. The light transmittable shell body includes an accommodation for receiving the light-emitting element of the electric lamp, and an inner surface surrounding the accommodation. On the inner surface of the light transmittable shell body a plurality of light-guiding portions are provided for guiding the light emitted from the light-emitting element towards an outside of the light transmittable shell body.

Abstract translation: 用于具有发光元件的电灯的灯泡包括用于容纳发光元件的透光壳体。 光透射壳体包括用于接收电灯的发光元件的容纳部和围绕容纳部的内表面。 在透光壳体的内表面上设置有多个导光部，用于将从发光元件射出的光朝向可透光壳体的外侧引导。

公开(公告)号：US20110127191A1

公开(公告)日：2011-06-02

申请号：US12700070

申请日：2010-02-04

Applicant: Jeff BIAR

Inventor： Jeff BIAR

IPC: B65D1/34

CPC classification number: B65D81/05 ,  H01L21/67333

Abstract: A method includes the steps of preparing a tray having at least one chamber with an opening facing upward; placing at least one electronic component in the chamber; filling the chamber with a liquid that does not react with the at least one electronic component; and sealing the chamber. In light of this, when the electronic component having any kind of shape is placed in the chamber, the space for movement of the electronic component is limited, so that the electronic component is not subject to damage incurred by collision during transportation. In light of this, the chances of damaging the electronic component during transportation can be effectively decreased.

Abstract translation: 一种方法包括以下步骤：制备具有至少一个具有向上开口的开口的托盘; 将至少一个电子部件放置在所述腔室中; 用不与所述至少一个电子部件反应的液体填充所述室; 并密封腔室。 因此，当将具有任何形状的电子部件放置在室中时，电子部件的移动空间受到限制，使得电子部件在运输过程中不会发生碰撞。 鉴于此，可有效降低运输过程中损坏电子部件的机会。

公开(公告)号：US20130213698A1

公开(公告)日：2013-08-22

申请号：US13540967

申请日：2012-07-03

Applicant: Jeff BIAR ,  Chih-Kung Huang ,  Ming-Ching Wu

Inventor： Jeff BIAR ,  Chih-Kung Huang ,  Ming-Ching Wu

IPC: H05K1/03

CPC classification number: H01L23/053 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014

Abstract: A holder includes a main body on which a plurality of circuit lines are laid out. The main body is integrally molded from a plastic material and can be formed thereon with a circuit layout by a specific process, such as a laser activated and chemical plating process. The main body includes a chamber having an opening formed at the top side of the main body, a base surface, and a stepped wall. Each of the circuit lines is arranged on the stepped wall of the chamber stereoscopically. Thus, the holder does not need to make a hole running therethrough to reach electrical connection between surfaces of different heights. Besides, the circuit lines are arranged stereoscopically, so they can extend to the top and bottom sides of the holder. Therefore, the holder can be applied to not only the traditional package but an upside-down package.

Abstract translation: 保持器包括其上布置有多条电路线的主体。 主体由塑料材料整体成型，可通过特定工艺（如激光活化和化学镀敷）在其上形成电路布局。 主体包括具有形成在主体的顶侧的开口的腔室，基部表面和台阶壁。 每个电路线被立体地布置在腔室的台阶壁上。 因此，保持器不需要使穿过其中的孔到达不同高度的表面之间的电连接。 此外，电路线被立体地布置，因此它们可以延伸到保持器的顶侧和底侧。 因此，支架不仅可以应用于传统的包装，还可以应用于颠倒包装。

公开(公告)号：US20120099285A1

公开(公告)日：2012-04-26

申请号：US13014214

申请日：2011-01-26

Applicant: Jeff BIAR ,  Chih-Kung HUANG

Inventor： Jeff BIAR ,  Chih-Kung HUANG

IPC: H05K1/16 ,  H01F5/00

CPC classification number: H01L23/49894 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L24/48 ,  H01L2224/05554 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/30107 ,  H05K1/165 ,  H05K3/284 ,  H05K3/4629 ,  H05K2201/086 ,  H05K2203/1316 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A substrate for chip packaging includes a laminated board made of a plurality of ferrite sheets and a coil component disposed on the board. The coil component includes a first coil conductor, a second coil conductor, and a first via-hole conductor. The first coil conductor is disposed on a surface of a first sheet of the board. The second coil conductor is disposed on a surface of a second sheet of the board. The first via-hole conductor includes a first through hole formed at the first sheet and a first conductor filled in the first through hole. The substrate further includes a top surface having a plurality of first conductive pads, and a bottom surface having a plurality of second conductive pads. Each of the first conductive pads is electrically connected with each of the second conductive pads.

Abstract translation: 用于芯片封装的基板包括由多个铁氧体片制成的层压板和设置在板上的线圈部件。 线圈部件包括第一线圈导体，第二线圈导体和第一通孔导体。 第一线圈导体设置在板的第一片的表面上。 第二线圈导体设置在板的第二片的表面上。 第一通孔导体包括形成在第一片上的第一通孔和填充在第一通孔中的第一导体。 基板还包括具有多个第一导电焊盘的顶表面和具有多个第二导电焊盘的底表面。 每个第一导电焊盘与每个第二导电焊盘电连接。