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公开(公告)号：US20200006258A1
公开(公告)日：2020-01-02
申请号：US16024702
申请日：2018-06-29
申请人： Aleksandar ALEKSOV , Thomas SOUNART , Kristof DARMAWIKARTA , Henning BRAUNISCH , Prithwish CHATTERJEE , Andrew J. BROWN
发明人： Aleksandar ALEKSOV , Thomas SOUNART , Kristof DARMAWIKARTA , Henning BRAUNISCH , Prithwish CHATTERJEE , Andrew J. BROWN
IPC分类号： H01L23/64 , H01L23/00 , H01L23/498 , H01L21/48
摘要： Embodiments include an electronic package that includes a dielectric layer and a capacitor on the dielectric layer. In an embodiment, the capacitor comprises a first electrode disposed over the dielectric layer and a capacitor dielectric layer over the first electrode. In an embodiment, the capacitor dielectric layer is an amorphous dielectric layer. In an embodiment, the electronic package may also comprise a second electrode over the capacitor dielectric layer.
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公开(公告)号：US20230087124A1
公开(公告)日：2023-03-23
申请号：US17483013
申请日：2021-09-23
申请人： Bai Nie , Pooya Tadayon , Leonel R. Arana , Yonggang Li , Changhua Liu , Kristof Darmawikarta , Srinivas Venkata Ramanuja Pietambaram , Tarek A. Ibrahim , Hari Mahalingam , Benjamin Duong
发明人： Bai Nie , Pooya Tadayon , Leonel R. Arana , Yonggang Li , Changhua Liu , Kristof Darmawikarta , Srinivas Venkata Ramanuja Pietambaram , Tarek A. Ibrahim , Hari Mahalingam , Benjamin Duong
IPC分类号： G02B6/42
摘要： Various embodiments disclosed relate to photonic assemblies. The present disclosure includes methods for packaging a photonic assembly, including attaching a bridge die to a glass substrate, attaching an electronic integrated circuit die to the glass substrate and the bridge die, attaching a photonic integrated circuit die to the glass substrate and the bridge die, bonding a coupling adapter to the glass substrate and in situ forming a waveguide in the coupling adapted, the waveguide aligning with the photonic integrated circuit die.
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公开(公告)号：US20230101629A1
公开(公告)日：2023-03-30
申请号：US17484315
申请日：2021-09-24
申请人： Bohan Shan , Dingying Xu , Kristof Darmawikarta , Srinivas Venkata Ramanuja Pietambaram , Hongxia Feng , Gang Duan , Jung Kyu Han , Xiaoying Guo , Jeremy D. Ecton , Santosh Tripathi , Bai Nie , Haobo Chen , Kyle Jordan Arrington , Yue Deng , Wei Wei
发明人： Bohan Shan , Dingying Xu , Kristof Darmawikarta , Srinivas Venkata Ramanuja Pietambaram , Hongxia Feng , Gang Duan , Jung Kyu Han , Xiaoying Guo , Jeremy D. Ecton , Santosh Tripathi , Bai Nie , Haobo Chen , Kyle Jordan Arrington , Yue Deng , Wei Wei
摘要： Various embodiments disclosed relate to methods of making omni-directional semiconductor interconnect bridges. The present disclosure includes semiconductor assemblies including a mold layer having mold material, a first filler material dispersed in the mold material, and a second filler material dispersed in the mold material, wherein the second filler material is heterogeneously dispersed.
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公开(公告)号：US10043740B2
公开(公告)日：2018-08-07
申请号：US15208313
申请日：2016-07-12
申请人： Sri Ranga Sai Boyapati , Rahul N. Manepalli , Dilan Seneviratne , Srinivas V. Pietambaram , Kristof Darmawikarta , Robert Alan May , Islam A. Salama
发明人： Sri Ranga Sai Boyapati , Rahul N. Manepalli , Dilan Seneviratne , Srinivas V. Pietambaram , Kristof Darmawikarta , Robert Alan May , Islam A. Salama
IPC分类号： H01L23/48 , H01L23/498 , H01L21/02 , H01L21/48 , H01L23/00 , H01L25/065
摘要： Semiconductor packages with interconnects having passivation thereon is disclosed. The passivation layer may be any suitable dielectric material that may overlie a build-up dielectric layer and metal traces of an interconnect layer in a semiconductor package. Via holes may be formed in the build-up dielectric and the passivation layer may be removed from the bottom of the via hole. By removing the passivation layer at the bottom of the via hole, any residual build-up dielectric may also be removed from the bottom of the via hole. Thus removal of the residual build-up dielectric may not require a desmear process that would otherwise roughen metal and/or dielectric surfaces. The resulting smoother metal and/or dielectric surfaces enabled by the use of the passivation layer may allow greater process latitude and/or flexibility to fabricate relatively smaller dimensional interconnect features and/or relatively improved signaling frequency and integrity.
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公开(公告)号：US20230194786A1
公开(公告)日：2023-06-22
申请号：US17559871
申请日：2021-12-22
CPC分类号： G02B6/124 , G02B6/34 , G02B6/12004 , G02B2006/12142 , G02B2006/1204
摘要： Embodiments herein relate to systems, apparatuses, or processes directed to an integrated optical coupler that may be used to optically couple a waveguide and a PIC. In embodiments, the integrated optical coupler may include an optical diffraction grating mechanism, an optical lens, and a Faraday rotator. In embodiments, the integrated optical coupler may at least partially within a housing. Other embodiments may be described and/or claimed.
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公开(公告)号：US20230090133A1
公开(公告)日：2023-03-23
申请号：US17481027
申请日：2021-09-21
申请人： Bai Nie , Pooya Tadayon , Leonel R. Arana , Yonggang Li , Changhua Liu , Kristof Darmawikarta , Srinivas Venkata Ramanuja Pietambaram , Tarek A. Ibrahim , Hari Mahalingam , Benjamin Duong
发明人： Bai Nie , Pooya Tadayon , Leonel R. Arana , Yonggang Li , Changhua Liu , Kristof Darmawikarta , Srinivas Venkata Ramanuja Pietambaram , Tarek A. Ibrahim , Hari Mahalingam , Benjamin Duong
摘要： An electronic device and associated methods are disclosed. In one example, the electronic device includes a photonic integrated circuit and an in situ formed waveguide. In selected examples, the electronic device includes a photonic integrated circuit coupled to an electronic integrated circuit, in a glass layer, where a waveguide is formed in the glass layer.
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公开(公告)号：US20220413235A1
公开(公告)日：2022-12-29
申请号：US17358530
申请日：2021-06-25
IPC分类号： G02B6/42 , H01L25/16 , H01L23/00 , H01L23/367
摘要： Embodiments described herein may be related to apparatuses, processes, and techniques related to creating deep cavities within a substrate or at an edge of the substrate, by etching a cavity in the substrate to a first copper stop layer, removing the first copper stop layer, and then etching deeper into the cavity to a second copper stop layer. In embodiments this process may be repeated until the desired cavity depth is reached. Other embodiments may be described and/or claimed.
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公开(公告)号：US20170064821A1
公开(公告)日：2017-03-02
申请号：US14840979
申请日：2015-08-31
CPC分类号： H05K1/0298 , H01L23/49822 , H01L23/49838 , H05K1/113 , H05K3/0041 , H05K3/181 , H05K3/188 , H05K3/4038 , H05K3/422 , H05K3/429 , H05K3/4644 , H05K2201/09218 , H05K2201/09372 , H05K2201/095 , H05K2201/096 , H05K2201/09654 , H05K2203/0548
摘要： Some example forms relate to an electronic package. The electronic package includes a first dielectric layer that includes an electrical trace formed on a surface of the first dielectric layer and a second dielectric layer on the surface of the first dielectric layer. The second dielectric layer includes an opening. The electrical trace is within the opening. The electronic package includes an electrical interconnect that fills the opening and extends above an upper surface of the second dielectric layer such that the electrically interconnect is electrically connected to the electrical trace on the first dielectric layer.
摘要翻译： 一些示例形式涉及电子包装。 电子封装包括第一电介质层，其包括形成在第一电介质层的表面上的电迹线和在第一电介质层的表面上的第二电介质层。 第二电介质层包括开口。 电迹线在开口内。 电子封装包括电互连，其填充开口并且在第二电介质层的上表面上方延伸，使得电互连电连接到第一电介质层上的电迹线。
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公开(公告)号：US20230082385A1
公开(公告)日：2023-03-16
申请号：US17474255
申请日：2021-09-14
申请人： Jeremy D. Ecton , Kristof Darmawikarta , Sashi S. Kandanur , Srinivas Venkata Ramanuja Pietambaram , Darko Grujicic , Marcel Arlan Wall , Suddhasattwa Nad , Benjamin Duong , Rengarajan Shanmugam , Bai Nie , Helme Castro De La Torre
发明人： Jeremy D. Ecton , Kristof Darmawikarta , Sashi S. Kandanur , Srinivas Venkata Ramanuja Pietambaram , Darko Grujicic , Marcel Arlan Wall , Suddhasattwa Nad , Benjamin Duong , Rengarajan Shanmugam , Bai Nie , Helme Castro De La Torre
IPC分类号： H01L21/48 , H01L23/498
摘要： An electronic device comprises an electronic package with a glass core. The glass core includes a first surface and a second surface opposite the first surface, at least one through-glass via (TGV) extending through the glass core from the first surface to the second surface, and including an electrically conductive material, and wherein the at least one TGV includes a first portion having a first width and a second portion having a second width different from the first width.
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公开(公告)号：US20230072096A1
公开(公告)日：2023-03-09
申请号：US17470652
申请日：2021-09-09
申请人： Hiroki Tanaka , Brandon C. Marin , Kristof Darmawikarta , Srinivas Venkata Ramanuja Pietambaram , Jeremy D. Ecton , Rajeev Ranjan
发明人： Hiroki Tanaka , Brandon C. Marin , Kristof Darmawikarta , Srinivas Venkata Ramanuja Pietambaram , Jeremy D. Ecton , Rajeev Ranjan
摘要： An electro-optical system having one or more electro-optical devices integrally formed within a substrate and associated methods are disclosed. An electro-optical system including an electro-optic switch is shown. An electro-optical system including an electro-optic modulator is shown. An electro-optical system including an optical resonator is shown.
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