公开(公告)号：US20130249112A1

公开(公告)日：2013-09-26

申请号：US13897202

申请日：2013-05-17

申请人： Todd B. Myers ,  Nicolas R. Watts ,  Eric C. Palmer ,  Jui Min Lim

发明人： Todd B. Myers ,  Nicolas R. Watts ,  Eric C. Palmer ,  Jui Min Lim

IPC分类号： H01L21/768 ,  H01L23/48

CPC分类号： H01L21/76897 ,  H01L21/486 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/64 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/1902 ,  H05K1/115 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/06 ,  H05K3/4053 ,  H05K3/421 ,  H05K2201/086 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/09645 ,  H05K2201/09663 ,  H05K2201/09763 ,  H05K2201/09809 ,  H05K2201/09827 ,  H05K2201/09981 ,  Y10S257/916 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49133 ,  Y10T29/49147 ,  Y10T29/49165 ,  H01L2924/00

摘要： A method of forming a device associated with a via includes forming an opening or via, and forming at least a pair of conducting paths within the via. Also disclosed is a via having at pair of conducting paths therein.

摘要翻译： 形成与通孔相关的器件的方法包括形成开口或通孔，并在通孔内形成至少一对导电通路。 还公开了一种在其中具有一对导电路径的通孔。

公开(公告)号：US08487446B2

公开(公告)日：2013-07-16

申请号：US13095317

申请日：2011-04-27

申请人： Todd B Myers ,  Nicolas R Watts ,  Eric C Palmer ,  Jui Min Lim

发明人： Todd B Myers ,  Nicolas R Watts ,  Eric C Palmer ,  Jui Min Lim

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L21/76897 ,  H01L21/486 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/64 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/1902 ,  H05K1/115 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/06 ,  H05K3/4053 ,  H05K3/421 ,  H05K2201/086 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/09645 ,  H05K2201/09663 ,  H05K2201/09763 ,  H05K2201/09809 ,  H05K2201/09827 ,  H05K2201/09981 ,  Y10S257/916 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49133 ,  Y10T29/49147 ,  Y10T29/49165 ,  H01L2924/00

摘要： A method of forming a device associated with a via includes forming an opening or via, and forming at least a pair of conducting paths within the via. Also disclosed is a via having at pair of conducting paths therein.

摘要翻译： 形成与通孔相关的器件的方法包括形成开口或通孔，并在通孔内形成至少一对导电通路。 还公开了一种在其中具有一对导电路径的通孔。

公开(公告)号：US20120074209A1

公开(公告)日：2012-03-29

申请号：US12890662

申请日：2010-09-25

申请人： Tao WU ,  Nicolas R. Watts

发明人： Tao WU ,  Nicolas R. Watts

IPC分类号： B23K1/20 ,  C25D1/00

CPC分类号： H01L21/486 ,  C23C18/1653 ,  H01L23/142 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/00

摘要： Electronic assemblies including coreless substrates and their manufacture using electrolytic plating, are described. One method includes providing a core comprising a metal, and forming a dielectric material on the core. The method also includes forming vias in the dielectric material, the vias positioned to expose metal regions. The method also performing an electrolytic plating of metal into the vias and on the metal regions, wherein the core is electrically coupled to a power supply during the electrolytic plating of metal into the vias and delivers current to the metal regions. The method also includes removing the metal core after the electrolytic plating of metal into the vias. Other embodiments are described and claimed.

摘要翻译： 描述了包括无芯基板的电子组件及其使用电解电镀的制造。 一种方法包括提供包括金属的芯，并在芯上形成电介质材料。 该方法还包括在电介质材料中形成通孔，定位为使金属区域露出的通孔。 该方法还执行金属的电解电镀到通孔和金属区域中，其中在将金属电解电镀到通孔中并将电流传送到金属区域时，芯与电源电耦合。 该方法还包括在金属电镀到通孔中之后去除金属芯。 描述和要求保护其他实施例。

公开(公告)号：US08127979B1

公开(公告)日：2012-03-06

申请号：US12890662

申请日：2010-09-25

申请人： Tao Wu ,  Nicolas R. Watts

发明人： Tao Wu ,  Nicolas R. Watts

IPC分类号： B23K31/02 ,  C23D5/02

CPC分类号： H01L21/486 ,  C23C18/1653 ,  H01L23/142 ,  H01L23/49811 ,  H01L23/49822 ,  H01L23/49827 ,  H01L2224/16225 ,  H01L2924/12044 ,  H01L2924/15311 ,  H01L2924/00

摘要： Electronic assemblies including coreless substrates and their manufacture using electrolytic plating, are described. One method includes providing a core comprising a metal, and forming a dielectric material on the core. The method also includes forming vias in the dielectric material, the vias positioned to expose metal regions. The method also performing an electrolytic plating of metal into the vias and on the metal regions, wherein the core is electrically coupled to a power supply during the electrolytic plating of metal into the vias and delivers current to the metal regions. The method also includes removing the metal core after the electrolytic plating of metal into the vias. Other embodiments are described and claimed.

摘要翻译： 描述了包括无芯基板的电子组件及其使用电解电镀的制造。 一种方法包括提供包括金属的芯，并在芯上形成电介质材料。 该方法还包括在电介质材料中形成通孔，定位为使金属区域露出的通孔。 该方法还执行金属的电解电镀到通孔和金属区域中，其中在将金属电解电镀到通孔中并将电流传送到金属区域时，芯与电源电耦合。 该方法还包括在金属电镀到通孔中之后去除金属芯。 描述和要求保护其他实施例。