公开(公告)号：US20130088838A1

公开(公告)日：2013-04-11

申请号：US13567388

申请日：2012-08-06

申请人： JAE JUN LEE ,  Jeong Hyeon Cho ,  Baek Kyu Choi ,  Sun Won Kang ,  Jung Joon Lee

发明人： JAE JUN LEE ,  Jeong Hyeon Cho ,  Baek Kyu Choi ,  Sun Won Kang ,  Jung Joon Lee

IPC分类号： H05K7/00 ,  H01L21/50 ,  H01L23/50

CPC分类号： H01L23/647 ,  H01L23/3128 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/16 ,  H01L25/18 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48195 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06575 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/1301 ,  H01L2924/1434 ,  H01L2924/1436 ,  H01L2924/1437 ,  H01L2924/1441 ,  H01L2924/1443 ,  H01L2924/14511 ,  H01L2924/15311 ,  H01L2924/157 ,  H01L2924/15787 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/19015 ,  H01L2924/1902 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/85399 ,  H01L2224/05599

摘要： A die package includes a substrate, a die mounted on the substrate, and a ZQ resistor disposed in the die package and connected to the substrate and the die. The ZQ resistor may be used to calibrate impedance of the die.

摘要翻译： 模具封装包括基板，安装在基板上的管芯和设置在管芯封装中并连接到基板和管芯的ZQ电阻器。 ZQ电阻可用于校准模具的阻抗。

公开(公告)号：US07952202B2

公开(公告)日：2011-05-31

申请号：US11847985

申请日：2007-08-30

申请人： Todd B Myers ,  Nicholas R. Watts ,  Eric C Palmer ,  Jui Min Lim

发明人： Todd B Myers ,  Nicholas R. Watts ,  Eric C Palmer ,  Jui Min Lim

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H01L21/76897 ,  H01L21/486 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/64 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/1902 ,  H05K1/115 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/06 ,  H05K3/4053 ,  H05K3/421 ,  H05K2201/086 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/09645 ,  H05K2201/09663 ,  H05K2201/09763 ,  H05K2201/09809 ,  H05K2201/09827 ,  H05K2201/09981 ,  Y10S257/916 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49133 ,  Y10T29/49147 ,  Y10T29/49165 ,  H01L2924/00

摘要： A method of forming a device associated with a via includes forming an opening or via, and forming at least a pair of conducting paths within the via. Also disclosed is a via having at pair of conducting paths therein.

摘要翻译： 形成与通孔相关的器件的方法包括形成开口或通孔，并在通孔内形成至少一对导电通路。 还公开了一种在其中具有一对导电路径的通孔。

公开(公告)号：US07326636B2

公开(公告)日：2008-02-05

申请号：US11135967

申请日：2005-05-24

申请人： Ling Liu ,  Albert An-Bon Yeh ,  Paul Thomas Carson

发明人： Ling Liu ,  Albert An-Bon Yeh ,  Paul Thomas Carson

IPC分类号： H01L21/44 ,  H01L23/48

CPC分类号： H05K3/28 ,  H01L21/4853 ,  H01L24/03 ,  H01L24/05 ,  H01L2224/05599 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15787 ,  H01L2924/1902 ,  H05K1/092 ,  H05K1/167 ,  H05K3/0023 ,  H05K3/3452 ,  H05K3/3478 ,  H05K3/3484 ,  H05K2203/041 ,  H05K2203/0568 ,  H05K2203/171 ,  H01L2924/00

摘要： In one embodiment, a photo-imageable material is deposited on a circuit structure. The photo-imageable material is then exposed to a pattern of radiation, thereby polymerizing portions of the photo-imageable. Un-polymerized portions of the photo-imageable material are then removed to define a solder mask having solder deposition areas. Solder is then deposited in the solder deposition areas. A circuit structure that may be produced in accordance with this method is also disclosed.

摘要翻译： 在一个实施例中，可光成像材料沉积在电路结构上。 然后将可光致成像材料暴露于辐射图案，从而聚合可光成像的部分。 然后去除可光致成像材料的未聚合部分以限定具有焊料沉积区域的焊接掩模。 然后将焊料沉积在焊料沉积区域中。 还公开了可以根据该方法制造的电路结构。

公开(公告)号：US08133762B2

公开(公告)日：2012-03-13

申请号：US12406049

申请日：2009-03-17

申请人： Reza A. Pagaila ,  Byung Tai Do ,  Shuangwu Huang

发明人： Reza A. Pagaila ,  Byung Tai Do ,  Shuangwu Huang

IPC分类号： H01L21/00

CPC分类号： H01L24/18 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/97 ,  H01L25/105 ,  H01L25/16 ,  H01L2221/68345 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1902 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor device is made by providing a sacrificial substrate and depositing an adhesive layer over the sacrificial substrate. A first conductive layer is formed over the adhesive layer. A polymer pillar is formed over the first conductive layer. A second conductive layer is formed over the polymer pillar to create a conductive pillar with inner polymer core. A semiconductor die or component is mounted over the substrate. An encapsulant is deposited over the semiconductor die or component and around the conductive pillar. A first interconnect structure is formed over a first side of the encapsulant. The first interconnect structure is electrically connected to the conductive pillar. The sacrificial substrate and adhesive layers are removed. A second interconnect structure is formed over a second side of the encapsulant opposite the first interconnect structure. The second interconnect structure is electrically connected to the conductive pillar.

摘要翻译： 通过提供牺牲衬底并在牺牲衬底上沉积粘合剂层来制造半导体器件。 在粘合剂层上形成第一导电层。 聚合物柱形成在第一导电层上。 在聚合物柱上方形成第二导电层以产生具有内聚合物芯的导电柱。 半导体管芯或部件安装在衬底上。 密封剂沉积在半导体管芯或部件上并且围绕导电柱。 第一互连结构形成在密封剂的第一侧上。 第一互连结构电连接到导电柱。 去除牺牲基底和粘合剂层。 在与第一互连结构相对的密封剂的第二侧上形成第二互连结构。 第二互连结构电连接到导电柱。

公开(公告)号：US20090236686A1

公开(公告)日：2009-09-24

申请号：US12476447

申请日：2009-06-02

申请人： Il Kwon Shim ,  Seng Guan Chow ,  Yaojian Lin ,  Rui Huang

发明人： Il Kwon Shim ,  Seng Guan Chow ,  Yaojian Lin ,  Rui Huang

IPC分类号： H01L29/86 ,  H01L21/98

CPC分类号： H01L25/105 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L25/0655 ,  H01L2221/68359 ,  H01L2221/68372 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/01004 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1902 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19106 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： A semiconductor device is made by forming a first conductive layer over a temporary carrier. A UBM layer is formed over the temporary carrier and fixed in position relative to the first conductive layer. A conductive pillar is formed over the first conductive layer. A semiconductor die is mounted to the UBM layer to align the die relative to the conductive pillar. An encapsulant is deposited over the die and around the conductive pillar. The UBM layer prevents shifting of the semiconductor die while depositing the encapsulant. The temporary carrier is removed. A first interconnect structure is formed over a first surface of the encapsulant. A second interconnect structure is formed over a second surface of the encapsulant. The first and second interconnect structures are electrically connected through the conductive pillar. The first or second interconnect structure includes an integrated passive device electrically connected to the conductive pillar.

摘要翻译： 通过在临时载体上形成第一导电层制成半导体器件。 UBM层形成在临时载体上并相对于第一导电层固定在适当位置。 在第一导电层上形成导电柱。 将半导体管芯安装到UBM层上以相对于导电柱对准管芯。 密封剂沉积在模具上并且围绕导电柱。 UBM层防止半导体管芯移动，同时沉积密封剂。 移除临时载体。 在密封剂的第一表面上形成第一互连结构。 在密封剂的第二表面上形成第二互连结构。 第一和第二互连结构通过导电柱电连接。 第一或第二互连结构包括电连接到导电柱的集成无源器件。

公开(公告)号：US20090057910A1

公开(公告)日：2009-03-05

申请号：US11847985

申请日：2007-08-30

申请人： Todd B. Myers ,  Nicholas R. Watts ,  Eric C. Palmer ,  Jui Min Lim

发明人： Todd B. Myers ,  Nicholas R. Watts ,  Eric C. Palmer ,  Jui Min Lim

IPC分类号： H01L29/00 ,  H01L23/48 ,  H01L23/52

CPC分类号： H01L21/76897 ,  H01L21/486 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/64 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/1902 ,  H05K1/115 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/06 ,  H05K3/4053 ,  H05K3/421 ,  H05K2201/086 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/09645 ,  H05K2201/09663 ,  H05K2201/09763 ,  H05K2201/09809 ,  H05K2201/09827 ,  H05K2201/09981 ,  Y10S257/916 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49133 ,  Y10T29/49147 ,  Y10T29/49165 ,  H01L2924/00

摘要： A method of forming a device associated with a via includes forming an opening or via, and forming at least a pair of conducting paths within the via. Also disclosed is a via having at pair of conducting paths therein.

摘要翻译： 形成与通孔相关的器件的方法包括形成开口或通孔，并在通孔内形成至少一对导电通路。 还公开了一种在其中具有一对导电路径的通孔。

公开(公告)号：US07275316B2

公开(公告)日：2007-10-02

申请号：US10815464

申请日：2004-03-31

申请人： Todd B Myers ,  Nicholas R. Watts ,  Eric C Palmer ,  Jui Min Lim

发明人： Todd B Myers ,  Nicholas R. Watts ,  Eric C Palmer ,  Jui Min Lim

IPC分类号： H01K3/10

CPC分类号： H01L21/76897 ,  H01L21/486 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/64 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/1902 ,  H05K1/115 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/06 ,  H05K3/4053 ,  H05K3/421 ,  H05K2201/086 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/09645 ,  H05K2201/09663 ,  H05K2201/09763 ,  H05K2201/09809 ,  H05K2201/09827 ,  H05K2201/09981 ,  Y10S257/916 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49133 ,  Y10T29/49147 ,  Y10T29/49165 ,  H01L2924/00

摘要： A method of forming a device associated with a via includes forming an opening or via, and forming at least a pair of conducting paths within the via. Also disclosed is a via having at pair of conducting paths therein.

摘要翻译： 形成与通孔相关的器件的方法包括形成开口或通孔，并在通孔内形成至少一对导电通路。 还公开了一种在其中具有一对导电路径的通孔。

公开(公告)号：US20050224989A1

公开(公告)日：2005-10-13

申请号：US10815464

申请日：2004-03-31

申请人： Todd Myers ,  Nicholas Watts ,  Eric Palmer ,  Jui Lim

发明人： Todd Myers ,  Nicholas Watts ,  Eric Palmer ,  Jui Lim

IPC分类号： H01G4/005 ,  H01L21/48 ,  H01L23/498 ,  H01L23/66 ,  H05K1/11 ,  H05K1/16 ,  H05K3/40

CPC分类号： H01L21/76897 ,  H01L21/486 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L23/64 ,  H01L23/66 ,  H01L2223/6616 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/1902 ,  H05K1/115 ,  H05K1/162 ,  H05K1/165 ,  H05K1/167 ,  H05K3/06 ,  H05K3/4053 ,  H05K3/421 ,  H05K2201/086 ,  H05K2201/09509 ,  H05K2201/09563 ,  H05K2201/0959 ,  H05K2201/09645 ,  H05K2201/09663 ,  H05K2201/09763 ,  H05K2201/09809 ,  H05K2201/09827 ,  H05K2201/09981 ,  Y10S257/916 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49131 ,  Y10T29/49133 ,  Y10T29/49147 ,  Y10T29/49165 ,  H01L2924/00

摘要： A method of forming a device associated with a via includes forming an opening or via, and forming at least a pair of conducting paths within the via. Also disclosed is a via having at pair of conducting paths therein.

摘要翻译： 形成与通孔相关的器件的方法包括形成开口或通孔，并在通孔内形成至少一对导电通路。 还公开了一种在其中具有一对导电路径的通孔。

公开(公告)号：US09640504B2

公开(公告)日：2017-05-02

申请号：US14224931

申请日：2014-03-25

申请人： STATS ChipPAC, Ltd.

发明人： Reza A. Pagaila ,  Byung Tai Do ,  Shuangwu Huang

IPC分类号： H01L23/52 ,  H01L23/00 ,  H01L23/528 ,  H01L23/538 ,  H01L21/56 ,  H01L21/683 ,  H01L23/31 ,  H01L25/10 ,  H01L25/16

CPC分类号： H01L24/18 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/97 ,  H01L25/105 ,  H01L25/16 ,  H01L2221/68345 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1902 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor device is made by providing a sacrificial substrate and depositing an adhesive layer over the sacrificial substrate. A first conductive layer is formed over the adhesive layer. A polymer pillar is formed over the first conductive layer. A second conductive layer is formed over the polymer pillar to create a conductive pillar with inner polymer core. A semiconductor die or component is mounted over the substrate. An encapsulant is deposited over the semiconductor die or component and around the conductive pillar. A first interconnect structure is formed over a first side of the encapsulant. The first interconnect structure is electrically connected to the conductive pillar. The sacrificial substrate and adhesive layers are removed. A second interconnect structure is formed over a second side of the encapsulant opposite the first interconnect structure. The second interconnect structure is electrically connected to the conductive pillar.

公开(公告)号：US20120153472A1

公开(公告)日：2012-06-21

申请号：US13405094

申请日：2012-02-24

申请人： Reza A. Pagaila ,  Byung Tai Do ,  Shuangwu Huang

发明人： Reza A. Pagaila ,  Byung Tai Do ,  Shuangwu Huang

IPC分类号： H01L23/48

CPC分类号： H01L24/18 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/528 ,  H01L23/5283 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/97 ,  H01L25/105 ,  H01L25/16 ,  H01L2221/68345 ,  H01L2223/6677 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1035 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01047 ,  H01L2924/01061 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04953 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/1902 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H01L2924/00014 ,  H01L2924/00

摘要： A semiconductor device is made by providing a sacrificial substrate and depositing an adhesive layer over the sacrificial substrate. A first conductive layer is formed over the adhesive layer. A polymer pillar is formed over the first conductive layer. A second conductive layer is formed over the polymer pillar to create a conductive pillar with inner polymer core. A semiconductor die or component is mounted over the substrate. An encapsulant is deposited over the semiconductor die or component and around the conductive pillar. A first interconnect structure is formed over a first side of the encapsulant. The first interconnect structure is electrically connected to the conductive pillar. The sacrificial substrate and adhesive layers are removed. A second interconnect structure is formed over a second side of the encapsulant opposite the first interconnect structure. The second interconnect structure is electrically connected to the conductive pillar.

摘要翻译： 通过提供牺牲衬底并在牺牲衬底上沉积粘合剂层来制造半导体器件。 在粘合剂层上形成第一导电层。 聚合物柱形成在第一导电层上。 在聚合物柱上方形成第二导电层以产生具有内聚合物芯的导电柱。 半导体管芯或部件安装在衬底上。 密封剂沉积在半导体管芯或部件上并且围绕导电柱。 第一互连结构形成在密封剂的第一侧上。 第一互连结构电连接到导电柱。 去除牺牲基底和粘合剂层。 在与第一互连结构相对的密封剂的第二侧上形成第二互连结构。 第二互连结构电连接到导电柱。