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1.
公开(公告)号:US20240222140A1
公开(公告)日:2024-07-04
申请号:US18393823
申请日:2023-12-22
Applicant: Phoenix Pioneer Technology Co., Ltd.
Inventor: Che-Wei HSU , Pao-Hung CHOU , Shih-Ping HSU
IPC: H01L21/48 , H01L21/283 , H01L23/00 , H01L23/538
CPC classification number: H01L21/4857 , H01L21/283 , H01L23/5389 , H01L24/13 , H01L24/29 , H01L24/73 , H01L2224/13025 , H01L2224/13147 , H01L2224/29009 , H01L2224/29025 , H01L2224/73103 , H01L2924/18162
Abstract: A package carrier board includes a first circuit build-up structure, a patterned magnetic conductive metal layer, a plurality of first conductive pillar, a second insulating layer, and a second circuit build-up structure. The patterned magnetic conductive metal layer is disposed above the first circuit build-up structure, and the cross-sectional pattern of the patterned magnetic conductive metal layer is L-shaped and/or U-shaped. The first conductive pillars are disposed on the first circuit build-up structure and located outside of the patterned magnetic conductive metal layer. The second insulating layer covers the patterned magnetic conductive metal layer and the first conductive pillars. The second circuit build-up structure is disposed on the second insulating layer. The first circuit build-up structure, the first conductive pillars, the second insulating layer, and the second circuit build-up structure are combined to form an inductive circuit structure. Additionally, a manufacturing method for the package carrier board is also disclosed.
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公开(公告)号:US20210296259A1
公开(公告)日:2021-09-23
申请号:US16824425
申请日:2020-03-19
Inventor: You-Lung YEN , Pao-Hung CHOU , Chun-Hsien YU
IPC: H01L23/00 , H01L23/31 , H01L23/14 , H01L23/498 , H01L21/683 , H01L21/48 , H01L21/56
Abstract: A package substrate and method of manufacturing a package substrate and a semiconductor device package are provided. The package substrate includes a circuit layer, a molding layer and a sacrificial layer. The circuit layer includes conductive traces and conductive pads. The molding layer has an upper surface and a lower surface opposite to the upper surface, wherein the molding layer partially covers the conductive traces and the conductive pads, and first surfaces of the conductive traces and first surfaces of the conductive pads are exposed from the upper surface of the molding layer. The sacrificial layer covers the lower surface of the molding layer, second surfaces of the conductive pads.
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3.
公开(公告)号:US20160037635A1
公开(公告)日:2016-02-04
申请号:US14547717
申请日:2014-11-19
Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.
Inventor: Pao-Hung CHOU
IPC: H05K1/11 , H01L21/48 , H05K3/46 , H01L23/498
CPC classification number: H01L21/4857 , H01L23/49811 , H01L23/49822 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2924/15311 , H01L2924/181 , H05K3/4007 , H05K3/4682 , H05K2201/10378 , H01L2924/00012 , H01L2924/00014 , H01L2924/00
Abstract: A method for fabricating an interposer substrate is provided, including forming a wiring layer on a carrier, forming an insulating layer on the carrier, forming on the wiring layer a wiring build-up layer structure that is electrically connected to the wiring layer, forming on the wiring build-up layer structure external connection pillars that are electrically connected to the wiring build-up layer structure, and removing the carrier, with the wiring layer is exposed from a surface of the insulating layer. The fabrication process of the via can be bypassed in the fabrication process by forming coreless interposer substrate on the carrier, such that the overall cost of the fabrication process can be decreased, and the fabrication process is simple. This invention further provides the interposer substrate.
Abstract translation: 提供了一种制造插入器基板的方法,包括在载体上形成布线层,在载体上形成绝缘层,在布线层上形成与布线层电连接的布线积层层结构,形成 电连接到布线积层层结构的布线堆积层结构外部连接柱,并且从布线层移除载体从绝缘层的表面露出。 通过在载体上形成无芯插入器基板,可以在制造工艺中绕过通孔的制造工艺,从而可以降低制造工艺的总体成本,并且制造工艺简单。 本发明还提供了内插器基板。
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公开(公告)号:US20240136728A1
公开(公告)日:2024-04-25
申请号:US18461497
申请日:2023-09-04
Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.
Inventor: Pao-Hung CHOU , Shih-Ping HSU
CPC classification number: H01Q13/18 , H01Q1/2283
Abstract: An antenna module is provided, in which an antenna supporting substrate having a step-shaped hollow cavity is disposed on a circuit structure having an antenna part, so that the antenna part is exposed from the step-shaped hollow cavity, and an antenna structure is arranged on the steps of the step-shaped hollow cavity to cover the antenna part and is electromagnetically coupled with the antenna part, and there is no barrier but an air medium between the antenna structure and the antenna part.
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公开(公告)号:US20240235046A9
公开(公告)日:2024-07-11
申请号:US18461497
申请日:2023-09-05
Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.
Inventor: Pao-Hung CHOU , Shih-Ping HSU
CPC classification number: H01Q13/18 , H01Q1/2283
Abstract: An antenna module is provided, in which an antenna supporting substrate having a step-shaped hollow cavity is disposed on a circuit structure having an antenna part, so that the antenna part is exposed from the step-shaped hollow cavity, and an antenna structure is arranged on the steps of the step-shaped hollow cavity to cover the antenna part and is electromagnetically coupled with the antenna part, and there is no barrier but an air medium between the antenna structure and the antenna part.
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公开(公告)号:US20240221999A1
公开(公告)日:2024-07-04
申请号:US18481059
申请日:2023-10-04
Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.
Inventor: Che-Wei HSU , Pao-Hung CHOU
CPC classification number: H01F27/323 , H01F41/041 , H01F41/122
Abstract: An inductor structure is provided, in which a coil-shaped inductor body and a magnetically permeable alloy layer located in the coil are embedded in an insulator, so as to improve the electrical characteristics of the inductor via the design of the magnetically permeable alloy layer. Therefore, the inductor structure of the present disclosure can meet the required requirements without using a mixture of conventional magnetically permeable elements and conventional magnetic powders.
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公开(公告)号:US20240194386A1
公开(公告)日:2024-06-13
申请号:US18534196
申请日:2023-12-08
Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.
Inventor: Shih-Ping HSU , Pao-Hung CHOU
CPC classification number: H01F27/24 , H01F27/2804 , H01F41/0206 , H01F41/041 , H01F2027/2809
Abstract: An inductor structure is provided, in which an inductance coil in the shape of a toroidal coil or a helical coil is arranged in an insulator, and a magnetically permeable body made of a magnetically permeable material is a multi-layer stacked structure and arranged in the inductance coil, where the magnetically permeable body is free from being electrically connected to the inductance coil. Therefore, the magnetically permeable body made of a magnetically permeable material in the form of a multi-layer stacked structure may effectively improve the electrical characteristics of the inductor structure.
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公开(公告)号:US20180255651A1
公开(公告)日:2018-09-06
申请号:US15973522
申请日:2018-05-07
Applicant: Phoenix Pioneer technology Co.,Ltd.
Inventor: Che-Wei HSU , Shih-Ping HSU , Pao-Hung CHOU
CPC classification number: H05K3/4682 , H01L21/4857 , H01L23/12 , H01L23/13 , H01L23/49816 , H01L23/49822 , H05K3/4647 , Y10T29/49165
Abstract: A manufacturing method of a package substrate includes forming a patterned first dielectric layer on a carrier; forming a first wiring layer on a first surface of the first dielectric layer facing away from the carrier, a wall surface facing one of the openings of the first dielectric layer, and the carrier in one of the openings; forming a first conductive pillar layer on the first wiring layer on the first surface; forming a second dielectric layer on the first surface, the first wiring layer, and the openings, wherein the first conductive pillar layer is exposed from the second dielectric layer; forming a second wiring layer on the exposed first conductive pillar layer and the second dielectric layer; forming an electrical pad layer on the second wiring layer; and forming a third dielectric layer on the second dielectric layer and the second wiring layer.
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公开(公告)号:US20160073516A1
公开(公告)日:2016-03-10
申请号:US14541688
申请日:2014-11-14
Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.
Inventor: Pao-Hung CHOU , Shih-Ping HSU , Che-Wei HSU
IPC: H05K3/46 , H01L21/48 , H01L23/498
CPC classification number: H01L21/4853 , H01L21/4846 , H01L21/4857 , H01L21/486 , H01L23/498 , H01L23/49811 , H01L23/49822 , H01L23/49827 , H01L23/49838 , H01L23/49894 , H01L2224/16225 , H01L2224/32225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2924/15184 , H01L2924/15311 , H01L2924/181 , H01L2924/00012 , H01L2924/00
Abstract: A method of fabricating an interposer substrate is provided, including: providing a carrier having a first wiring layer and a plurality of conductive pillars disposed on the first wiring layer; forming a first insulating layer on the carrier, with the conductive pillars being exposed from the first insulating layer; forming a second wiring layer on the first insulating layer and the conductive pillars; disposing a plurality of external connection pillars on the second wiring layer; forming a second insulating layer on the first insulating layer, with the external connection pillars being exposed from the second insulating layer; forming at least a trench on the second insulating layer; and removing the carrier. Through the formation of the interposer substrate, which does not have a core layer, on the carrier, a via process is omitted. Therefore, the method is simple, and the interposer substrate thus fabricated has a low cost. The present invention further provides the interposer substrate.
Abstract translation: 提供一种制造插入器基板的方法,包括:提供具有第一布线层和布置在第一布线层上的多个导电柱的载体; 在载体上形成第一绝缘层,导电柱从第一绝缘层露出; 在所述第一绝缘层和所述导电柱上形成第二布线层; 在所述第二布线层上设置多个外部连接柱; 在所述第一绝缘层上形成第二绝缘层,所述外部连接柱从所述第二绝缘层露出; 在所述第二绝缘层上形成至少沟槽; 并移除载体。 通过在载体上形成不具有芯层的插入基板,省略了通孔工艺。 因此,该方法简单,并且由此制造的内插基板具有低成本。 本发明还提供了内插基板。
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公开(公告)号:US20240161957A1
公开(公告)日:2024-05-16
申请号:US18498128
申请日:2023-10-31
Applicant: PHOENIX PIONEER TECHNOLOGY CO., LTD.
Inventor: Pao-Hung CHOU , Shih-Ping HSU , Chu-Chin HU
CPC classification number: H01F17/0006 , H01F27/40 , H01F41/041 , H01F2017/0066 , H01F2017/0073 , H01L24/16 , H01L28/10 , H01L2224/16227
Abstract: Provided is an inductor structure and manufacturing method thereof, including forming an inductance coil in a semiconductor packaging carrier plate and disposing a patterned magnetic conductive layer in the inductance coil. Therefore, a patterned build-up wiring method is used to form a magnetic material in the carrier plate, thereby improving electrical characteristics of the inductor.
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