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    Contact for a semiconductor light emitting device
    1.
    发明授权
    Contact for a semiconductor light emitting device 有权
    接触半导体发光器件

    公开(公告)号：US08679869B2

    公开(公告)日：2014-03-25

    申请号：US13423625

    申请日：2012-03-19

    Applicant: Rafael I. Aldaz ,  John E. Epler ,  Patrick N. Grillot ,  Michael R. Krames

    Inventor： Rafael I. Aldaz ,  John E. Epler ,  Patrick N. Grillot ,  Michael R. Krames

    IPC: H01L21/00

    CPC classification number: H01L33/0079 ,  H01L33/405 ,  H01L33/486 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An AlGaInP light emitting device is formed as a thin, flip chip device. The device includes a semiconductor structure comprising an AlGaInP light emitting layer disposed between an n-type region and a p-type region. N- and p-contacts electrically connected to the n- and p-type regions are both formed on the same side of the semiconductor structure. The semiconductor structure is connected to a mount via the contacts. A growth substrate is removed from the semiconductor structure and a thick transparent substrate is omitted, such that the total thickness of semiconductor layers in the device is less than 15 μm some embodiments, less than 10 μm in some embodiments. The top side of the semiconductor structure may be textured.

    Abstract translation: AlGaInP发光器件形成为薄的倒装芯片器件。 该器件包括包括设置在n型区域和p型区域之间的AlGaInP发光层的半导体结构。 电连接到n型和p型区的N-和p-触点都形成在半导体结构的同一侧上。 半导体结构通过触点连接到安装座。 从半导体结构去除生长衬底，并且省略厚的透明衬底，使得器件中的半导体层的总厚度小于15μm，在一些实施例中为一些实施例，小于10μm。 半导体结构的顶侧可以是纹理的。

    III-nitride light emitting devices grown on templates to reduce strain
    2.
    发明授权
    III-nitride light emitting devices grown on templates to reduce strain 有权
    在模板上生长的III族氮化物发光器件以减少应变

    公开(公告)号：US07951693B2

    公开(公告)日：2011-05-31

    申请号：US11615808

    申请日：2006-12-22

    Applicant: Patrick N. Grillot ,  Nathan F. Gardner ,  Werner K. Goetz ,  Linda T. Romano

    Inventor： Patrick N. Grillot ,  Nathan F. Gardner ,  Werner K. Goetz ,  Linda T. Romano

    IPC: H01L21/20

    CPC classification number: H01L33/007 ,  H01L21/0237 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02502 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/0262

    Abstract: In a III-nitride light emitting device, the device layers including the light emitting layer are grown over a template designed to reduce strain in the device, in particular in the light emitting layer. Reducing the strain in the light emitting device may improve the performance of the device. The template may expand the lattice constant in the light emitting layer over the range of lattice constants available from conventional growth templates. Strain is defined as follows: a given layer has a bulk lattice constant abulk corresponding to a lattice constant of a free standing material of a same composition as that layer and an in-plane lattice constant ain-plane corresponding to a lattice constant of that layer as grown in the structure. The amount of strain in a layer is |(ain-plane−abulk)|/abulk. In some embodiments, the strain in the light emitting layer is less than 1%.

    Abstract translation: 在III族氮化物发光器件中，包括发光层的器件层在设计成减小器件中特别是在发光层中的应变的模板上生长。 降低发光器件中的应变可以提高器件的性能。 模板可以在常规生长模板可获得的晶格常数的范围内扩展发光层中的晶格常数。 应变定义如下：给定层具有对应于与该层相同组成的自由材料的晶格常数的块状晶格常数吸收和对应于该层的晶格常数的面内晶格常数ain-平面 如在结构中生长。 一层中的应变量为|（ain-plane-abulk）| / abulk。 在一些实施方案中，发光层中的应变小于1％。

    CONTACT FOR A SEMICONDUCTOR LIGHT EMITTING DEVICE
    3.
    发明申请
    CONTACT FOR A SEMICONDUCTOR LIGHT EMITTING DEVICE 审中-公开
    接触半导体发光器件

    公开(公告)号：US20090173956A1

    公开(公告)日：2009-07-09

    申请号：US11956984

    申请日：2007-12-14

    Applicant: RAFAEL I. ALDAZ ,  JOHN E. EPLER ,  PATRICK N. GRILLOT ,  MICHAEL R. KRAMES

    Inventor： RAFAEL I. ALDAZ ,  JOHN E. EPLER ,  PATRICK N. GRILLOT ,  MICHAEL R. KRAMES

    IPC: H01L33/00 ,  H01L21/02

    CPC classification number: H01L33/0079 ,  H01L33/405 ,  H01L33/486 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An AlGaInP light emitting device is formed as a thin, flip chip device. The device includes a semiconductor structure comprising an AlGaInP light emitting layer disposed between an n-type region and a p-type region. N- and p-contacts electrically connected to the n- and p-type regions are both formed on the same side of the semiconductor structure. The semiconductor structure is connected to the mount via the contacts. The growth substrate is removed from the semiconductor structure and the thick transparent substrate is omitted, such that the total thickness of semiconductor layers in the device is less than 15 μm in some embodiments, less than 10 μm in some embodiments. The top side of the semiconductor structure may be textured.

    Abstract translation: AlGaInP发光器件形成为薄的倒装芯片器件。 该器件包括包括设置在n型区域和p型区域之间的AlGaInP发光层的半导体结构。 电连接到n型和p型区的N-和p-触点都形成在半导体结构的同一侧上。 半导体结构通过触点连接到安装座。 从半导体结构去除生长衬底，并且省略厚的透明衬底，使得在一些实施例中，器件中的半导体层的总厚度小于15μm，在一些实施例中小于10μm。 半导体结构的顶侧可以是纹理的。

    CONTACT FOR A SEMICONDUCTOR LIGHT EMITTING DEVICE
    4.
    发明申请
    CONTACT FOR A SEMICONDUCTOR LIGHT EMITTING DEVICE 有权
    接触半导体发光器件

    公开(公告)号：US20120187372A1

    公开(公告)日：2012-07-26

    申请号：US13423625

    申请日：2012-03-19

    Applicant: Rafael I. Aldaz ,  John E. Epler ,  Patrick N. Grillot ,  Michael R. Krames

    Inventor： Rafael I. Aldaz ,  John E. Epler ,  Patrick N. Grillot ,  Michael R. Krames

    IPC: H01L33/06 ,  H01L33/30

    CPC classification number: H01L33/0079 ,  H01L33/405 ,  H01L33/486 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: An AlGaInP light emitting device is formed as a thin, flip chip device. The device includes a semiconductor structure comprising an AlGaInP light emitting layer disposed between an n-type region and a p-type region. N- and p-contacts electrically connected to the n- and p-type regions are both formed on the same side of the semiconductor structure. The semiconductor structure is connected to the mount via the contacts. The growth substrate is removed from the semiconductor structure and the thick transparent substrate is omitted, such that the total thickness of semiconductor layers in the device is less than 15 μm in some embodiments, less than 10 μm in some embodiments. The top side of the semiconductor structure may be textured.

    Abstract translation: AlGaInP发光器件形成为薄的倒装芯片器件。 该器件包括包括设置在n型区域和p型区域之间的AlGaInP发光层的半导体结构。 电连接到n型和p型区的N-和p-触点都形成在半导体结构的同一侧上。 半导体结构通过触点连接到安装座。 从半导体结构去除生长衬底，并且省略厚的透明衬底，使得在一些实施例中，器件中的半导体层的总厚度小于15μm，在一些实施例中小于10μm。 半导体结构的顶侧可以是纹理的。

    LIGHT EMITTING DEVICE GROWN ON A RELAXED LAYER
    5.
    发明申请
    LIGHT EMITTING DEVICE GROWN ON A RELAXED LAYER 有权
    发光装置在松散的层上生长

    公开(公告)号：US20110284890A1

    公开(公告)日：2011-11-24

    申请号：US12783197

    申请日：2010-05-19

    Applicant: Andrew Y. KIM ,  Patrick N. GRILLOT

    Inventor： Andrew Y. KIM ,  Patrick N. GRILLOT

    IPC: H01L33/32 ,  H01L21/20

    CPC classification number: H01L33/0075 ,  H01L21/02458 ,  H01L21/02505 ,  H01L33/0079 ,  H01L33/12 ,  H01L33/32 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: In some embodiments of the invention, a device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region. The second semiconductor layer is disposed between the first semiconductor layer and the third semiconductor layer. The third semiconductor layer is disposed between the second semiconductor layer and the light emitting layer. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the third semiconductor layer is no more than 1%. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the second semiconductor layer is at least 1%. The third semiconductor layer is at least partially relaxed.

    Abstract translation: 在本发明的一些实施例中，器件包括第一半导体层，第二半导体层，第三半导体层以及包括设置在n型区域和p型区域之间的III族氮化物发光层的半导体结构 。 第二半导体层设置在第一半导体层和第三半导体层之间。 第三半导体层设置在第二半导体层和发光层之间。 第一半导体层的面内晶格常数与第三半导体层的体晶格常数之差不大于1％。 第一半导体层的面内晶格常数与第二半导体层的体晶格常数之差为1％以上。 第三半导体层至少部分松弛。

    Semiconductor light emitting device including graded region
    8.
    发明授权
    Semiconductor light emitting device including graded region 有权
    半导体发光器件包括分级区域

    公开(公告)号：US08507929B2

    公开(公告)日：2013-08-13

    申请号：US12139999

    申请日：2008-06-16

    Applicant: Patrick N. Grillot ,  Rafael I. Aldaz ,  Eugene I. Chen ,  Sateria Salim

    Inventor： Patrick N. Grillot ,  Rafael I. Aldaz ,  Eugene I. Chen ,  Sateria Salim

    IPC: H01L33/00 ,  H01L33/12 ,  H01L21/00

    CPC classification number: H01L33/12 ,  H01L33/00 ,  H01L33/02 ,  H01L33/30

    Abstract: One or more regions of graded composition are included in a III-P light emitting device, to reduce the Vf associated with interfaces in the device. In accordance with embodiments of the invention, a semiconductor structure comprises a III-P light emitting layer disposed between an n-type region and a p-type region. A graded region is disposed between the p-type region and a GaP window layer. The aluminum composition is graded in the graded region. The graded region may have a thickness of at least 150 nm. In some embodiments, in addition to or instead of a graded region between the p-type region and the GaP window layer, the aluminum composition is graded in a graded region disposed between an etch stop layer and the n-type region.

    Abstract translation: III-P发光器件中包括一个或多个渐变成分区域，以减少与器件中的接口相关联的Vf。 根据本发明的实施例，半导体结构包括设置在n型区域和p型区域之间的III-P发光层。 在p型区域和GaP窗口层之间设置分级区域。 铝组合物在分级区域分级。 分级区域可以具有至少150nm的厚度。 在一些实施例中，除了或代替p型区域和GaP窗口层之间的渐变区域之外，铝组合物在设置在蚀刻停止层和n型区域之间的渐变区域中分级。

    III-Nitride Device Grown on Edge-Dislocation Template
    10.
    发明申请
    III-Nitride Device Grown on Edge-Dislocation Template 审中-公开
    边缘位错模板上生长的III型氮化物器件

    公开(公告)号：US20090032828A1

    公开(公告)日：2009-02-05

    申请号：US11833921

    申请日：2007-08-03

    Applicant: Linda T. Romano ,  Patrick N. Grillot

    Inventor： Linda T. Romano ,  Patrick N. Grillot

    IPC: H01L33/00 ,  H01L21/20

    CPC classification number: H01L33/32 ,  H01L21/02378 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02505 ,  H01L21/02507 ,  H01L21/02513 ,  H01L21/0254 ,  H01L33/12

    Abstract: A semiconductor light emitting device includes a wurtzite III-nitride semiconductor structure including a light emitting layer disposed between an n-type region and a p-type region. A template layer and a dislocation bending layer are grown before the light emitting layer. The template layer is grown such that at least 70% of the dislocations in the template layer are edge dislocations. At least some of the edge dislocations in the template layer continue into the dislocation bending layer. The dislocation bending layer is grown to have a different magnitude of strain than the template layer. The change in strain at the interface between the template layer and the dislocation bending layer causes at least some of the edge dislocations in the template layer to bend to a different orientation in the dislocation bending layer. Semiconductor material grown above the bent edge dislocations may exhibit reduced strain.

    Abstract translation: 半导体发光器件包括含有设置在n型区域和p型区域之间的发光层的纤锌矿III族氮化物半导体结构。 模板层和位错弯曲层在发光层之前生长。 生长模板层使得模板层中至少70％的位错是边缘位错。 模板层中的至少一些边缘位错继续进入位错弯曲层。 使位错弯曲层生长成具有与模板层不同的应变大小。 在模板层和位错弯曲层之间的界面处的应变变化导致模板层中的至少一些边缘位错在位错弯曲层中弯曲成不同的取向。 在弯曲边缘位错以上生长的半导体材料可能表现出减小的应变。

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