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    LIGHT EMITTING DEVICE GROWN ON A RELAXED LAYER
    1.
    发明申请
    LIGHT EMITTING DEVICE GROWN ON A RELAXED LAYER 有权
    发光装置在松散的层上生长

    公开(公告)号：US20110284890A1

    公开(公告)日：2011-11-24

    申请号：US12783197

    申请日：2010-05-19

    申请人： Andrew Y. KIM ,  Patrick N. GRILLOT

    发明人： Andrew Y. KIM ,  Patrick N. GRILLOT

    IPC分类号： H01L33/32 ,  H01L21/20

    CPC分类号： H01L33/0075 ,  H01L21/02458 ,  H01L21/02505 ,  H01L33/0079 ,  H01L33/12 ,  H01L33/32 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In some embodiments of the invention, a device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region. The second semiconductor layer is disposed between the first semiconductor layer and the third semiconductor layer. The third semiconductor layer is disposed between the second semiconductor layer and the light emitting layer. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the third semiconductor layer is no more than 1%. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the second semiconductor layer is at least 1%. The third semiconductor layer is at least partially relaxed.

    摘要翻译： 在本发明的一些实施例中，器件包括第一半导体层，第二半导体层，第三半导体层以及包括设置在n型区域和p型区域之间的III族氮化物发光层的半导体结构 。 第二半导体层设置在第一半导体层和第三半导体层之间。 第三半导体层设置在第二半导体层和发光层之间。 第一半导体层的面内晶格常数与第三半导体层的体晶格常数之差不大于1％。 第一半导体层的面内晶格常数与第二半导体层的体晶格常数之差为1％以上。 第三半导体层至少部分松弛。

    Method of producing device quality (Al)InGaP alloys on lattice-mismatched substrates
    7.
    发明授权
    Method of producing device quality (Al)InGaP alloys on lattice-mismatched substrates 失效
    在晶格失配衬底上生产器件质量（Al）InGaP合金的方法

    公开(公告)号：US06805744B2

    公开(公告)日：2004-10-19

    申请号：US10023047

    申请日：2001-12-13

    申请人： Andrew Y. Kim ,  Eugene A. Fitzgerald

    发明人： Andrew Y. Kim ,  Eugene A. Fitzgerald

    IPC分类号： C30B2506

    CPC分类号： H01L21/02392 ,  C30B25/02 ,  C30B29/40 ,  H01L21/02395 ,  H01L21/02461 ,  H01L21/02505 ,  H01L21/0251 ,  H01L21/02543 ,  H01L21/02576 ,  H01L21/0262 ,  H01L31/1844 ,  H01L33/0062 ,  H01L33/0066 ,  H01L33/30 ,  Y02E10/544

    摘要： A method of forming a semiconductor structure including providing a single crystal semiconductor substrate of GaP, and fabricating a graded composition buffer including a plurality of epitaxial semiconductor Inx(AlyGa1−y)1−xP alloy layers. The buffer includes a first alloy layer immediately contacting the substrate having a lattice constant that is nearly identical to that of the substrate, subsequent alloy layers having lattice constants that differ from adjacent layers by less than 1%, and a final alloy layer having a lattice constant that is substantially different from the substrate. The growth temperature of the final alloy layer is at least 20° C. less than the growth temperature of the first alloy layer.

    摘要翻译： 一种形成半导体结构的方法，包括提供GaP的单晶半导体衬底，以及制造包括多个外延半导体In x（Al y Ga 1-y）1-xP合金层的渐变组合物缓冲层。 缓冲器包括立即接触基板的第一合金层，其具有与基板的晶格常数几乎相同的晶格常数，随后的合金层具有不同于相邻层的晶格常数小于1％，以及具有晶格的最终合金层 基本上不同于基底的常数。 最终合金层的生长温度比第一合金层的生长温度低至少20℃。

    Light emitting device grown on a relaxed layer
    8.
    发明授权
    Light emitting device grown on a relaxed layer 有权
    在松弛层上生长的发光器件

    公开(公告)号：US08692261B2

    公开(公告)日：2014-04-08

    申请号：US12783197

    申请日：2010-05-19

    申请人： Andrew Y. Kim ,  Patrick N. Grillot

    发明人： Andrew Y. Kim ,  Patrick N. Grillot

    IPC分类号： H01L27/15

    CPC分类号： H01L33/0075 ,  H01L21/02458 ,  H01L21/02505 ,  H01L33/0079 ,  H01L33/12 ,  H01L33/32 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In some embodiments of the invention, a device includes a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, and a semiconductor structure comprising a III-nitride light emitting layer disposed between an n-type region and a p-type region. The second semiconductor layer is disposed between the first semiconductor layer and the third semiconductor layer. The third semiconductor layer is disposed between the second semiconductor layer and the light emitting layer. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the third semiconductor layer is no more than 1%. A difference between the in-plane lattice constant of the first semiconductor layer and the bulk lattice constant of the second semiconductor layer is at least 1%. The third semiconductor layer is at least partially relaxed.

    摘要翻译： 在本发明的一些实施例中，器件包括第一半导体层，第二半导体层，第三半导体层以及包括设置在n型区域和p型区域之间的III族氮化物发光层的半导体结构 。 第二半导体层设置在第一半导体层和第三半导体层之间。 第三半导体层设置在第二半导体层和发光层之间。 第一半导体层的面内晶格常数与第三半导体层的体晶格常数之差不大于1％。 第一半导体层的面内晶格常数与第二半导体层的体晶格常数之差为1％以上。 第三半导体层至少部分松弛。