摘要:
A printed timer label including a substrate, a printed battery on the substrate, a printed load resistance configured to control a discharge time of the printed battery, and printed voltage comparison circuitry connected to the printed battery and configured to provide an output signal depending on the output voltage of the printed battery relative to a predetermined threshold value.
摘要:
A battery management system having and configurable batteries are disclosed. The battery management system generally includes (a) one or more cell control units, each configured to control and/or balance a charge in a plurality of battery cells, and (b) a master controller in electrical communication with cell control unit(s). The cell control unit(s) as a whole include one or more switches, configured to be electrically connected to a first one of a plurality of battery cells, and a resistor, capacitor or inductor electrically (i) connected to one switch and (ii) connected or connectable to a second battery cell. The master controller is configured to open or close each switch. The configurable battery generally includes a plurality of battery cells and switches configured to connect or disconnect the battery cells in a configurable or predetermined manner.
摘要:
A ferroelectric memory cell (1) and a memory device (100) comprising one or more such cells (1). The ferroelectric memory cell comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one ferroelectric memory material layer (7) between said electrodes. The stack further comprises a buffer layer (13) arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (ΔL) occurring in the protective layer (11) and thus preventing said dimensional change (ΔL) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.
摘要:
In a non-volatile electric memory system a memory unit and a read/write unit are provided as physically separate units. The memory unit is based on a memory material that can be set to at least two distinct physical states by applying an electric field across the memory material. Electrodes and/or contacts are either provided in the memory unit or in the read/write unit and contacts are at least always provided in the read/write unit. Electrodes and contacts are provided in a geometrical arrangement, which defines geometrically one or more memory cells in the memory layer. Establishing a physical contact between the memory unit and the read/write unit closes an electrical circuit over the addressed memory cell such that read, write or erase operations can be effected. The memory material of the memory unit can be polarized into two discernible polarization states.
摘要:
An electronic component (1) and an electronic device (100) comprising one or more such components (1). The electronic component (1) comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one insulating or semi-insulating layer (7) between said electrodes. The stack further comprises a buffer layer (13), arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (ΔL) occurring in the protective layer (11) and thus preventing said dimensional change (ΔL) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.
摘要:
In a heating and temperature control system for a data storage apparatus comprising at least one matrix-addressable ferroelectric or electret memory device, Joule heating means are provided in the memory device, a temperature determining means is connected with controller circuitry and the controller circuitry is connected with an external power supply, which controlled by the former powers the Joule heating means to achieve a selected operating temperature. In a method for operating the heating and temperature control system an ambient or instant temperature of the memory device is determined and compared with the set nominal optimal temperature, and the difference between these temperatures is used in a predefined algorithm for establishing control parameters for the application of power to the Joule heating means to achieve the selected operating temperature in the memory device during an addressing operation thereto.
摘要:
A method and apparatus for performing read and write operations in matrix-addressed memory array of memory cells is described. The memory cells comprising an electrically polarizable material exhibiting polarization remanence, in particular and electret or ferroelectric material, where a logical value stored in a memory cell is represented by an actual polarization state in the memory cell. The degree of polarization in the polarizable material is limited during each read and write cycle to a value defined by a circuit device controlling the read and write operations, with said value ranging from zero to an upper limit corresponding to saturation of the polarization and consistent with predetermined criterta for a reliable detection of a logic state of a memory cell.
摘要:
A ferroelectric memory cell (1) and a memory device (100) comprising one or more such cells (1). The ferroelectric memory cell comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one ferroelectric memory material layer (7) between said electrodes. The stack further comprises a buffer layer (13) arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (ΔL) occurring in the protective layer (11) and thus preventing said dimensional change (ΔL) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.
摘要:
An electronic component (1) and an electronic device (100) comprising one or more such components (1). The electronic component (1) comprises a stack (4) of layers arranged on a flexible substrate (3). Said stack comprises an electrically active part (4a) and a protective layer (11) for protecting the electrically active part against scratches and abrasion. Said electrically active part comprises a bottom electrode layer (5) and a top electrode layer (9) and at least one insulating or semi-insulating layer (7) between said electrodes. The stack further comprises a buffer layer (13), arranged between the top electrode layer (9) and the protective layer (11). The buffer layer (13) is adapted for at least partially absorbing a lateral dimensional change (ΔL) occurring in the protective layer (11) and thus preventing said dimensional change (ΔL) from being transferred to the electrically active part (4a), thereby reducing the risk of short circuit to occur between the electrodes.
摘要:
A passive matrix-addressable device may include individually addressable cells of a polarizable material. The cells store data in one of two polarization states in each cell, and the polarization states in the cells are written and read by addressing via electrodes which form word and bit lines. The cells are provided in or at the crossings between the word and bit lines and a voltage pulse protocol is used read and write data to cells. During reading, a word line is activated by applying voltage which relative to the potential on all crossing bit lines corresponds to the voltage Vs and data stored in the cells connected to this active word line are determined by detecting the charge values of the cells.