Abstract:
A differential output stage of an amplification device, for driving a load, comprises a first and a second differential output stage portion. The first differential output stage portion comprises: a first and a second output circuit; a first driving circuit comprising a first biasing circuit; a second driving circuit comprising a second biasing circuit. The first differential output stage portion comprises: a third output circuit connected between a first node of said first biasing circuit and a first differential output terminal, having a third driving terminal connected to a first driving terminal; a fourth output circuit connected between a first node of the second biasing circuit and the first differential output terminal, having a fourth driving terminal connected to a second driving terminal.
Abstract:
A method in a first device for anonymously delivering data to a part that has initiated a task is provided. The first device and the part initiating a task are participants in opportunistic sensing. The method comprises creating a data sample and encrypting the data sample with a public key of the task initiating part. After communicating the protected sample to one or more intermediate devices, one of the one or more intermediate devices delivers the protected sample to the task initiating part, such that the task initiating part does not know the identity of the first device. The task initiating device only know the identity of the one of the one or more intermediate devices that delivered the protected sample to the task initiating part, wherein the intermediate devices are participants in the opportunistic sensing.
Abstract:
Electronic device (101) comprising a power source (110), a power management unit (102) coupled to the power source, and a set of loads (103a,103b, 103c,103d), the power management unit comprising a set of voltage regulators blocks (104a,104b, 104c,104d), each voltage regulator block being respectively coupled to an associated load of the set of loads for allowing power transfer from the power source to the load. The electronic device comprises a spike detector block (106), coupled to each of the voltage regulator blocks, and configured to detect a spike in a voltage signal from a voltage regulator block for testing the presence and the operability of a decoupling capacitor (Ca, Cb, Cc, Cd) between an output of the voltage regulator block and an input of the associated load.
Abstract:
High frequency current transients, due to logic switching inside the CPU, are reduced by applying clock signals having different relative phases to different parts of the CPU. This reduces the amplitude of current variations, and hence noise induced onto the power supply voltage. In some embodiments, different CPU cores within multi-core CPUs are clocked with a different clock phases. Additionally a method and circuit for low-latency communication in the presence of large OCV effects is provided. The low-latency communication may be based on a FIFO. Strobes are used to indicate safe points in time to update and read signals between transmitter and receiver. The strobes are generated in a central clock generation module. The strobe mechanism is used to transfer the read and write pointers between the transmitter and receiver, while the payload data is transferred using a FIFO data array that allows data writes to be asynchronous to corresponding data reads.
Abstract:
A communication method, a communication device for a dual-SIM card-dual-call, DSDC, terminal, and the DSDC terminal are provided. The DSDC terminal includes a first radio frequency subsystem for initiating Packet Switching, PS, service and a second radio frequency subsystem for initiating Circuit Switching, CS, service. The transmission power for the PS service of the first radio frequency subsystem is controlled to be under a predetermined value during a reception timeslot for the CS service of the second radio frequency subsystem, thereby overcoming the problem caused by the interference between two radio frequency subsystems of the DSDC terminal.
Abstract:
Limited service state controller (30) for controlling activity of a mobile device (1) when the mobile device is in a limited service state, in which the mobile device camps on an acceptable serving cell of a cellular telecommunication network, the limited service state controller being configured to: get mobile device state information indicating that the mobile device is in the limited service state, get radio environment parameters related to a radio environment of the mobile device, and determine activity parameters to be set in the mobile device based on the mobile device state information and/or the radio environment parameters, for limiting the activity of the mobile device compared to the activity to be done when the mobile device is in a normal service state, while enabling access to an emergency service allowing to make an emergency call.
Abstract:
A DC-DC converter has a Step-Up stage connected to a Step-Down stage. A common Step-Down controller is designed and configured such that a single reference voltage is compared to the output voltage of the Step-Down stage by a single comparator, producing a single error signal. The error signal is then compared to two different saw signals to generate first and second pulse-width modulated signals respectively. The first and second pulse-width modulated signals are inputted to a control unit that generates a first pair of control signals and a second pair of control signals, which control switching of the Step-Up stage and of the Step-Down stage.
Abstract:
A device for controlling a power supply for a functional block in an integrated circuit, the device comprising: a signal generator configured to provide a clock signal to the functional block, an antenna comprising a transistor, and being located proximate to the functional block, the antenna being configured to receive the clock signal from the signal generator, and wherein the transistor of the antenna receives electrical power from the same power source that delivers power to the functional block, means to measure the clock signal output from the antenna, and output a control signal, and feedback means to control the voltage of the power supply to the functional block on the basis of the control signal.
Abstract:
A system and method for vector memory array transposition. The system includes a vector memory, a block transposition accelerator, and an address controller. The vector memory stores a vector memory array. The block transposition accelerator reads a vector of a block of data within the vector memory array. The block transposition accelerator also writes a transposition of the vector of the block of data to the vector memory. The address controller determines a vector access order, and the block transposition accelerator accesses the vector of the block of data within the vector memory array according to the vector access order.
Abstract:
A method of setting a Radiofrequency, RF, signal level in a RF receiver comprising: estimating an error of the signal level due to signal level reaching a condition of jamming or clipping by correlating the signal level with a point of a characterization curve of jamming condition or with a point of a characterization curve of clipping condition (300), respectively; correcting the RF signal level based on the error; and, wherein: each of the characterization curves comprises a plurality of points comprising first points determined in a previously performed characterization at a point of measurement and groups of second points stepped between pairs of adjacent first points, said plurality of first points including at least three points defining at least two sections of the characterization curve.