公开(公告)号：US08635762B1

公开(公告)日：2014-01-28

申请号：US11533741

申请日：2006-09-20

申请人： Nikhil V. Kelkar ,  Sadanand R. Patil ,  Cheol Hyun Han

发明人： Nikhil V. Kelkar ,  Sadanand R. Patil ,  Cheol Hyun Han

IPC分类号： H01Q17/00

CPC分类号： G06K19/07754 ,  H01P11/00 ,  H01Q1/2208 ,  H01Q1/38 ,  H01Q7/00 ,  H01Q23/00 ,  Y10T29/49002 ,  Y10T29/49016 ,  Y10T29/49018

摘要： A method for attaching antennae to RFID tags is disclosed. Included is the use of RFID tags having asymmetrical interconnect system for one or more antennae, such that virtually any rotational orientation of the RFID tag will result in a successful antennae attachment. Two oversized and “L” shaped gold-bumped holes can be arranged on the same side of the ship in an opposing action, such that at least one axis of symmetry is formed. Accordingly, virtually all rotational orientations of the chip are then acceptable when attaching a pair of opposing pole antenna leads. Alternatively, a pair of poles can be located on opposing chips surfaces, such that antenna substrates can be attached to both the top and bottom of the chip to form a product “sandwich”, whereby the rotational orientation of the chip is irrelevant at an antenna attachment step.

摘要翻译： 公开了一种将天线连接到RFID标签的方法。 包括使用具有用于一个或多个天线的不对称互连系统的RFID标签，使得RFID标签的实际上任何旋转取向将导致成功的天线附接。 两个大尺寸和“L”形的金凸起的孔可以以相对的作用布置在船的同一侧上，使得形成至少一个对称轴。 因此，当连接一对相对的极天线引线时，芯片的几乎所有的旋转取向都是可接受的。 或者，一对极可以位于相对的芯片表面上，使得天线基板可以附接到芯片的顶部和底部，以形成产品“夹心”，由此芯片的旋转取向在天线处是不相关的 附件步骤。

公开(公告)号：US07230580B1

公开(公告)日：2007-06-12

申请号：US10651683

申请日：2003-08-29

申请人： Nikhil V. Kelkar ,  Sadanand R. Patil ,  Cheol Hyun Han

发明人： Nikhil V. Kelkar ,  Sadanand R. Patil ,  Cheol Hyun Han

IPC分类号： H01Q7/00

CPC分类号： G06K19/07754 ,  H01P11/00 ,  H01Q1/2208 ,  H01Q1/38 ,  H01Q7/00 ,  H01Q23/00 ,  Y10T29/49002 ,  Y10T29/49016 ,  Y10T29/49018

摘要： An apparatus and method for attaching antennae to RFID tags is disclosed. Included is the use of RFID tags having a symmetrical interconnect system for attaching one or more antennae, such that virtually any rotational orientation of the RFID tag will result in a successful antennae attachment. Two oversized and “L” shaped gold-bumped poles can be arranged on the same side of a chip in an opposing fashion, such that at least one axis of symmetry is formed. Accordingly, virtually all rotational orientations of the chip are then acceptable when attaching a pair of opposing pole antenna leads. Alternatively, a pair of poles can be located on opposing chip surfaces, such that antenna substrates can attach to both the top and bottom of the chip to form a product “sandwich,” whereby the rotational orientation of the chip is irrelevant at an antenna attachment step.

摘要翻译： 公开了一种用于将天线附接到RFID标签的装置和方法。 包括使用具有用于附接一个或多个天线的对称互连系统的RFID标签，使得RFID标签的实际上任何旋转取向将导致成功的天线附接。 两个大尺寸和“L”形的金凸极可以以相对的方式布置在芯片的同一侧上，使得形成至少一个对称轴。 因此，当连接一对相对的极天线引线时，芯片的几乎所有的旋转取向都是可接受的。 或者，一对极可以位于相对的芯片表面上，使得天线基板可以附接到芯片的顶部和底部两者以形成产品“夹心”，由此芯片的旋转取向在天线附件上是不相关的 步。

公开(公告)号：US07095116B1

公开(公告)日：2006-08-22

申请号：US10726042

申请日：2003-12-01

申请人： Nikhil V. Kelkar ,  Viraj A. Patwardhan ,  King Tong Lim ,  A. Tharumalingam Sri Ganesh

发明人： Nikhil V. Kelkar ,  Viraj A. Patwardhan ,  King Tong Lim ,  A. Tharumalingam Sri Ganesh

IPC分类号： H01L21/44

CPC分类号： H01L24/05 ,  H01L24/12 ,  H01L2224/0401 ,  H01L2224/05082 ,  H01L2224/05558 ,  H01L2224/05624 ,  H01L2224/13023 ,  H01L2224/131 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01049 ,  H01L2924/0105 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/00

摘要： An apparatus and method for providing aluminum free under bump metallization stacks in an integrated circuit device is disclosed. Included is the use of vias having substantially non-vertical sidewalls that are formed in a resilient layer, such as benzocyclobutene. In general, semiconductor wafers having a plurality of dice are created, with each die having a plurality of contact pads that are formed on the active surface of the wafer. One or more passivation layers are formed on the active surface and etched appropriately to form vias coupled to the contact pads. At least one resilient layer is then disposed atop the top passivation layer and etched appropriately to form vias aligned with and smaller than the passivation layer vias, such that at least part of the contact pads but no part of the passivation layer is exposed. A plurality of UBM stacks are then formed atop the exposed contact pads and resilient layer, with each UBM stack having a plurality of layers, none of which are aluminum layers. Solder bumps are then formed atop each UBM stack.

摘要翻译： 公开了一种用于在集成电路装置中提供无铝凸块金属化叠层的装置和方法。 包括使用具有形成在弹性层中的基本上非垂直侧壁的通孔，例如苯并环丁烯。 通常，产生具有多个骰子的半导体晶片，每个管芯具有形成在晶片的有效表面上的多个接触焊盘。 一个或多个钝化层形成在有源表面上并被适当地蚀刻以形成耦合到接触焊盘的通孔。 然后将至少一个弹性层设置在顶部钝化层顶部并适当地蚀刻以形成与钝化层通孔对准并且小于钝化层通孔的通孔，使得暴露出至少部分接触焊盘但不包括钝化层的一部分。 然后，多个UBM堆叠形成在暴露的接触焊盘和弹性层的顶部，每个UBM堆叠具有多个层，其中没有一个是铝层。 然后在每个UBM堆叠顶部形成焊料凸块。

公开(公告)号：US06916688B1

公开(公告)日：2005-07-12

申请号：US10313434

申请日：2002-12-05

申请人： Nikhil V. Kelkar ,  Jaime Bayan

发明人： Nikhil V. Kelkar ,  Jaime Bayan

IPC分类号： H01L21/44 ,  H01L23/00 ,  H01L23/373

CPC分类号： H01L23/3735 ,  H01L23/562 ,  H01L2224/0401 ,  H01L2224/04026 ,  H01L2224/16 ,  H01L2224/274 ,  H01L2924/01046 ,  H01L2924/01079

摘要： A flip chip semiconductor package with an integral heat sink is disclosed as well as a technique for creating individual heat sinks by applying a conductive layer to the back surface of a wafer containing integrated circuitry before singulation. According to one aspect of the invention, an adhesive layer is applied to the back surface of a semiconductor wafer. A layer of conductive material such as copper is then attached to the back surface of the wafer using the previously applied adhesive. The wafer is then singulated to create individual semiconductor packages with superior heat transfer properties.

摘要翻译： 公开了一种具有整体散热器的倒装芯片半导体封装以及通过在分割之前将包含集成电路的晶片的背面施加导电层来产生单个散热片的技术。 根据本发明的一个方面，将粘合剂层施加到半导体晶片的背面。 然后使用先前施加的粘合剂将诸如铜的导电材料层附着到晶片的背面。 然后将晶片分离以产生具有优异传热特性的单独的半导体封装。

公开(公告)号：US06255141B1

公开(公告)日：2001-07-03

申请号：US09391137

申请日：1999-09-07

申请人： Inderjit Singh ,  Hem P. Takiar ,  Ranjan J. Mathew ,  Nikhil V. Kelkar

发明人： Inderjit Singh ,  Hem P. Takiar ,  Ranjan J. Mathew ,  Nikhil V. Kelkar

IPC分类号： H01L2182

CPC分类号： H01L23/62 ,  H01L2224/13

摘要： Improved methods of packaging external fuses together with integrated circuit devices are described. A pair of frame strips are provided that each have an associated set of contact pads. A resistor paste is applied to one of the contact pad sets and the frame strips are laminated together by curing the resistor paste which is positioned between the contact pad sets. Dice are mounted to the opposite sides of the second contact pads to form integrated circuit devices having integrally packaged external fuses. The packaged devices are eventually singulated for use. In some embodiments, the contact pads each have downturned tabs that form wings on opposite sides of each die. When the dice are flip chips, a device may be attached to a substrate board by soldering both the bumps on the die and the tab wing tips to the substrate board. In a preferred embodiment, the resistor paste is a positive temperature coefficient resistor paste.

摘要翻译： 描述了与集成电路器件一起封装外部保险丝的改进方法。 提供了一对框带，每个框带具有一组相关的接触垫。 将电阻浆料施加到接触垫组中的一个，并且通过固化位于接触垫组之间的电阻浆料将框带层压在一起。 骰子安装到第二接触焊盘的相对侧，以形成具有整体封装的外部熔断器的集成电路器件。 封装的装置最终被单独使用。 在一些实施例中，接触垫每个都具有在每个管芯的相对侧上形成翅膀的下降的突片。 当芯片是倒装芯片时，可以通过将裸片上的凸起和凸片翼尖焊接到基板来将装置附接到基板。 在优选实施例中，电阻膏是正温度系数电阻膏。

公开(公告)号：US07420280B1

公开(公告)日：2008-09-02

申请号：US11120841

申请日：2005-05-02

申请人： Nikhil V. Kelkar

发明人： Nikhil V. Kelkar

IPC分类号： H01L23/48

CPC分类号： H01L24/10 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05085 ,  H01L2224/05144 ,  H01L2224/05155 ,  H01L2224/05568 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2924/00013 ,  H01L2924/01013 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01049 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2224/13099 ,  H01L2924/013

摘要： An improved under bump structure for use in semiconductor devices is described. The under bump structure includes a passivation layer having a plurality of vias. The vias are positioned such that a plurality of vias are associated with (i.e., located over) each contact pad. A metal layer fills the vias and forms a metallization pad that is suitable for supporting a solder bump. Preferably the metal layer extends over at least portions of the passivation layer to form a unified under bump metallization pad over the associated contact pad. Each metallization pad is electrically connected to the contact pad through a plurality of the vias. The described under bump structures can be formed at the wafer level.

摘要翻译： 描述了用于半导体器件的改进的凹凸结构。 凸起下结构包括具有多个通孔的钝化层。 通孔的定位使得多个通孔与每个接触垫相关联（即，位于上方）。 金属层填充通孔并形成适于支撑焊料凸块的金属化焊盘。 优选地，金属层在钝化层的至少一部分上延伸以在相关联的接触垫上形成统一的凸块下金属化焊盘。 每个金属化焊盘通过多个通孔电连接到接触焊盘。 可以在晶片级形成所述的凹凸结构。

公开(公告)号：US07375431B1

公开(公告)日：2008-05-20

申请号：US11084447

申请日：2005-03-18

申请人： Viraj Patwardhan ,  Nikhil V. Kelkar

发明人： Viraj Patwardhan ,  Nikhil V. Kelkar

IPC分类号： H01L23/48

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/0554 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/11011 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11472 ,  H01L2224/11901 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/29099 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A polymer stencil is applied to the active surface of a wafer. The stencil has openings that at least partially overlay associated metallization pads on the wafer and divider strips positioned between adjacent openings. The divider strips are arranged to overlay portions of associated metallization pads so that at least two adjacent openings overlay portions of each metallization pad. After the stencil has been positioned, a solder paste is applied to the stencil openings. The solder paste may then be reflowed with the polymer stencil remaining in place. The solder naturally creeps under the stencil so that unitary solder bumps are formed on each metallization pad. The described methods and arrangements can be used to create low profile solder bumps that are not attainable using conventional solder bump formation techniques.

摘要翻译： 将聚合物模板施加到晶片的有效表面。 模板具有至少部分地覆盖晶片上相关联的金属化焊盘并且位于相邻开口之间的分隔条的开口。 分隔带布置成覆盖相关联的金属化焊盘的部分，使得至少两个相邻的开口覆盖每个金属化焊盘的部分。 在模板定位之后，将焊膏施加到模版孔。 然后可以将聚合物模板保留在适当位置来回流焊膏。 焊料自然地在模板下爬行，使得在每个金属化焊盘上形成单一的焊料凸块。 所描述的方法和布置可以用于产生使用常规的焊料凸块形成技术不可获得的低轮廓焊料凸块。

公开(公告)号：US07674702B1

公开(公告)日：2010-03-09

申请号：US12104362

申请日：2008-04-16

申请人： Viraj Patwardhan ,  Nikhil V. Kelkar

发明人： Viraj Patwardhan ,  Nikhil V. Kelkar

IPC分类号： H01L21/44

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L24/16 ,  H01L2224/0554 ,  H01L2224/05572 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/11011 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/11472 ,  H01L2224/11901 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2224/29099 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A polymer stencil is applied to the active surface of a wafer. The stencil has openings that at least partially overlay associated metallization pads on the wafer and divider strips positioned between adjacent openings. The divider strips are arranged to overlay portions of associated metallization pads so that at least two adjacent openings overlay portions of each metallization pad. After the stencil has been positioned, a solder paste is applied to the stencil openings. The solder paste may then be reflowed with the polymer stencil remaining in place. The solder naturally creeps under the stencil so that unitary solder bumps are formed on each metallization pad. The described methods and arrangements can be used to create low profile solder bumps that are not attainable using conventional solder bump formation techniques.

摘要翻译： 将聚合物模板施加到晶片的有效表面。 模板具有至少部分地覆盖晶片上相关联的金属化焊盘并且位于相邻开口之间的分隔条的开口。 分隔带布置成覆盖相关联的金属化焊盘的部分，使得至少两个相邻的开口覆盖每个金属化焊盘的部分。 在模板定位之后，将焊膏施加到模版孔。 然后可以将聚合物模板保留在适当位置来回流焊膏。 焊料自然地在模板下爬行，使得在每个金属化焊盘上形成单一的焊料凸块。 所描述的方法和布置可以用于产生使用常规的焊料凸块形成技术不可获得的低轮廓焊料凸块。

公开(公告)号：US06822315B2

公开(公告)日：2004-11-23

申请号：US10076818

申请日：2002-02-14

申请人： Nikhil V. Kelkar ,  Luu T. Nguyen

发明人： Nikhil V. Kelkar ,  Luu T. Nguyen

IPC分类号： H01L23544

CPC分类号： H01L21/3043 ,  H01L21/67092 ,  H01L21/681

摘要： An apparatus and method for scribing a semiconductor wafer coated with a substantially opaque material using vision recognition is disclosed. The apparatus includes a stage configured to hold a wafer, an imaging unit configured to generate an image of the wafer, and a computer configured to identify the coordinates of the scribe lines on the wafer from the image. During operation, the wafer is imaged using the imaging unit. The computer then identifies the coordinates of the scribe lines on the wafer from the image. Thereafter the coordinates are provided to a dicing machine which performs the dicing of the wafer. Accuracy is therefore improved since the dicing machine relies on the coordinates of the scribe lines as opposed to attempting to recognize the scribe lines through the opaque material. According to various embodiments of the invention, the imaging unit may use infrared, X-ray or ultrasound waves to generate the image of the wafer.

摘要翻译： 公开了一种用于使用视觉识别来划刻涂有基本不透明材料的半导体晶片的装置和方法。 该装置包括配置成保持晶片的台，被配置为产生晶片的图像的成像单元和被配置为从图像识别晶片上的划线的坐标的计算机。 在操作期间，使用成像单元对晶片进行成像。 然后，计算机从图像中识别晶片上划线的坐标。 此后，将坐标提供给执行晶片切割的切割机。 因此，由于切割机依赖于划痕线的坐标，而是试图通过不透明材料识别划线，因此精度得到改善。 根据本发明的各种实施例，成像单元可以使用红外，X射线或超声波来产生晶片的图像。

公开(公告)号：US06459143B2

公开(公告)日：2002-10-01

申请号：US09844062

申请日：2001-04-26

申请人： Inderjit Singh ,  Hem P. Takiar ,  Ranjan J. Mathew ,  Nikhil V. Kelkar

发明人： Inderjit Singh ,  Hem P. Takiar ,  Ranjan J. Mathew ,  Nikhil V. Kelkar

IPC分类号： H01L2358

CPC分类号： H01L23/62 ,  H01L2224/13

摘要： Improved methods of packaging external fuses together with integrated circuit devices are described. A pair of frame strips are provided that each have an associated set of contact pads. A resistor paste is applied to one of the contact pad sets and the frame strips are laminated together by curing the resistor paste which is positioned between the contact pad sets. Dice are mounted to the opposite sides of the second contact pads to form integrated circuit devices having integrally packaged external fuses. The packaged devices are eventually singulated for use. In some embodiments, the contact pads each have downturned tabs that form wings on opposite sides of each die. When the dice are flip chips, a device may be attached to a substrate board by soldering both the bumps on the die and the tab wing tips to the substrate board. In a preferred embodiment, the resistor paste is a positive temperature coefficient resistor paste.

摘要翻译： 描述了与集成电路器件一起封装外部保险丝的改进方法。 提供了一对框带，每个框带具有一组相关的接触垫。 将电阻浆料施加到接触垫组中的一个，并且通过固化位于接触垫组之间的电阻浆料将框带层压在一起。 骰子安装到第二接触焊盘的相对侧，以形成具有整体封装的外部熔断器的集成电路器件。 封装的装置最终被单独使用。 在一些实施例中，接触垫每个都具有在每个管芯的相对侧上形成翅膀的下降的突片。 当芯片是倒装芯片时，可以通过将裸片上的凸起和凸片翼尖焊接到基板来将装置附接到基板。 在优选实施例中，电阻膏是正温度系数电阻膏。