公开(公告)号：US5620928A

公开(公告)日：1997-04-15

申请号：US439362

申请日：1995-05-11

Applicant: Shaw W. Lee ,  Anthony E. Panczak ,  Jagdish G. Belani

Inventor： Shaw W. Lee ,  Anthony E. Panczak ,  Jagdish G. Belani

IPC: H01L21/68 ,  H01L23/13 ,  H01L23/31 ,  H01L23/498 ,  H01L21/60

CPC classification number: H01L24/73 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/4985 ,  H01L2224/05554 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/49171 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15173 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18165 ,  Y10T29/49146 ,  Y10T29/49171

Abstract: A method of manufacturing an integrated circuit package assembly including (i) an integrated circuit die having a bottom surface and a plurality of input/output terminals, (ii) electrically conductive traces and/or contacts accessible from outside the assembly, and (iii) an encapsulating material encapsulating the integrated circuit die and portions of the electrically conductive traces and/or contacts will be disclosed. The method includes the following steps. First, a temporary support substrate or carrier having a top surface is provided for supporting the integrated circuit package as the package is being assembled. Then, the integrated circuit die is detachably supported on the top surface of the temporary support substrate. Each of the input/output terminals on the integrated circuit die are electrically connected to the electrically conductive traces and/or contacts. Next, the integrated circuit die and at least a portion of the electrically conductive traces and/or contacts are encapsulated with the encapsulating material such that the bottom surface of the integrated circuit die supported by the temporary support substrate is not covered by the encapsulating material. Finally, the encapsulated integrated circuit die is detached from the temporary support substrate.

Abstract translation: 一种制造集成电路封装组件的方法，包括（i）具有底表面和多个输入/输出端子的集成电路管芯，（ii）可从组件外部接近的导电迹线和/或触点，以及（iii） 将公开封装集成电路管芯的封装材料和导电迹线和/或触点的部分。 该方法包括以下步骤。 首先，提供具有顶表面的临时支撑衬底或载体，用于在组装封装件时支撑集成电路封装。 然后，集成电路模具可拆卸地支撑在临时支撑基板的顶表面上。 集成电路管芯上的每个输入/输出端子电连接到导电迹线和/或触点。 接下来，利用封装材料封装集成电路管芯和至少一部分导电迹线和/或触点，使得由临时支撑衬底支撑的集成电路管芯的底表面不被封装材料覆盖。 最后，封装的集成电路管芯与临时支撑衬底分离。

公开(公告)号：US20100015329A1

公开(公告)日：2010-01-21

申请号：US12174046

申请日：2008-07-16

Applicant: Luu T. NGUYEN ,  Anindya PODDAR ,  Shaw W. LEE ,  Ashok S. PRABHU

Inventor： Luu T. NGUYEN ,  Anindya PODDAR ,  Shaw W. LEE ,  Ashok S. PRABHU

IPC: B05D5/12 ,  B05D3/06 ,  C23C18/16

CPC classification number: H05K3/048 ,  B05D1/327 ,  B05D2252/02 ,  H01L21/4821 ,  H01L21/561 ,  H01L21/568 ,  H01L23/3107 ,  H01L23/49541 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/97 ,  H01L2224/32245 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15747 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K1/0393 ,  H05K3/027 ,  H05K3/16 ,  H05K3/388 ,  H05K2203/1545 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45015 ,  H01L2924/207

Abstract: Methods and arrangements are described for forming an array of contacts for use in packaging one or more integrated circuit devices. In particular, various methods are described for forming contacts having thicknesses less than approximately 10 μm, and in particular embodiments, between 0.5 to 2 μm.

Abstract translation: 描述了形成用于封装一个或多个集成电路器件的触点阵列的方法和布置。 特别地，描述了用于形成厚度小于约10um，特别是在0.5至2μm之间的接触的各种方法。

公开(公告)号：US5620927A

公开(公告)日：1997-04-15

申请号：US449950

申请日：1995-05-25

Applicant: Shaw W. Lee

Inventor： Shaw W. Lee

IPC: H01L21/48 ,  H01L21/66 ,  H01L23/31 ,  H05K1/02 ,  H05K3/34 ,  H01L21/60

CPC classification number: H05K3/3478 ,  H01L21/4853 ,  H01L23/3128 ,  H01L22/12 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/742 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K1/0269 ,  H05K2203/0113 ,  H05K2203/0338 ,  H05K2203/041 ,  H05K2203/082 ,  Y10T29/49146

Abstract: A method and apparatus of attaching solder balls for semiconductor packages is disclosed herein. In a first embodiment, a stencil, having a hole array that matches with a solder ball array on a substrate, is fitted into stencil holder which is inserted the housing of the attachment apparatus. A prefluxed molded substrate strip is inserted into the main station directly above the stencil in the holder. A multiplicity of preformed solder balls are rolled from a reservoir across the stencil hole array thereby filling each of the holes. Vacuum may be used with a modified stencil design to assist in drawing the balls in the holes. An operator or pattern recognition camera may be employed to detect any missing solder balls where corrective action can be immediately taken. After the solder balls have been properly positioned relative to the substrate strip, the solder may be reflowed to attach the balls to the substrate. The described apparatus is relative inexpensive and flexible enough to accommodate various substrate sizes and types of packages.

Abstract translation: 本文公开了一种用于安装半导体封装的焊球的方法和装置。 在第一实施例中，具有与衬底上的焊球阵列相匹配的孔阵列的模版被装配到插入附接装置的壳体的模板保持器中。 将预先焊接的模制衬底条带直接插入到支架中的模板正上方的主站中。 许多预成形的焊球从容器穿过模板孔阵列滚动，从而填充每个孔。 真空可以与改进的模板设计一起使用以帮助将球画在孔中。 可以使用操作者或模式识别摄像机来检测任何丢失的焊球，其中可以立即采取校正动作。 在焊球相对于衬底条被适当地定位之后，焊料可以被回流以将球附接到衬底。 所描述的装置相对便宜且足够灵活以适应各种基板尺寸和类型的包装。