公开(公告)号：US11007116B2

公开(公告)日：2021-05-18

申请号：US16222527

申请日：2018-12-17

申请人： Kyung Ok Yang ,  Su Yong Kim ,  Jae Young Yang

发明人： Kyung Ok Yang ,  Su Yong Kim ,  Jae Young Yang

IPC分类号： B65D47/18 ,  A61J1/14 ,  A61F9/00 ,  A61M39/24

摘要： Provided is a medication dispenser configured to discharge a liquid state medication stored therein by a pumping operation in a predetermined amount in a drop state and prevent a noise occurrence during medication discharge, and having a bacteria infiltration prevention function, wherein a flow path member and a second check valve are mounted in a liner, the second check valve is composed of a hemispherical cylinder mounted in an elevation space of the liner, having an open upper part, and of which a diameter decreases toward a lower end and includes a variable part in which the hemispherical cylinder is vertically variable and an opening and closing protrusion configured to perform supply and blocking of a flow path.

公开(公告)号：US08904157B2

公开(公告)日：2014-12-02

申请号：US11753842

申请日：2007-05-25

申请人： Su-yong Kim

发明人： Su-yong Kim

IPC分类号： G06F1/32 ,  G06F1/26 ,  G06F15/177 ,  H04L12/12

CPC分类号： G06F1/325 ,  G06F1/3209 ,  H04L12/12 ,  Y02D50/20 ,  Y02D50/40

摘要： A computer including a main body in which a system is built, a peripheral device coupled to the main body, a power supplying part to supply power to the system and/or the peripheral device, an interface part to communicate with an external device, and a controller to control the power supplying part to apply power to the system but not to the peripheral device if a power-saving power applying signal is received through the interface part.

摘要翻译： 一种计算机，包括其中构建系统的主体，耦合到主体的外围设备，向系统和/或外围设备供电的供电部分，与外部设备通信的接口部分，以及 如果通过接口部分接收到省电功率施加信号，则控制器控制供电部分向系统施加电力而不向外围设备供电。

公开(公告)号：US20140211565A1

公开(公告)日：2014-07-31

申请号：US14165835

申请日：2014-01-28

申请人： Jung-Ho Song ,  Su-Yong Kim ,  Sang-Won Hwang

发明人： Jung-Ho Song ,  Su-Yong Kim ,  Sang-Won Hwang

IPC分类号： G11C16/14

CPC分类号： G11C16/14 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/3418 ,  G11C16/3459

摘要： To program in a nonvolatile memory device include a plurality of memory cells that are programmed into multiple states through at least two program steps, a primary program is performed from an erase level to a first target level with respect to the memory cells coupled to a selected word line A preprogram is performed from the erase level to a preprogram level in association with the primary program with respect to the memory cells coupled to the selected word line, where the preprogram level is larger than the erase level and smaller than the first target level A secondary program is performed from the preprogram level to a second target level with respect to the preprogrammed memory cells coupled to the selected word line.

摘要翻译： 在非易失性存储器件中编程包括通过至少两个程序步骤被编程成多个状态的多个存储器单元，相对于耦合到所选择的存储单元，从擦除电平到第一目标电平执行主程序 字线相对于耦合到所选择的字线的存储器单元与原始程序相关联地从擦除电平执行预编程电平，其中预编程电平大于擦除电平并小于第一目标电平 相对于耦合到所选字线的预编程存储器单元，从预编程级到第二目标级执行次程序。

公开(公告)号：US20130051146A1

公开(公告)日：2013-02-28

申请号：US13584847

申请日：2012-08-14

申请人： JUNG-YUN YUN ,  JONG-YEOL PARK ,  CHI-WEON YOON ,  SUNG-WON YUN ,  SU-YONG KIM

发明人： JUNG-YUN YUN ,  JONG-YEOL PARK ,  CHI-WEON YOON ,  SUNG-WON YUN ,  SU-YONG KIM

IPC分类号： G11C16/26 ,  G11C16/04

CPC分类号： H01L27/11582 ,  G11C16/0483

摘要： A three-dimensional (3D) semiconductor memory device comprises memory cell strings each comprising at least one selection transistor and at least one memory cell, a first pass transistor group sharing a first well region and comprising a first selection line pass transistor connected to the selection transistor and a first world line pass transistor connected to the memory cell, a second pass transistor group sharing a second well region and comprising a second selection line pass transistor connected to the selection transistor, and a controller that controls the first pass transistor group and the second pass transistor group. The controller applies selected voltages to the first and second well regions during read operation.

摘要翻译： 三维（3D）半导体存储器件包括存储单元串，每个存储单元串包括至少一个选择晶体管和至少一个存储单元，共享第一阱区的第一级晶体管组，并且包括连接到选择的第一选择线传输晶体管 晶体管和连接到存储单元的第一世界线传输晶体管，第二传输晶体管组共享第二阱区并且包括连接到选择晶体管的第二选择线传输晶体管，以及控制器，其控制第一传输晶体管组和 二级晶体管组。 控制器在读取操作期间将选择的电压施加到第一和第二阱区。

公开(公告)号：US08336097B2

公开(公告)日：2012-12-18

申请号：US12208401

申请日：2008-09-11

申请人： Su Yong Kim ,  Dae Sik Choi ,  Dong Hyun Lee ,  Do Hoon Lee

发明人： Su Yong Kim ,  Dae Sik Choi ,  Dong Hyun Lee ,  Do Hoon Lee

IPC分类号： G06F11/00

CPC分类号： G06F21/554 ,  G06F21/629 ,  G06F2221/2141 ,  H04L63/10

摘要： An apparatus and method for preventing an attempt to perform malicious activities using web browser weaknesses are provided. A file protection module monitors attempts to access at least one file resource when the web browser executes a program, and allows or denies access. A registry protection module monitors attempts to access at least one registry resource when the web browser executes a program, and allows or denies access. A process protection module monitors attempts to execute or terminate at least one process when the web browser executes a program, and allows or denies the execution or termination.

摘要翻译： 提供了一种用于防止尝试使用web浏览器弱点进行恶意活动的装置和方法。 当Web浏览器执行程序并允许或拒绝访问时，文件保护模块监视尝试访问至少一个文件资源。 注册表保护模块监视在Web浏览器执行程序时访问至少一个注册表资源的尝试，并允许或拒绝访问。 当Web浏览器执行程序时，进程保护模块监视执行或终止至少一个进程的尝试，并允许或拒绝执行或终止。

公开(公告)号：US08082590B2

公开(公告)日：2011-12-20

申请号：US12055381

申请日：2008-03-26

申请人： Su Yong Kim ,  Dae Sik Choi ,  Dong Hyun Lee ,  Do Hoon Lee

发明人： Su Yong Kim ,  Dae Sik Choi ,  Dong Hyun Lee ,  Do Hoon Lee

IPC分类号： G06F12/14

CPC分类号： G06F12/1491 ,  G06F21/55

摘要： Provided are an apparatus and method of detecting and controlling a privilege level violation process. The apparatus monitors whether higher-privileged processes depend on information provided from lower-privileged objects or denies the higher-privileged processes to access the lower-privileged objects. The apparatus is provided in a process, and monitors whether a process accesses to a lower-privileged object. The apparatus gives a warning message or denies an access of the process to the lower-privileged object when it detects that the higher-privileged process access to the lower-privileged object. Therefore, the apparatus of detecting and controlling a privilege level violation process detects weaknesses that may be caused by privilege level violation, thus allowing a system to be safely operated.

摘要翻译： 提供了一种检测和控制特权级别违反过程的装置和方法。 该设备监控较高权限的进程是否依赖于从较低特权对象提供的信息，或拒绝较高权限的进程访问较低权限的对象。 该设备被提供在一个进程中，并且监视进程是否访问较低特权对象。 当设备检测到较高权限的进程访问较低权限的对象时，该设备会发出警告消息或拒绝对低级特权对象的访问。 因此，检测和控制特权级别违规处理的装置检测可能由特权级别违规引起的弱点，从而允许系统安全地操作。

公开(公告)号：US09075515B2

公开(公告)日：2015-07-07

申请号：US13535658

申请日：2012-06-28

申请人： Sang-jin Hong ,  Ki-young Kim ,  Su-yong Kim ,  Mi-ra Eom ,  Ji-won Im

发明人： Sang-jin Hong ,  Ki-young Kim ,  Su-yong Kim ,  Mi-ra Eom ,  Ji-won Im

IPC分类号： G06F3/041 ,  G06F3/0485 ,  G06F3/0488 ,  G06F3/0481

CPC分类号： G06F3/0485 ,  G06F3/0481 ,  G06F3/04812 ,  G06F3/04817 ,  G06F3/0488 ,  G06F3/04883

摘要： A computing device including a display unit to display a screen, a touch input to receive a user's touch input on the display unit, and a controller to control the display unit to display at least a part of a plurality of user interface (UI) items on the screen with a predetermined degree of transparency, to scroll the UI items in a predetermined direction and to sequentially display the UI items on the screen according to the user's touch input, and to increase the degree of transparency of the UI items if the UI items are not scrolled any more.

摘要翻译： 一种包括用于显示屏幕的显示单元，用于在所述显示单元上接收用户的触摸输入的触摸输入的计算设备，以及控制器，用于控制所述显示单元显示多个用户界面（UI）项目的至少一部分 在屏幕上以预定的透明度，在预定方向上滚动UI项目，并根据用户的触摸输入顺序地在屏幕上显示UI项目，并且如果UI（UI），则增加UI项目的透明度 项目不再滚动。

公开(公告)号：US20150055430A1

公开(公告)日：2015-02-26

申请号：US14257072

申请日：2014-04-21

申请人： SU-YONG KIM ,  LEE JINYUB ,  LEE SEUNGJAE

发明人： SU-YONG KIM ,  LEE JINYUB ,  LEE SEUNGJAE

IPC分类号： G11C8/08 ,  G11C8/10

CPC分类号： G11C8/08 ,  G11C11/4085 ,  G11C16/08

摘要： A nonvolatile memory device comprises multiple memory blocks each comprising multiple memory cells arranged at intersections of wordlines and bitlines, an address decoder configured to electrically connect first lines to wordlines of one of the memory blocks in response to an address, a line selection switch circuit configured to electrically connect the first lines to second lines in different configurations according to the address, a first line decoder configured to provide the second lines with wordline voltages needed for driving, and a voltage generator configured to generate the wordline voltages.

摘要翻译： 非易失性存储器件包括多个存储器块，每个存储器块包括布置在字线和位线的交点处的多个存储器单元，地址解码器被配置为响应于地址将第一行电路连接到一个存储器块的字线，配置线路选择开关电路 根据地址将第一线路电连接到不同配置的第二线路，第一线路解码器，被配置为向第二线路提供用于驱动所需的字线电压;以及电压发生器，被配置为产生字线电压。

公开(公告)号：US20130111379A1

公开(公告)日：2013-05-02

申请号：US13651523

申请日：2012-10-15

申请人： Sang-jin HONG ,  Su-yong KIM ,  Kyung-do PARK ,  Mi-ra EOM ,  Jong-hwa LEE ,  Ji-won IM

发明人： Sang-jin HONG ,  Su-yong KIM ,  Kyung-do PARK ,  Mi-ra EOM ,  Jong-hwa LEE ,  Ji-won IM

IPC分类号： G06F3/048

CPC分类号： G06F3/04883

摘要： A computing device includes a display unit to display a screen, a touch input unit to receive a user's touch input on the display unit, and a controller to display a locking image on the screen with a predetermined degree of definition while the computing device is locked, to decrease the degree of definition of the locking image if the user's touch input is determined to be an unlocking input, and to unlock the computing device if the unlocking input meets an unlocking condition.

摘要翻译： 计算装置包括显示屏幕的显示单元，用于接收用户在显示单元上的触摸输入的触摸输入单元，以及控制器，以在计算设备被锁定时以预定程度的定义在屏幕上显示锁定图像 如果用户的触摸输入被确定为解锁输入，则降低锁定图像的定义程度，并且如果解锁输入满足解锁状态则解锁计算设备。

公开(公告)号：US20120140586A1

公开(公告)日：2012-06-07

申请号：US13236746

申请日：2011-09-20

申请人： Su-yong Kim ,  Doogon Kim

发明人： Su-yong Kim ,  Doogon Kim

IPC分类号： G11C8/10

CPC分类号： G11C16/08 ,  G11C5/02 ,  G11C5/063 ,  G11C8/10 ,  G11C16/0483 ,  H01L27/0688 ,  H01L27/11582 ,  H01L29/7926

摘要： A nonvolatile memory device comprises a memory cell array comprising a plurality of memory blocks, an address decoder that selects one of the memory blocks in response to an input address and generates a first control signal and a second control signal, a plurality of metal lines connected with the memory blocks and extending along a first direction, a plurality of pass transistors that connect the address decoder with a first subset of the metal lines connected with the selected memory block in response to the first control signal, and a plurality of ground transistors that supply a low voltage to a second subset of the metal lines connected with unselected memory blocks in response to the second control signal. The ground transistors have channels that extend along a second direction perpendicular to the first direction.

摘要翻译： 一种非易失性存储器件包括一个包括多个存储器块的存储单元阵列，一个地址解码器，响应于一个输入地址选择一个存储块并产生一个第一控制信号和一个第二控制信号，多个金属线连接 具有存储块并沿第一方向延伸的多个通过晶体管，其响应于第一控制信号将地址解码器连接到与选择的存储器块相连的金属线的第一子集，以及多个接地晶体管， 响应于第二控制信号，将低电压提供给与未选择的存储块相连的金属线的第二子集。 接地晶体管具有沿垂直于第一方向的第二方向延伸的通道。