公开(公告)号：US20080068301A1

公开(公告)日：2008-03-20

申请号：US11889642

申请日：2007-08-15

Applicant: Seungmin Kim ,  Woojoon Chung ,  Seongjoon Jeong ,  Taeseong Kim

Inventor： Seungmin Kim ,  Woojoon Chung ,  Seongjoon Jeong ,  Taeseong Kim

IPC: G09G3/28

CPC classification number: G09G3/2965 ,  G09G3/2927 ,  G09G3/2942 ,  G09G2310/066 ,  G09G2320/0266 ,  G09G2360/16

Abstract: A driving method of a plasma display device driven by dividing one frame into a plurality of sub-fields may include generating sustain pulses to be applied to at least any one sub-field among the plurality of sub-fields as first and second sustain pulses, the first and second sustain pulses having a same cycle but different points of time when a high level voltage is applied, and supplying the first and second sustain pulses to first and a second electrodes performing an display operation during at least one sub-field.

Abstract translation: 通过将一帧划分成多个子场而驱动的等离子体显示装置的驱动方法可以包括产生要施加到多个子场中的至少任一个子场的维持脉冲作为第一和第二维持脉冲， 第一和第二维持脉冲具有相同的周期，但是当施加高电平电压时具有不同的时间点，并且将第一和第二维持脉冲提供给在至少一个子场期间执行显示操作的第一和第二电极。

公开(公告)号：US20150332967A1

公开(公告)日：2015-11-19

申请号：US14809159

申请日：2015-07-24

Applicant: KWANGJIN MOON ,  SungHee KANG ,  TAESEONG KIM ,  Byung Lyul PARK ,  Yeun-Sang PARK ,  SUKCHUL BANG

Inventor： KWANGJIN MOON ,  SungHee KANG ,  TAESEONG KIM ,  Byung Lyul PARK ,  Yeun-Sang PARK ,  SUKCHUL BANG

IPC: H01L21/768 ,  H01L21/306

CPC classification number: H01L23/481 ,  H01L21/30625 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/53238 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/014 ,  H01L2224/05552

Abstract: Provided are semiconductor devices and methods of fabricating the same. The device may include a substrate including a first surface and a second surface opposing each other, a through-silicon-via (TSV) electrode provided in a via hole that may be formed to penetrate the substrate, and an integrated circuit provided adjacent to the through electrode on the first surface. The through electrode includes a metal layer filling a portion of the via hole and an alloy layer filling a remaining portion of the via hole. The alloy layer contains at least two metallic elements, one of which may be the same as that contained in the metal layer, and the other of which may be different from that contained in the metal layer.

Abstract translation: 提供半导体器件及其制造方法。 该器件可以包括包括彼此相对的第一表面和第二表面的衬底，设置在可以形成为穿透衬底的通孔中的穿硅通孔（TSV）电极，以及设置在邻近 通过第一表面上的电极。 贯通电极包括填充通孔的一部分的金属层和填充通孔的剩余部分的合金层。 合金层含有至少两种金属元素，其中之一可以与金属层中的金属元素相同，另一种可能与金属层中所含金属元素不同。

公开(公告)号：US20150137326A1

公开(公告)日：2015-05-21

申请号：US14463645

申请日：2014-08-19

Applicant: Pil-Kyu KANG ,  Byung Lyul PARK ,  SungHee KANG ,  TAESEONG KIM ,  TAEYEONG KIM ,  KWANGJIN MOON ,  Jae-Hwa PARK ,  SUKCHUL BANG ,  Seongmin SON ,  JIN HO AN ,  Ho-Jin LEE ,  JEONGGI JIN

Inventor： Pil-Kyu KANG ,  Byung Lyul PARK ,  SungHee KANG ,  TAESEONG KIM ,  TAEYEONG KIM ,  KWANGJIN MOON ,  Jae-Hwa PARK ,  SUKCHUL BANG ,  Seongmin SON ,  JIN HO AN ,  Ho-Jin LEE ,  JEONGGI JIN

IPC: H01L23/48 ,  H01L21/311 ,  H01L21/02 ,  H01L21/768

CPC classification number: H01L23/481 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76898 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a semiconductor substrate having a top surface and a bottom surface facing each other, an interlayer dielectric layer provided on the top surface of the semiconductor substrate and including an integrated circuit, an inter-metal dielectric layer provided on the interlayer dielectric layer and including at least one metal interconnection electrically connected to the integrated circuit, an upper dielectric layer disposed on the inter-metal dielectric layer, a through-electrode penetrating the inter-metal dielectric layer, the interlayer dielectric layer, and the semiconductor substrate, a via-dielectric layer surrounding the through-electrode and electrically insulating the through-electrode from the semiconductor substrate. The via-dielectric layer includes one or more air-gaps between the upper dielectric layer and the interlayer dielectric layer.

Abstract translation: 半导体器件包括具有彼此相对的顶表面和底表面的半导体衬底，设置在半导体衬底的顶表面上并且包括集成电路的层间介质层，设置在层间介电层上的金属间介电层 并且包括电连接到集成电路的至少一个金属互连，设置在金属间电介质层上的上部电介质层，贯穿金属间介电层的贯通电极，层间绝缘层和半导体基板， 所述通孔电介质层包围所述贯通电极，并且使所述通孔与所述半导体基板电绝缘。 通孔电介质层包括上电介质层和层间电介质层之间的一个或多个气隙。

公开(公告)号：US20140084473A1

公开(公告)日：2014-03-27

申请号：US14028523

申请日：2013-09-16

Applicant: KWANGJIN MOON ,  SungHee KANG ,  TAESEONG KIM ,  Byung Lyul PARK ,  Yeun-Sang PARK ,  SUKCHUL BANG

Inventor： KWANGJIN MOON ,  SungHee KANG ,  TAESEONG KIM ,  Byung Lyul PARK ,  Yeun-Sang PARK ,  SUKCHUL BANG

IPC: H01L23/48 ,  H01L23/532

CPC classification number: H01L23/481 ,  H01L21/30625 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/53238 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/014 ,  H01L2224/05552

Abstract: Provided are semiconductor devices and methods of fabricating the same. The device may include a substrate including a first surface and a second surface opposing each other, a through-silicon-via (TSV) electrode provided in a via hole that may be formed to penetrate the substrate, and an integrated circuit provided adjacent to the through electrode on the first surface. The through electrode includes a metal layer filling a portion of the via hole and an alloy layer filling a remaining portion of the via hole. The alloy layer contains at least two metallic elements, one of which may be the same as that contained in the metal layer, and the other of which may be different from that contained in the metal layer.

Abstract translation: 提供半导体器件及其制造方法。 该器件可以包括包括彼此相对的第一表面和第二表面的衬底，设置在可以形成为穿透衬底的通孔中的穿硅通孔（TSV）电极，以及设置在邻近 通过第一表面上的电极。 贯通电极包括填充通孔的一部分的金属层和填充通孔的剩余部分的合金层。 合金层含有至少两种金属元素，其中之一可以与金属层中的金属元素相同，另一种可能与金属层中所含金属元素不同。

公开(公告)号：US09153522B2

公开(公告)日：2015-10-06

申请号：US14028523

申请日：2013-09-16

Applicant: Kwangjin Moon ,  SungHee Kang ,  Taeseong Kim ,  Byung Lyul Park ,  Yeun-Sang Park ,  Sukchul Bang

Inventor： Kwangjin Moon ,  SungHee Kang ,  Taeseong Kim ,  Byung Lyul Park ,  Yeun-Sang Park ,  Sukchul Bang

IPC: H01L23/48 ,  H01L23/532 ,  H01L25/065 ,  H01L21/768 ,  H01L23/31 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/481 ,  H01L21/30625 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/53238 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/014 ,  H01L2224/05552

Abstract: Provided are semiconductor devices and methods of fabricating the same. The device may include a substrate including a first surface and a second surface opposing each other, a through-silicon-via (TSV) electrode provided in a via hole that may be formed to penetrate the substrate, and an integrated circuit provided adjacent to the through electrode on the first surface. The through electrode includes a metal layer filling a portion of the via hole and an alloy layer filling a remaining portion of the via hole. The alloy layer contains at least two metallic elements, one of which may be the same as that contained in the metal layer, and the other of which may be different from that contained in the metal layer.

Abstract translation: 提供半导体器件及其制造方法。 该器件可以包括包括彼此相对的第一表面和第二表面的衬底，设置在可以形成为穿透衬底的通孔中的穿硅通孔（TSV）电极，以及设置在邻近 通过第一表面上的电极。 贯通电极包括填充通孔的一部分的金属层和填充通孔的剩余部分的合金层。 合金层含有至少两种金属元素，其中之一可以与金属层中的金属元素相同，另一种可能与金属层中所含金属元素不同。

公开(公告)号：US09847276B2

公开(公告)日：2017-12-19

申请号：US14463645

申请日：2014-08-19

Applicant: Pil-Kyu Kang ,  Byung Lyul Park ,  SungHee Kang ,  Taeseong Kim ,  Taeyeong Kim ,  Kwangjin Moon ,  Jae-Hwa Park ,  Sukchul Bang ,  Seongmin Son ,  Jin Ho An ,  Ho-Jin Lee ,  Jeonggi Jin

Inventor： Pil-Kyu Kang ,  Byung Lyul Park ,  SungHee Kang ,  Taeseong Kim ,  Taeyeong Kim ,  Kwangjin Moon ,  Jae-Hwa Park ,  Sukchul Bang ,  Seongmin Son ,  Jin Ho An ,  Ho-Jin Lee ,  Jeonggi Jin

IPC: H01L29/40 ,  H01L23/48 ,  H01L21/768

CPC classification number: H01L23/481 ,  H01L21/7682 ,  H01L21/76831 ,  H01L21/76898 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a semiconductor substrate having a top surface and a bottom surface facing each other, an interlayer dielectric layer provided on the top surface of the semiconductor substrate and including an integrated circuit, an inter-metal dielectric layer provided on the interlayer dielectric layer and including at least one metal interconnection electrically connected to the integrated circuit, an upper dielectric layer disposed on the inter-metal dielectric layer, a through-electrode penetrating the inter-metal dielectric layer, the interlayer dielectric layer, and the semiconductor substrate, a via-dielectric layer surrounding the through-electrode and electrically insulating the through-electrode from the semiconductor substrate. The via-dielectric layer includes one or more air-gaps between the upper dielectric layer and the interlayer dielectric layer.

公开(公告)号：US09679829B2

公开(公告)日：2017-06-13

申请号：US14809159

申请日：2015-07-24

Applicant: Kwangjin Moon ,  SungHee Kang ,  Taeseong Kim ,  Byung Lyul Park ,  Yeun-Sang Park ,  Sukchul Bang

Inventor： Kwangjin Moon ,  SungHee Kang ,  Taeseong Kim ,  Byung Lyul Park ,  Yeun-Sang Park ,  Sukchul Bang

IPC: H01L21/768 ,  H01L23/48 ,  H01L23/532 ,  H01L21/306 ,  H01L25/065 ,  H01L23/31 ,  H01L23/00 ,  H01L23/498

CPC classification number: H01L23/481 ,  H01L21/30625 ,  H01L21/76873 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/53238 ,  H01L24/05 ,  H01L24/06 ,  H01L24/13 ,  H01L24/16 ,  H01L25/0657 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05548 ,  H01L2224/05567 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13023 ,  H01L2224/13024 ,  H01L2224/131 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06544 ,  H01L2225/06565 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/014 ,  H01L2224/05552

Abstract: Provided are semiconductor devices and methods of fabricating the same. The device may include a substrate including a first surface and a second surface opposing each other, a through-silicon-via (TSV) electrode provided in a via hole that may be formed to penetrate the substrate, and an integrated circuit provided adjacent to the through electrode on the first surface. The through electrode includes a metal layer filling a portion of the via hole and an alloy layer filling a remaining portion of the via hole. The alloy layer contains at least two metallic elements, one of which may be the same as that contained in the metal layer, and the other of which may be different from that contained in the metal layer.

公开(公告)号：US20080122746A1

公开(公告)日：2008-05-29

申请号：US11979831

申请日：2007-11-08

Applicant: Seungmin Kim ,  Sukjae Park ,  Inju Choi ,  Seungwon Choi ,  Seongjoon Jeong ,  Taeseong Kim

Inventor： Seungmin Kim ,  Sukjae Park ,  Inju Choi ,  Seungwon Choi ,  Seongjoon Jeong ,  Taeseong Kim

IPC: G09G3/28

CPC classification number: G09G3/2927 ,  G09G2310/066 ,  G09G2320/0238 ,  G09G2320/0242 ,  G09G2330/02 ,  G09G2360/16

Abstract: A plasma display panel device includes a logic controller for preparing a control signal of reset glow due to a load rate, the load rate being calculated from the data signal so that the received signal is converted after an image signal is received from an external source, a driver for generating a driving signal so as to vary the signal in a reset period according to the control signal of reset glow, and a display panel for displaying an image in response to the driving signal from the driver.

Abstract translation: 等离子体显示面板装置包括逻辑控制器，用于根据负载率准备复位辉光的控制信号，根据数据信号计算负载率，从而在从外部源接收图像信号之后转换接收信号， 用于产生驱动信号的驱动器，以便根据复位辉光的控制信号来改变复位周期中的信号;以及显示面板，用于响应于来自驾驶员的驱动信号显示图像。