公开(公告)号：US08466531B2

公开(公告)日：2013-06-18

申请号：US13317369

申请日：2011-10-17

申请人： Ryotaro Seo ,  Tohru Itoh ,  Yukihiko Tsukuda ,  Tomoyasu Yamada

发明人： Ryotaro Seo ,  Tohru Itoh ,  Yukihiko Tsukuda ,  Tomoyasu Yamada

IPC分类号： H01L31/0232 ,  H01L21/00

CPC分类号： H01L27/14618 ,  H01L2224/45144 ,  H01L2224/48227 ,  H01L2224/49175 ,  H04N5/2253 ,  H04N5/2254 ,  H01L2924/00

摘要： An imaging device package includes: an imaging device chip; a substrate on which the imaging device chip is mounted; a wire that electrically connects the imaging device chip and the substrate at a peripheral edge of the substrate around the imaging device chip; a supporting body that supports an optical member with respect to the substrate; and a bonding section that bonds the supporting body to the substrate while sealing the wire and a bonding terminal of the wire at the peripheral edge of the substrate.

摘要翻译： 一种成像装置包括：成像装置芯片; 其上安装有成像装置芯片的基板; 在成像器件芯片周围的基板的周边缘处电连接成像器件芯片和基板的引线; 支撑体，其相对于所述基板支撑光学构件; 以及接合部，其在将所述线密封的情况下将所述支撑体与所述基板接合，以及所述线在所述基板的周缘处的接合端子。

公开(公告)号：US07639516B2

公开(公告)日：2009-12-29

申请号：US11284986

申请日：2005-11-21

申请人： Hiroshi Usui ,  Tomoyasu Yamada ,  Masaaki Shimada

发明人： Hiroshi Usui ,  Tomoyasu Yamada ,  Masaaki Shimada

IPC分类号： H02M3/335

CPC分类号： H02M3/33507

摘要： The ON duration of an N channel MOS transistor is set based on a target voltage at a node between a resistor and a light receiving element of a photocoupler. A comparator compares the target voltage with a reference voltage at a node between a variable resistor and a resistor. A normal mode and a low frequency operation mode are switched from one to the other based on an output signal from the comparator. The resistance of the variable resistor becomes low when an input voltage from a power source is high. Even when the input voltage is high, therefore, the ON duration of the N channel MOS transistor at the transition between the normal mode and the low frequency operation mode becomes short. This reduces the switching energy in low frequency operation mode, thereby suppressing noise.

摘要翻译： 基于光电耦合器的电阻器和光接收元件之间的节点处的目标电压来设定N沟道MOS晶体管的导通时间。 比较器将目标电压与可变电阻和电阻之间的节点处的参考电压进行比较。 基于来自比较器的输出信号，正常模式和低频操作模式从一个切换到另一个。 当电源的输入电压高时，可变电阻器的电阻变低。 因此即使在输入电压高的情况下，在正常模式与低频工作模式之间的转换时，N沟道MOS晶体管的导通时间变短。 这降低了低频操作模式中的开关能量，从而抑制噪声。

公开(公告)号：US07272018B2

公开(公告)日：2007-09-18

申请号：US10538440

申请日：2003-12-09

申请人： Tomoyasu Yamada ,  Masaaki Shimada

发明人： Tomoyasu Yamada ,  Masaaki Shimada

IPC分类号： H02M3/335

CPC分类号： H02M1/4208 ,  H02M2001/0032 ,  Y02B70/126 ,  Y02B70/16 ,  Y02P80/112

摘要： By an NMOS (22) being switched on or off, a direct-current voltage E0 is charged in a capacitor (24), and a DC/DC converting circuit (30) charges a direct-current output voltage V0 to be supplied to a load L in a capacitor (34). A load state detection circuit (40) determines whether the load L is in a lightly loaded state or in a non-lightly loaded state, and outputs a signal (S40) as a determination signal. When the load state detection circuit (40) outputs a signal (S41) of “L” as a signal representing that it is a lightly loaded state, a time period setting circuit (41) outputs a signal (S41) of “L” after a preset time period elapses. A PFC on/off switching circuit (42) is supplied with the signal (S41) of “L”, and outputs a control signal (S25) of “L” to a power factor improvement circuit (20). Accordingly, in the case where the load L enters a lightly loaded state, the operation of the power factor improvement circuit (20) is stopped when the preset time elapses.

摘要翻译： 通过接通或断开的NMOS（22），在电容器（24）中充电直流电压E ，并且DC / DC转换电路（30）对直流电 输出电压V 0 <0>被提供给电容器34中的负载L. 负载状态检测电路（40）判定负载L是处于轻负载状态还是处于非轻负载状态，并输出信号（S40）作为判定信号。 当负载状态检测电路（40）输出“L”的信号（S41）作为表示轻载状态的信号时，时段设定电路（41）输出“S” “经过预设时间段。 PFC导通/截止开关电路（42）被提供有“L”的信号（S 41），并将一个“L”的控制信号（S25）输出到功率因数改善电路（20）。 因此，在负载L进入轻负载状态的情况下，当经过预设时间时，功率因数改善电路20的动作停止。

公开(公告)号：US20050151567A1

公开(公告)日：2005-07-14

申请号：US10506641

申请日：2003-03-06

申请人： Masaaki Shimada ,  Tomoyasu Yamada ,  Keiichi Sekiguchi

发明人： Masaaki Shimada ,  Tomoyasu Yamada ,  Keiichi Sekiguchi

IPC分类号： G01R19/04 ,  G01R19/165 ,  H03K5/153

CPC分类号： G01R19/16538 ,  G01R19/04

摘要： An AC voltage generated by an AC power source 1 is rectified by a full-wave rectifying circuit 2, which generates a rectified voltage. An internal regulator 33 performs waveform shaping of the rectified voltage. A comparator 42 compares the rectified voltage output from the internal regulator 33 with a reference voltage V1 and detects a period in which the rectified voltage exceeds the reference voltage V1. According to an output signal of the comparator 42, a determination signal generation circuit 50 determines the power source voltage supplied form the AC power source 1 and generates a determination signal. Accordingly, there is no need of a capacitor, etc. for detecting the peak value of the rectified voltage, and it is possible to reduce the size and cost of an AC voltage detection circuit.

摘要翻译： 由交流电源1产生的交流电压由全波整流电路2整流，产生整流电压。 内部稳压器33对整流电压进行波形整形。 比较器42将来自内部调节器33的整流电压与参考电压V 1进行比较，并检测整流电压超过参考电压V 1的周期。根据比较器42的输出信号，确定信号产生电路 50确定从AC电源1提供的电源电压并产生确定信号。 因此，不需要用于检测整流电压的峰值的电容器等，并且可以减小AC电压检测电路的尺寸和成本。

公开(公告)号：US20050018458A1

公开(公告)日：2005-01-27

申请号：US10496161

申请日：2002-11-28

申请人： Masaaki Shimada ,  Tomoyasu Yamada

发明人： Masaaki Shimada ,  Tomoyasu Yamada

IPC分类号： H02M1/00 ,  H02M1/42 ,  H02M7/00

CPC分类号： H02M1/4225 ,  H02M2001/0025 ,  Y02B70/126

摘要： A switching power supply such that the step-up ratio of when the power-factor is improved does not increase, and the conversion efficiency can be improved. In a case where the error voltage Ver outputted from a conductance amplifier (23) increases over a reference voltage Vref2, a switching signal of high level is outputted from a comparator (59) to a FET (57) to turn on the FET (57). Therefore a resistor (56) is bypassed, and as a result a reference voltage Vref1 inputted into the conductance amplifier (23) is changed from a reference voltage Vrefl-1 to Vrefl-2 of lower level. Further, since the variation of the error voltage Ver outputted from the conductance amplifier (23) decreases, the output voltage Vout also decreases.

摘要翻译： 开关电源使得功率因数提高时的升压比不增加，并且可以提高转换效率。 在从电导放大器（23）输出的误差电压Ver超过参考电压Vref2的情况下，高电平的开关信号从比较器（59）输出到FET（57）以导通FET（57） ） 因此，旁路电阻（56），结果，输入到电导放大器（23）的参考电压Vref1从较低电平的参考电压Vrefl-1变为Vrefl-2。 此外，由于从电导放大器（23）输出的误差电压Ver的变化减小，所以输出电压Vout也降低。

公开(公告)号：US5267095A

公开(公告)日：1993-11-30

申请号：US781372

申请日：1991-10-23

申请人： Tsunao Hasegawa ,  Masahiro Sui ,  Tomoyasu Yamada

发明人： Tsunao Hasegawa ,  Masahiro Sui ,  Tomoyasu Yamada

IPC分类号： G11B20/00 ,  G11B20/10 ,  H03M1/08

CPC分类号： G11B20/10527

摘要： A PCM digital audio signal playback apparatus is provided for extracting from the digital audio signal read out from a recording medium an original signal component ranging lower than 1/2 of its sampling frequency fs, producing a harmonic from the original signal component, extracting a harmonic component ranging higher than fs/2 from the harmonic, and adding the harmonic component to the original signal component. Accordingly, a high-frequency carrying signal, e.g. an impulse, is processed without causing ringings in the waveform response.

公开(公告)号：US5003411A

公开(公告)日：1991-03-26

申请号：US473027

申请日：1990-01-31

申请人： Shinichi Nagahara ,  Tomoyuki Suzuki ,  Tomoyasu Yamada ,  Tokihiro Takahashi ,  Ichiro Miyake

发明人： Shinichi Nagahara ,  Tomoyuki Suzuki ,  Tomoyasu Yamada ,  Tokihiro Takahashi ,  Ichiro Miyake

IPC分类号： G02B7/04 ,  G02B7/08 ,  G03B17/14 ,  G11B5/008 ,  G11B15/18 ,  G11B20/10 ,  G11B27/10 ,  G11B27/30 ,  H04N5/232

CPC分类号： G11B27/107 ,  G02B7/04 ,  G02B7/08 ,  G03B17/14 ,  G11B15/1875 ,  G11B20/10527 ,  G11B27/3063 ,  G11B5/0086 ,  H04N5/23209 ,  G11B2220/90 ,  G11B2220/913

摘要： A method for performing a reproduction and search operation on a data recording and reproducing device of the helical scan type which includes a pair of recording and reproducing heads mounted on a rotary drum. The method includes the steps of: (a) during the reproduction operation, transporting the tape and rotating the rotary drum such that a relative speed between said tape and the heads is either a first relative speed or a second relative speed which is less than the first relative speed; and (b) during the search operation, transporting the tape at a speed substantially greater than a tape speed used during the reproduction operation and rotating the rotary drum at a speed such that a relative speed between the tape and the heads is equal to the second lower relative speed.

摘要翻译： 一种用于对包括安装在旋转磁鼓上的一对记录和再现头的螺旋扫描型数据记录和再现装置进行再现和搜索操作的方法。 该方法包括以下步骤：（a）在再现操作期间，传送带并旋转旋转鼓，使得所述带和头之间的相对速度是第一相对速度或第二相对速度小于 第一相对速度; 和（b）在搜索操作期间，以比在再现操作期间使用的带速度大得多的速度传送带子，并以使得带和头部之间的相对速度等于第二 较低的相对速度。

公开(公告)号：US4991040A

公开(公告)日：1991-02-05

申请号：US331417

申请日：1989-03-31

申请人： Nobutoshi Fukuda ,  Tomoyasu Yamada

发明人： Nobutoshi Fukuda ,  Tomoyasu Yamada

IPC分类号： G11B15/68 ,  G11B27/00 ,  G11B27/11 ,  G11B27/13 ,  G11B27/34 ,  G11B27/36

CPC分类号： G11B15/689 ,  G11B27/002 ,  G11B27/11 ,  G11B27/34 ,  G11B2220/65 ,  G11B2220/90 ,  G11B27/13 ,  G11B27/36

摘要： A tape recorder may be provided with a memory which stores data regarding the unrecorded portion remaining on each of a plurality of recording tapes. The data may represent an amount of the unrecorded portion and/or the location thereof, e.g., in the form of a counter value. The data stored in the memory is displayed in response to an input from an operating panel, thus making it possible to readily identify a tape having a remaining time equal to or greater than the quantity of information to be recorded, and to quickly advance the tape to the beginning of its unrecorded portion.

摘要翻译： 磁带录音机可以设置有存储关于剩余在多个记录带中的每一个上的未记录部分的数据的存储器。 数据可以表示未记录部分的数量和/或其位置，例如以计数器值的形式。 响应于来自操作面板的输入显示存储在存储器中的数据，从而可以容易地识别具有等于或大于要记录的信息量的剩余时间的磁带，并且快速推进磁带 到其未记录部分的开始。

公开(公告)号：US08344501B2

公开(公告)日：2013-01-01

申请号：US12659258

申请日：2010-03-02

申请人： Noriko Shibuta ,  Tohru Terasaki ,  Tomoyasu Yamada ,  Nobuo Naito ,  Yukihiko Tsukuda ,  Ryu Nonoyama

发明人： Noriko Shibuta ,  Tohru Terasaki ,  Tomoyasu Yamada ,  Nobuo Naito ,  Yukihiko Tsukuda ,  Ryu Nonoyama

IPC分类号： H01L23/053 ,  H01L23/12 ,  H01L27/15 ,  H01L29/267 ,  H01L31/12 ,  H01L33/00 ,  H01L29/73 ,  H01L29/74 ,  H01L31/111 ,  H01L31/0203 ,  H01L31/00 ,  H01L29/40

摘要： A multilayer wiring substrate has a through hole that passes from a first surface through to a second surface. The multilayer wiring substrate includes an electrical connection terminal formed in at least one of an inner edge portion which is a periphery of the through hole, an outer edge portion which is an outer periphery of the substrate, and a non-edge portion, on at least one of the first surface and the second surface. The electrical connection terminal has a castellation structure that does not pass through to a surface opposite to a formation surface.

公开(公告)号：US08259453B2

公开(公告)日：2012-09-04

申请号：US12964821

申请日：2010-12-10

申请人： Kaori Morita ,  Tomoyasu Yamada ,  Tamotsu Kiyakawauchi ,  Akitomi Katsumura ,  Koji Shiozawa

发明人： Kaori Morita ,  Tomoyasu Yamada ,  Tamotsu Kiyakawauchi ,  Akitomi Katsumura ,  Koji Shiozawa

IPC分类号： H05K7/02

CPC分类号： G06K19/07743

摘要： Disclosed herein is a card device including a semiconductor package section having memory functions and a substrate section joined to the semiconductor package section by superposition and mounted by a variety of electronic components. The semiconductor package section includes a card-side connector section having card-side terminals for inputting and outputting information signals, and package-side terminals at a location at which the semiconductor package section is joined to the substrate section by superposition. The substrate section includes substrate-side terminals at a location at which the substrate section is connected to the semiconductor package section by superposition. The substrate section is electrically joined to the semiconductor package section by making use of the package-side terminals and the substrate-side terminals. The superposition junction between the semiconductor package section and the substrate section is provided with such an offset that the card-side connector protrudes out off the card device.

摘要翻译： 本文公开了一种卡装置，其包括具有存储功能的半导体封装部分和通过叠加并通过各种电子部件安装而连接到半导体封装部分的基板部分。 半导体封装部分包括具有用于输入和输出信息信号的卡侧端子的卡侧连接器部分和在半导体封装部分通过叠加与基板部分接合的位置处的封装侧端子。 基板部分包括在基板部分通过叠加连接到半导体封装部分的位置处的基板侧端子。 通过使用封装侧端子和基板侧端子将基板部电连接到半导体封装部。 半导体封装部和基板部之间的叠合接合部设置有使卡侧连接器从卡装置突出的偏移。