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    III nitride electronic device and III nitride semiconductor epitaxial substrate
    1.
    发明授权
    III nitride electronic device and III nitride semiconductor epitaxial substrate 有权
    III族氮化物电子器件和III族氮化物半导体外延衬底

    公开(公告)号：US08541816B2

    公开(公告)日：2013-09-24

    申请号：US12740770

    申请日：2008-10-28

    Applicant: Shin Hashimoto ,  Tatsuya Tanabe

    Inventor： Shin Hashimoto ,  Tatsuya Tanabe

    IPC: H01L21/338

    CPC classification number: H01L29/205 ,  H01L21/02378 ,  H01L21/02389 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/7787 ,  H01L29/872

    Abstract: In a group III nitride hetero junction transistor 11a, a second AlY1InY2Ga1-Y1-Y2N layer 15 forms a hetero junction 21 with a first AlX1InX2Ga1-X1-X2N layer 13a. A first electrode 17 forms a Schottky junction with the first AlX1InX2Ga1-X1-X2N layer 13a. The first AlX1InX2Ga1-X1-X2N layer 13a and the second AlY1InY2Ga1-Y1-Y2N layer 15 are provided over a substrate 23. The electrodes 17a, 18a, and 19a include a source electrode, a gate electrode, and a drain electrode, respectively. The carbon concentration NC13 in the first AlX1InX2Ga1-X1-X2N layer 13a is less than 1×1017 cm−3. The dislocation density D in the second AlY1InY2Ga1-Y1-Y2N layer 15 is 1×108 cm−2. The hetero junction 21 generates a two-dimensional electron gas layer 25. These provide a low-loss gallium nitride based electronic device.

    Abstract translation: 在III族氮化物异质结晶体管11a中，第二AlY1InY2Ga1-Y1-Y2N层15与第一AlX1InX2Ga1-X1-X2N层13a形成异质结21。 第一电极17与第一AlX1InX2Ga1-X1-X2N层13a形成肖特基结。 第一AlX1InX2Ga1-X1-X2N层13a和第二AlY1InY2Ga1-Y1-Y2N层15设置在衬底23上。电极17a，18a和19a分别包括源电极，栅极电极和漏电极。 第一AlX1InX2Ga1-X1-X2N层13a中的碳浓度NC13小于1×1017cm-3。 第二AlY1InY2Ga1-Y1-Y2N层15中的位错密度D为1×108cm-2。 异质结21产生二维电子气体层25.这些提供了一种低损耗氮化镓基电子器件。

    Vertical Gallium Nitride Semiconductor Device and Epitaxial Substrate
    2.
    发明申请
    Vertical Gallium Nitride Semiconductor Device and Epitaxial Substrate 有权
    立式氮化镓半导体器件和外延衬底

    公开(公告)号：US20090194796A1

    公开(公告)日：2009-08-06

    申请号：US11569798

    申请日：2006-03-01

    Applicant: Shin Hashimoto ,  Makoto Kiyama ,  Tatsuya Tanabe ,  Kouhei Miura ,  Takashi Sakurada

    Inventor： Shin Hashimoto ,  Makoto Kiyama ,  Tatsuya Tanabe ,  Kouhei Miura ,  Takashi Sakurada

    IPC: H01L29/812 ,  H01L29/78 ,  H01L29/207

    CPC classification number: H01L29/7802 ,  H01L29/0878 ,  H01L29/2003 ,  H01L29/8611 ,  H01L29/872

    Abstract: Affords epitaxial substrates for vertical gallium nitride semiconductor devices that have a structure in which a gallium nitride film of n-type having a desired low carrier concentration can be provided on a gallium nitride substrate of n type. A gallium nitride epitaxial film (65) is provided on a gallium nitride substrate (63). A layer region (67) is provided in the gallium nitride substrate (63) and the gallium nitride epitaxial film (65). An interface between the gallium nitride substrate (43) and the gallium nitride epitaxial film (65) is positioned in the layer region (67). In the layer region (67), a peak value of donor impurity along an axis from the gallium nitride substrate (63) to the gallium nitride epitaxial film (65) is 1×1018 cm−3 or more. The donor impurity is at least either silicon or germanium.

    Abstract translation: 提供具有其中可以在n型氮化镓衬底上提供具有期望的低载流子浓度的n型氮化镓膜的结构的垂直氮化镓半导体器件的外延衬底。 氮化镓外延膜（65）设置在氮化镓衬底（63）上。 在氮化镓衬底（63）和氮化镓外延膜（65）中设置一个层区（67）。 氮化镓衬底（43）和氮化镓外延膜（65）之间的界面位于层区（67）中。 在层区域（67）中，施主杂质沿着氮化镓衬底（63）到氮化镓外延膜（65）的轴的峰值为1×10 18 cm -3以上。 供体杂质至少是硅或锗。

    Group III Nitride Semiconductor Device and Epitaxial Substrate
    4.
    发明申请
    Group III Nitride Semiconductor Device and Epitaxial Substrate 有权
    第III族氮化物半导体器件和外延衬底

    公开(公告)号：US20090189186A1

    公开(公告)日：2009-07-30

    申请号：US11569500

    申请日：2006-03-06

    Applicant: Tatsuya Tanabe ,  Kouhei Miura ,  Makoto Kiyama ,  Takashi Sakurada

    Inventor： Tatsuya Tanabe ,  Kouhei Miura ,  Makoto Kiyama ,  Takashi Sakurada

    IPC: H01L29/812 ,  H01L29/205

    CPC classification number: H01L29/7787 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/0254 ,  H01L29/2003

    Abstract: Affords Group III nitride semiconductor devices in which the leakage current from the Schottky electrode can be reduced. In a high electron mobility transistor 11, a supporting substrate 13 is composed of AlN, AlGaN, or GaN, specifically. An AlYGa1−YN epitaxial layer 15 has a full-width-at-half maximum of (0002) plane XRD of 150 sec or less. A GaN epitaxial layer 17 is provided between the gallium nitride supporting substrate and the AlYGa1−YN epitaxial layer (O

    Abstract translation: 提供可以减少来自肖特基电极的漏电流的III族氮化物半导体器件。 在高电子迁移率晶体管11中，支撑衬底13具体地由AlN，AlGaN或GaN构成。 AlYGa1-YN外延层15具有150秒或更小的（0002）面XRD的全宽度的最大值。 在氮化镓支撑衬底和AlYGa1-YN外延层之间设置GaN外延层17（O

    Group III Nitride Semiconductor Device and Epitaxial Substrate
    8.
    发明申请
    Group III Nitride Semiconductor Device and Epitaxial Substrate 审中-公开
    第III族氮化物半导体器件和外延衬底

    公开(公告)号：US20080265258A1

    公开(公告)日：2008-10-30

    申请号：US11569066

    申请日：2006-03-03

    Applicant: Tatsuya Tanabe ,  Makoto Kiyama ,  Kouhei Miura ,  Takashi Sakurada

    Inventor： Tatsuya Tanabe ,  Makoto Kiyama ,  Kouhei Miura ,  Takashi Sakurada

    IPC: H01L29/205 ,  H01L29/778

    CPC classification number: H01L29/66462 ,  H01L21/02389 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02587 ,  H01L29/7787

    Abstract: Affords Group III nitride semiconductor devices in which the leakage current from the Schottky electrode can be decreased. In a high electron mobility transistor 1, a supporting substrate 3 is composed of AlN, AlGaN, or GaN. An AlyGa1-yN epitaxial layer 5 has a surface roughness (RMS) of 0.25 mm or less, wherein the surface roughness is defined by a square area measuring 1 μm per side. A GaN epitaxial layer 7 is provided between the AlyGa1-yN supporting substrate 3 and the AlyGa1-yN epitaxial layer 5. A Schottky electrode 9 is provided on the AlyGa1-yN epitaxial layer 5. A first ohmic electrode 11 is provided on the AlyGa1-yN epitaxial layer 5. A second ohmic electrode 13 is provided on the AlyGa1-yN epitaxial layer 5. One of the first and second ohmic electrodes 11 and 13 constitutes a source electrode, and the other constitutes a drain electrode. The Schottky electrode 9 constitutes a gate electrode of the high electron mobility transistor 1.

    Abstract translation: 提供可以减少来自肖特基电极的漏电流的III族氮化物半导体器件。 在高电子迁移率晶体管1中，支撑基板3由AlN，AlGaN或GaN构成。 Al钇1-y N外延层5具有0.25mm或更小的表面粗糙度（RMS），其中表面粗糙度由测量1的正方形面积 妈妈每边。 在AlGaN外延层7之间设置有支撑衬底3的Al 1 Y y-N支撑衬底和Al 1 Al- 在N外延层5上设置肖特基电极9.设置第一欧姆电极11和第一欧姆电极11。 在Al钇1-y N外延层5上。第二欧姆电极13设置在Al钇1 Ga -Y / N外延层5.第一和第二欧姆电极11和13中的一个构成源电极，另一个构成漏电极。 肖特基电极9构成高电子迁移率晶体管1的栅电极。

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