公开(公告)号：US07508077B2

公开(公告)日：2009-03-24

申请号：US11171282

申请日：2005-07-01

Applicant: Mitsuru Watanabe ,  Tetsuya Fukui

Inventor： Mitsuru Watanabe ,  Tetsuya Fukui

IPC: H01L23/52 ,  H01L23/48 ,  H01L29/40

CPC classification number: H01L24/34 ,  H01L23/49562 ,  H01L24/37 ,  H01L2224/32245 ,  H01L2224/37599 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12032 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099

Abstract: A semiconductor device comprises: a semiconductor chip; a first frame; a solder layer which bonds the solder bonding metal layer of the semiconductor chip and the first frame; and a second frame bonded to the rear face of the semiconductor chip. The semiconductor chip includes: a semiconductor substrate; a first metal layer provided on a major surface of the semiconductor substrate and forming a Schottky junction with the semiconductor substrate; a second metal layer provided on the first metal layer and primarily composed of aluminum; a third metal layer provided on the second metal layer and primarily composed of molybdenum or titanium; and a solder bonding metal layer provided on the third metal layer and including at least a fourth metal layer which is primarily composed of nickel, ion or cobalt.

Abstract translation: 半导体器件包括：半导体芯片; 第一帧; 焊接层，其结合半导体芯片的焊料接合金属层和第一框架; 以及结合到半导体芯片的背面的第二框架。 半导体芯片包括：半导体衬底; 设置在所述半导体衬底的主表面上并与所述半导体衬底形成肖特基结的第一金属层; 设置在第一金属层上并主要由铝构成的第二金属层; 设置在第二金属层上并主要由钼或钛构成的第三金属层; 以及设置在所述第三金属层上并且包括主要由镍，离子或钴组成的至少第四金属层的焊料接合金属层。

公开(公告)号：US07391093B2

公开(公告)日：2008-06-24

申请号：US11099454

申请日：2005-04-06

Applicant: Mitsuru Watanabe ,  Tetsuya Fukui

Inventor： Mitsuru Watanabe ,  Tetsuya Fukui

IPC: H01L27/095

CPC classification number: H01L29/8611 ,  H01L23/488 ,  H01L23/49562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/33 ,  H01L24/48 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/402 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05556 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/26145 ,  H01L2224/27013 ,  H01L2224/291 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/48095 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device has a semiconductor device chip with upper and lower terminal electrodes, and upper and lower frames bonded to the upper and lower terminal electrodes, respectively, with solder material, wherein the semiconductor device chip includes: a semiconductor layer of a first conductivity type; a diffusion layer of a second conductivity type, which is selectively formed in the semiconductor layer; a plurality of guard-ring layers of the second conductivity type, which are formed outside of the diffusion layer in the semiconductor layer; an insulating film formed on the semiconductor layer; and a field plate formed of a poly-crystalline silicon film embedded in the insulating film.

Abstract translation: 半导体器件具有具有上端子电极和下端子电极的半导体器件芯片，并且上下框架分别与焊接材料接合到上端子电极和下端子电极，其中半导体器件芯片包括：第一导电类型的半导体层 ; 第二导电类型的扩散层，其被选择性地形成在半导体层中; 多个第二导电类型的保护环层，形成在半导体层中的扩散层的外部; 形成在所述半导体层上的绝缘膜; 以及由嵌入绝缘膜中的多晶硅膜形成的场板。

公开(公告)号：US20110207263A1

公开(公告)日：2011-08-25

申请号：US13101454

申请日：2011-05-05

Applicant: Mitsuru WATANABE ,  Tetsuya FUKUI

Inventor： Mitsuru WATANABE ,  Tetsuya FUKUI

IPC: H01L21/78

CPC classification number: H01L24/34 ,  H01L23/49562 ,  H01L24/37 ,  H01L2224/32245 ,  H01L2224/37599 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12032 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099

Abstract: The present invention relates to a method of manufacturing a semiconductor device including (1) forming a laminated structure on a major surface of a semiconductor substrate, the laminated structure comprising at least a first metal layer that forms a Schottky junction with the semiconductor substrate, a second metal layer primarily composed of aluminum, and a third metal layer primarily composed of molybdenum or titanium, (2) patterning the laminated structure into a predetermined configuration, (3) forming a solder bonding metal layer comprising at least nickel, ion or cobalt on the major surface of the semiconductor substrate having the patterned laminated structure formed thereon, (4) patterning the solder bonding metal layer into a pattern configuration identical to that of the laminated structure, (5) cutting the semiconductor substrate on which the laminated structure and the solder bonding metal layer are patterned to form a plurality of semiconductor chips, and (6) bonding the semiconductor chip to a first frame using at least one solder layer formed on the solder bonding metal layer on the major surface of the semiconductor substrate, and bonding a rear face of the semiconductor chip to a second frame.

Abstract translation: 本发明涉及一种制造半导体器件的方法，该半导体器件包括：（1）在半导体衬底的主表面上形成叠层结构，所述层压结构至少包括与半导体衬底形成肖特基结的第一金属层， 主要由铝构成的第二金属层和主要由钼或钛构成的第三金属层，（2）将层压结构图案化为规定的构造，（3）形成至少包含镍，离子或钴的焊料接合金属层， （4）将焊料接合金属层图案化为与层叠结构相同的图案构造，（5）切割其上层叠结构和层叠结构的半导体基板，其中， 图案化焊接金属层以形成多个半导体芯片，（6）将焊接接合金属层接合 使用在所述半导体衬底的主表面上的所述焊料接合金属层上形成的至少一个焊料层，将所述半导体芯片的后表面接合到第二框架的第一框架。

公开(公告)号：US20060131685A1

公开(公告)日：2006-06-22

申请号：US11099454

申请日：2005-04-06

Applicant: Mitsuru Watanabe ,  Tetsuya Fukui

Inventor： Mitsuru Watanabe ,  Tetsuya Fukui

IPC: H01L29/47 ,  H01L21/28

CPC classification number: H01L29/8611 ,  H01L23/488 ,  H01L23/49562 ,  H01L24/03 ,  H01L24/05 ,  H01L24/33 ,  H01L24/48 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/402 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05552 ,  H01L2224/05556 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/26145 ,  H01L2224/27013 ,  H01L2224/291 ,  H01L2224/32245 ,  H01L2224/33181 ,  H01L2224/48095 ,  H01L2224/48463 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/12036 ,  H01L2924/12041 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/3011 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A semiconductor device has a semiconductor device chip with upper and lower terminal electrodes, and upper and lower frames bonded to the upper and lower terminal electrodes, respectively, with solder material, wherein the semiconductor device chip includes: a semiconductor layer of a first conductivity type; a diffusion layer of a second conductivity type, which is selectively formed in the semiconductor layer; a plurality of guard-ring layers of the second conductivity type, which are formed outside of the diffusion layer in the semiconductor layer; an insulating film formed on the semiconductor layer; and a field plate formed of a poly-crystalline silicon film embedded in the insulating film.

Abstract translation: 半导体器件具有具有上端子电极和下端子电极的半导体器件芯片，并且上下框架分别与焊接材料接合到上端子电极和下端子电极，其中半导体器件芯片包括：第一导电类型的半导体层 ; 第二导电类型的扩散层，其被选择性地形成在半导体层中; 多个第二导电类型的保护环层，形成在半导体层中的扩散层的外部; 形成在半导体层上的绝缘膜; 以及由嵌入绝缘膜中的多晶硅膜形成的场板。

公开(公告)号：US20060006506A1

公开(公告)日：2006-01-12

申请号：US11171282

申请日：2005-07-01

Applicant: Mitsuru Watanabe ,  Tetsuya Fukui

Inventor： Mitsuru Watanabe ,  Tetsuya Fukui

IPC: H01L23/495

CPC classification number: H01L24/34 ,  H01L23/49562 ,  H01L24/37 ,  H01L2224/32245 ,  H01L2224/37599 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12032 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099

Abstract: A semiconductor device comprises: a semiconductor chip; a first frame; a solder layer which bonds the solder bonding metal layer of the semiconductor chip and the first frame; and a second frame bonded to the rear face of the semiconductor chip. The semiconductor chip includes: a semiconductor substrate; a first metal layer provided on a major surface of the semiconductor substrate and forming a Schottky junction with the semiconductor substrate; a second metal layer provided on the first metal layer and primarily composed of aluminum; a third metal layer provided on the second metal layer and primarily composed of molybdenum or titanium; and a solder bonding metal layer provided on the third metal layer and including at least a forth metal layer which is primarily composed of nickel, ion or cobalt.

Abstract translation: 半导体器件包括：半导体芯片; 第一帧; 焊接层，其结合半导体芯片的焊料接合金属层和第一框架; 以及结合到半导体芯片的背面的第二框架。 半导体芯片包括：半导体衬底; 设置在所述半导体衬底的主表面上并与所述半导体衬底形成肖特基结的第一金属层; 设置在第一金属层上并主要由铝构成的第二金属层; 设置在第二金属层上并主要由钼或钛构成的第三金属层; 以及设置在所述第三金属层上并且包括主要由镍，离子或钴组成的至少第四金属层的焊料接合金属层。

公开(公告)号：US07964939B2

公开(公告)日：2011-06-21

申请号：US12125955

申请日：2008-05-23

Applicant: Mitsuru Watanabe ,  Tetsuya Fukui

Inventor： Mitsuru Watanabe ,  Tetsuya Fukui

IPC: H01L23/495

CPC classification number: H01L24/34 ,  H01L23/49562 ,  H01L24/37 ,  H01L2224/32245 ,  H01L2224/37599 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12032 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099

Abstract: A semiconductor device comprises: a semiconductor chip; a first frame; a solder layer which bonds the solder bonding metal layer of the semiconductor chip and the first frame; and a second frame bonded to the rear face of the semiconductor chip. The semiconductor chip includes: a semiconductor substrate; a first metal layer provided on a major surface of the semiconductor substrate and forming a Schottky junction with the semiconductor substrate; a second metal layer provided on the first metal layer and primarily composed of aluminum; a third metal layer provided on the second metal layer and primarily composed of molybdenum or titanium; and a solder bonding metal layer provided on the third metal layer and including at least a fourth metal layer which is primarily composed of nickel, iron or cobalt.

Abstract translation: 半导体器件包括：半导体芯片; 第一帧; 焊接层，其结合半导体芯片的焊料接合金属层和第一框架; 以及结合到半导体芯片的背面的第二框架。 半导体芯片包括：半导体衬底; 设置在所述半导体衬底的主表面上并与所述半导体衬底形成肖特基结的第一金属层; 设置在第一金属层上并主要由铝构成的第二金属层; 设置在第二金属层上并主要由钼或钛构成的第三金属层; 以及设置在所述第三金属层上并且包括主要由镍，铁或钴组成的至少第四金属层的焊料接合金属层。

公开(公告)号：US20080224281A1

公开(公告)日：2008-09-18

申请号：US12125955

申请日：2008-05-23

Applicant: Mitsuru WATANABE ,  Tetsuya Fukui

Inventor： Mitsuru WATANABE ,  Tetsuya Fukui

IPC: H01L23/495 ,  H01L21/60

CPC classification number: H01L24/34 ,  H01L23/49562 ,  H01L24/37 ,  H01L2224/32245 ,  H01L2224/37599 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01033 ,  H01L2924/01042 ,  H01L2924/01047 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/12032 ,  H01L2924/12035 ,  H01L2924/12036 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/37099

Abstract: A semiconductor device comprises: a semiconductor chip; a first frame; a solder layer which bonds the solder bonding metal layer of the semiconductor chip and the first frame; and a second frame bonded to the rear face of the semiconductor chip. The semiconductor chip includes: a semiconductor substrate; a first metal layer provided on a major surface of the semiconductor substrate and forming a Schottky junction with the semiconductor substrate; a second metal layer provided on the first metal layer and primarily composed of aluminum; a third metal layer provided on the second metal layer and primarily composed of molybdenum or titanium; and a solder bonding metal layer provided on the third metal layer and including at least a forth metal layer which is primarily composed of nickel, ion or cobalt.

Abstract translation: 半导体器件包括：半导体芯片; 第一帧; 焊接层，其结合半导体芯片的焊料接合金属层和第一框架; 以及结合到半导体芯片的背面的第二框架。 半导体芯片包括：半导体衬底; 设置在所述半导体衬底的主表面上并与所述半导体衬底形成肖特基结的第一金属层; 设置在第一金属层上并主要由铝构成的第二金属层; 设置在第二金属层上并主要由钼或钛构成的第三金属层; 以及设置在所述第三金属层上并且包括主要由镍，离子或钴组成的至少第四金属层的焊料接合金属层。