Loading and ejecting mechanism for a magnetic tape cassette apparatus
    2.
    发明授权
    Loading and ejecting mechanism for a magnetic tape cassette apparatus 失效
    磁带盒装置的装载和排出机构

    公开(公告)号:US4701817A

    公开(公告)日:1987-10-20

    申请号:US658293

    申请日:1984-10-05

    申请人: Yasuhiro Uemura

    发明人: Yasuhiro Uemura

    CPC分类号: G11B15/67513

    摘要: An apparatus suitable for digital data transfer with a tape cassette is designed to require no movement of a magnetic transducer head to establish data transfer contact between the head and a tape cassette. The tape cassette is inserted in the apparatus in the direction of a notional line intersecting at right angles the axes of rotation of the pair of hubs of the tape cassette. Upon full insertion in the apparatus the tape cassette has its apertured front side held opposite the transducer head. A cassette shift mechanism subsequently transports the loaded tape cassette in a direction normal to the notional line, into data transfer contact with the transducer head. A tape transport shift mechanism also operates to move a pair of motor driven spindles into driving engagement with the respective hubs of the tape cassette. The insertion of the tape cassette automatically triggers the operation of both cassette shift mechanism and tape transport shift mechanism. A preferred embodiment additionally comprises an ejector mechanism including a pushbutton. Upon activation of this ejector pushbutton the tape transport shift mechanism moves the drive spindles out of engagement with the cassette hubs, and the cassette shift mechanism retracts the cassette away from the transducer head and further ejects the cassette from the apparatus.

    摘要翻译: 适用于带盒的数字数据传输的装置被设计成不需要磁性传感器头的移动,以在磁头和磁带盒之间建立数据传送接触。 磁带盒沿着与磁带盒的一对轮毂的旋转轴线成直角相交的概念线的方向插入设备中。 当磁带盒完全插入设备中时,磁带盒的开孔前侧保持与换能器头相对。 盒式换档机构随后将装载的盒式磁带沿垂直于图形线的方向传送到与换能器头部的数据传送接触。 磁带传送换档机构还操作以将一对电动机驱动的主轴移动成与磁带盒的各个毂的驱动接合。 磁带盒的插入自动触发盒式换档机构和磁带传送换档机构的操作。 优选实施例还包括包括按钮的喷射器机构。 在启动该喷射器按钮时,带传送换档机构将驱动主轴移动离开与盒毂的接合,并且盒的换档机构使盒远离换能器头退回并进一步从装置中弹出盒。

    Clock generating method and clock generating circuit
    4.
    发明授权
    Clock generating method and clock generating circuit 失效
    时钟产生方法和时钟发生电路

    公开(公告)号:US07580443B2

    公开(公告)日:2009-08-25

    申请号:US11331154

    申请日:2006-01-13

    IPC分类号: H04B1/69

    摘要: In a clock generating circuit, while a PLL (Phase-Locked Loop) circuit and a modulator are employed, when a frequency dividing ratio of a feedback-purpose frequency divider in the PLL circuit is changed in accordance with modulation data produced based upon a modulation profile of the modulator to perform a frequency modulation so as to spread a spectrum, a turning point of the modulation profile is moved so as to disperse a degree of frequency, so that the spread spectrum is re-spread. Also, a clock generating circuit is constituted by a PLL circuit and a modulator, a multiple modulation profile generating circuit is provided in the modulator, and a turning point of a modulation profile is moved so as to disperse a degree of frequency, so that a spread spectrum is re-spread.

    摘要翻译: 在时钟发生电路中,当使用PLL(锁相环)电路和调制器时,当PLL电路中的反馈用分频器的分频比根据调制产生的调制数据而改变时 调制器的轮廓以执行频率调制以扩展频谱,调制分布的转折点被移动以便分散频率,从而扩展频谱。 此外,时钟发生电路由PLL电路和调制器构成,在调制器中提供多调制分布生成电路,并且调制曲线的转折点被移动以分散频率,使得 扩频被重新传播。

    Packaging method of BGA type electronic component
    6.
    发明授权
    Packaging method of BGA type electronic component 失效
    BGA型电子元器件的封装方法

    公开(公告)号:US5722160A

    公开(公告)日:1998-03-03

    申请号:US547811

    申请日:1995-10-25

    IPC分类号: H05K1/11 H05K3/34 H05K3/42

    摘要: A packaging method of an electronic component for packaging the electronic component to a packaging substrate comprises the steps of: forming a predetermined quantity of solder bumps at connection portions of the electronic component; forming through-holes and pads on the packaging substrate in such a manner as to correspond to the solder bumps; applying a solder paste to pad portions of the through-holes and the pads formed on the surface of the packaging substrate in such a manner as to attain a specific quantity of solder components with the predetermined quantity of the solder bump; and heating the electronic component and the packaging substrate to a predetermined temperature such that button-shaped connection bumps having a predetermined height are formed between the pads and the packaging substrate so as to connect the electronic component and the packaging substrate and to keep a predetermined gap between the electronic component and the packaging substrate, and cylindrical-post connection bumps are formed between the through-holes and the packaging substrate in accordance with this predetermined gap so as to connect the electronic component and the packaging substrate. In this way, the cylindrical-post connection bumps are formed in association with the button-shaped connection bumps.

    摘要翻译: 用于将电子部件封装到封装基板的电子部件的封装方法包括以下步骤:在电子部件的连接部形成规定量的焊料凸块; 以与所述焊料凸块相对应的方式在所述封装基板上形成通孔和焊盘; 以形成在所述封装基板的表面上的所述通孔和所述焊盘的焊盘部分的方式施加焊膏,以达到预定量的所述焊料凸块的特定量的焊料成分; 并且将电子部件和包装基板加热到预定温度,使得在焊盘和封装基板之间形成具有预定高度的按钮形连接凸块,以便连接电子部件和封装基板并保持预定的间隙 在电子部件和包装基板之间,并且根据该预定间隙在通孔和封装基板之间形成圆柱形连接凸起,以连接电子部件和封装基板。 以这种方式,圆柱形连接凸块与按钮形连接凸块相关联地形成。

    Logic emulation module and logic emulation board
    7.
    发明授权
    Logic emulation module and logic emulation board 有权
    逻辑仿真模块和逻辑仿真板

    公开(公告)号:US06829574B1

    公开(公告)日:2004-12-07

    申请号:US09328800

    申请日:1999-06-09

    IPC分类号: G06F9455

    摘要: Disclosed herein is an improved logic module used for logic emulation along with an enhanced logic emulation board subject to logic verification. The logic module has a plurality of programmable LSIs capable of programming logic and a plurality of switching LSIs capable of programming connections, the LSIs being mounted on one or both sides of a board. Peripheral portions of the board carry connectors for electrical connection to the outside. There are two types of data lines: those directly coupling the connectors to the programmable LSIs, and those linking the connectors to the programmable LSIs via the switching LSIs. The programmable and switching LSIs constitute a crossbar connection arrangement. The logic emulation board has connectors for connection to a logic emulation module, and lands for supporting LSIs targeted for development. Pins of the connectors and the lands are interconnected on a one-to-one basis. Also disclosed here is an upgraded module structure permitting a multiple-stage module setup together with an advanced cooling structure for modules.

    摘要翻译: 这里公开了一种用于逻辑仿真的改进的逻辑模块以及经过逻辑验证的增强型逻辑仿真板。 逻辑模块具有能够编程逻辑的多个可编程LSI和能够编程连接的多个开关LSI,LSI安装在板的一侧或两侧。 板的外围部分携带用于与外部电连接的连接器。 有两种类型的数据线:将连接器直接耦合到可编程LSI的数据线,以及通过开关LSI将连接器连接到可编程LSI的那些。 可编程和开关式LSI构成了一种交叉连接装置。 逻辑仿真板具有用于连接到逻辑仿真模块的连接器,并且用于支持用于开发的LSI的接地。 连接器和焊盘的引脚是以一对一的方式相互连接的。 这里还公开了一种升级的模块结构,允许多级模块与模块的先进冷却结构一起设置。