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    3D semiconductor package with die-mounted voltage regulator
    4.
    发明授权
    3D semiconductor package with die-mounted voltage regulator 有权

    公开(公告)号：US12165981B2

    公开(公告)日：2024-12-10

    申请号：US17556346

    申请日：2021-12-20

    Applicant: ADVANCED MICRO DEVICES, INC.

    Inventor： Gabriel H Loh ,  Raja Swaminathan ,  Rahul Agarwal ,  Brett P. Wilkerson

    IPC: H01L23/538 ,  G05F1/575 ,  H01L25/065 ,  H01L27/06

    Abstract: A semiconductor package includes a package substrate having a first surface and an opposing second surface, and further includes an integrated circuit (IC) die disposed at the second surface and having a third surface facing the second surface and an opposing fourth surface. The IC die has a first region comprising one or more metal layers and circuit components for one or more functions of the IC die and a second region offset from the first region in a direction parallel with the third and fourth surfaces. The semiconductor package further includes a voltage regulator disposed at the fourth surface in the second region and having an input configured to receive a supply voltage and an output configured to provide a regulated voltage, and also includes a conductive path coupling the output of the voltage regulator to a voltage input of circuitry of the IC die.

    Fanout module integrating a photonic integrated circuit
    7.
    发明授权
    Fanout module integrating a photonic integrated circuit 有权

    公开(公告)号：US11709327B2

    公开(公告)日：2023-07-25

    申请号：US17361033

    申请日：2021-06-28

    Applicant: ADVANCED MICRO DEVICES, INC.

    Inventor： Brett P. Wilkerson ,  Raja Swaminathan ,  Kong Toon Ng ,  Rahul Agarwal

    IPC: G02B6/42 ,  G02B6/43

    CPC classification number: G02B6/4274 ,  G02B6/425 ,  G02B6/4255 ,  G02B6/43

    Abstract: A semiconductor package includes a first mold layer at least partially encasing at least one photonic integrated circuit. A redistribution layer structure is fabricated on the first mold layer, the redistribution layer structure including dielectric material and conductive structures. A second mold layer at least partially encasing at least one semiconductor chip is fabricated on the redistribution layer structure. The redistribution layer structure provides electrical pathways between the at least one semiconductor chip and the at least one photonic integrated circuit. One or more voids are defined in the second mold layer in an area above an optical interface of the at least one photonic integrated circuit such that light is transmittable through dielectric material above the optical interface.

    SEMICONDUCTOR DEVICE WITH AN EMBEDDED ACTIVE DEVICE
    8.
    发明公开
    SEMICONDUCTOR DEVICE WITH AN EMBEDDED ACTIVE DEVICE 审中-公开

    公开(公告)号：US20230207544A1

    公开(公告)日：2023-06-29

    申请号：US17560691

    申请日：2021-12-23

    Applicant: Advanced Micro Devices, Inc.

    Inventor： Gabriel H. Loh ,  Rahul Agarwal ,  Raja Swaminathan ,  Brett P. Wilkerson

    IPC: H01L25/18 ,  H01L23/00 ,  H01L25/00 ,  H01L21/768

    CPC classification number: H01L25/18 ,  H01L24/16 ,  H01L25/50 ,  H01L21/76898 ,  H01L2224/16145 ,  H01L2224/16225

    Abstract: A semiconductor device includes one or more active devices disposed between a processor die and a package substrate. The semiconductor device includes a first layer with a processor die, a second layer with one or more active devices, and a third layer with a package substrate, where the second layer is disposed between the first and third layers. The one or more active devices are semiconductor-based devices, such as voltage regulators, that participate in supplying power to the processor die and are electrically connected to the processor die using various connection configurations. The implementations use short path lengths for improved performance with a compact structure that avoids the use of edge wiring or interposers without occupying processor die space. Implementations include the use of through-silicon vias (TSVs) to provide short path lengths while reducing the number of connection resources used by the one or more power components.

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