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公开(公告)号：US11874791B2
公开(公告)日：2024-01-16
申请号：US17589715
申请日：2022-01-31
Applicant: Analog Devices, Inc.
Inventor： Martin Kessler , Miguel A. Chavez , Lewis F. Lahr , William Hooper , Robert Adams , Peter Sealey
IPC: G06F13/42 , G05B19/418 , G06F1/26 , H04B3/54 , G05B19/042 , H04L12/403 , G06F13/364 , H04R29/00
CPC classification number: G06F13/426 , G05B19/0421 , G05B19/0423 , G05B19/4185 , G06F1/26 , G06F1/266 , G06F13/364 , G06F13/4282 , G06F13/4291 , G06F13/4295 , H04B3/542 , H04B3/548 , H04L12/4035 , H04B2203/547 , H04R29/007 , Y02D10/00
Abstract: Disclosed herein are two-wire communication systems and applications thereof. In some embodiments, a slave node transceiver for low latency communication may include upstream transceiver circuitry to receive a first signal transmitted over a two-wire bus from an upstream device and to provide a second signal over the two-wire bus to the upstream device; downstream transceiver circuitry to provide a third signal downstream over the two-wire bus toward a downstream device and to receive a fourth signal over the two-wire bus from the downstream device; and clock circuitry to generate a clock signal at the slave node transceiver based on a preamble of a synchronization control frame in the first signal, wherein timing of the receipt and provision of signals over the two-wire bus by the node transceiver is based on the clock signal.
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公开(公告)号：US20200257646A1
公开(公告)日：2020-08-13
申请号：US16859611
申请日：2020-04-27
Applicant: Analog Devices, Inc.
Inventor： Martin KESSLER , Miguel A. CHAVEZ , Lewis F. LAHR , William HOOPER , Robert Adams , Peter SEALEY
IPC: G06F13/42 , G06F13/364 , H04L12/403 , H04B3/54 , G06F1/26 , G05B19/042 , G05B19/418
Abstract: Disclosed herein are two-wire communication systems and applications thereof. In some embodiments, a slave node transceiver for low latency communication may include upstream transceiver circuitry to receive a first signal transmitted over a two-wire bus from an upstream device and to provide a second signal over the two-wire bus to the upstream device; downstream transceiver circuitry to provide a third signal downstream over the two-wire bus toward a downstream device and to receive a fourth signal over the two-wire bus from the downstream device; and clock circuitry to generate a clock signal at the slave node transceiver based on a preamble of a synchronization control frame in the first signal, wherein timing of the receipt and provision of signals over the two-wire bus by the node transceiver is based on the clock signal.
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公开(公告)号：US10649948B2
公开(公告)日：2020-05-12
申请号：US16427131
申请日：2019-05-30
Applicant: Analog Devices, Inc.
Inventor： Martin Kessler , Miguel Chavez , Lewis F. Lahr , William Hooper , Robert Adams , Peter Sealey
IPC: G06F13/42 , G05B19/418 , G06F1/26 , H04B3/54 , G05B19/042 , H04L12/403 , G06F13/364 , H04R29/00
Abstract: Disclosed herein are two-wire communication systems and applications thereof. In some embodiments, a slave node transceiver for low latency communication may include upstream transceiver circuitry to receive a first signal transmitted over a two-wire bus from an upstream device and to provide a second signal over the two-wire bus to the upstream device; downstream transceiver circuitry to provide a third signal downstream over the two-wire bus toward a downstream device and to receive a fourth signal over the two-wire bus from the downstream device; and clock circuitry to generate a clock signal at the slave node transceiver based on a preamble of a synchronization control frame in the first signal, wherein timing of the receipt and provision of signals over the two-wire bus by the node transceiver is based on the clock signal.
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公开(公告)号：US20190278733A1
公开(公告)日：2019-09-12
申请号：US16427131
申请日：2019-05-30
Applicant: Analog Devices, Inc.
Inventor： Martin KESSLER , Miguel CHAVEZ , Lewis F. LAHR , William HOOPER , Robert Adams , Peter SEALEY
IPC: G06F13/42 , G06F13/364 , G05B19/418 , G06F1/26 , H04B3/54 , G05B19/042 , H04L12/403
Abstract: Disclosed herein are two-wire communication systems and applications thereof. In some embodiments, a slave node transceiver for low latency communication may include upstream transceiver circuitry to receive a first signal transmitted over a two-wire bus from an upstream device and to provide a second signal over the two-wire bus to the upstream device; downstream transceiver circuitry to provide a third signal downstream over the two-wire bus toward a downstream device and to receive a fourth signal over the two-wire bus from the downstream device; and clock circuitry to generate a clock signal at the slave node transceiver based on a preamble of a synchronization control frame in the first signal, wherein timing of the receipt and provision of signals over the two-wire bus by the node transceiver is based on the clock signal.
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公开(公告)号：US10285651B2
公开(公告)日：2019-05-14
申请号：US15198438
申请日：2016-06-30
Applicant: ANALOG DEVICES, INC.
Inventor： Sefa Demirtas , Jason D. King , Robert Adams , Tony Joseph Akl , Jeffrey G. Bernstein
Abstract: Activity monitors and smart watches utilizing optical measurements are becoming widely popular, and users expect to get an increasingly accurate estimate of their heart rate (HR) from these devices. These devices are equipped with a light source and an optical sensor which enable estimation of HR using a technique called photoplethysmography (PPG). One of the main challenges of HR estimation using PPG is the coupling of motion into the optical PPG signal when the user is moving randomly or exercising. The present disclosure describes a computationally feasible and fast HR estimation algorithm to be executed at instances of little or no motion. Resulting HR readings may be useful on their own, or be provided to systems that monitor HR continuously to prevent the problem of such systems being locked on an incorrect HR for long periods of time. Implementing techniques described herein leads to more accurate HR measurements.
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Patent Agency Ranking
公开(公告)号：US20160317097A1
公开(公告)日：2016-11-03
申请号：US14972447
申请日：2015-12-17
Applicant: ANALOG DEVICES, INC.
Inventor： Robert Adams , Sefa Demirtas , Jeffrey G. Bernstein
CPC classification number: A61B5/721 , A61B5/02416 , A61B5/02438 , A61B5/11 , A61B5/725 , A61B5/7275 , A61B2562/0219 , A61B2562/0233 , G06F19/00
Abstract: Heart rate monitors are plagued by noisy photoplethysmography (PPG) data, which makes it difficult for the monitors to output a consistently accurate heart rate reading. Noise is often caused by motion. Using known methods for processing accelerometer readings that measure movement to filter out some of this noise may help, but not always. The present disclosure describes an improved front-end technique (time-domain interference removal) based on using adaptive linear prediction on accelerometer data to generate filters for filtering the PPG signal prior to tracking the frequency of the heartbeat (heart rate). The present disclosure also describes an improved back-end technique based on steering the frequency of a resonant filter in order to track the heartbeat. Implementing one or both of these techniques leads to more accurate heart rate measurements.
Abstract translation: 心率监测器受到嘈杂的光谱体积描记术（PPG）数据的困扰，这使得监测仪难以输出一致的心率读数。 噪音通常由运动引起。 使用已知的处理加速度计读数的方法来测量移动以滤除某些噪声可能有助于，但不总是。 本公开描述了基于在加速度计数据上使用自适应线性预测来生成用于在跟踪心跳频率（心率）之前对PPG信号进行滤波的滤波器的改进的前端技术（时域干扰消除）。 本公开还描述了基于转向谐振滤波器的频率以便跟踪心跳的改进的后端技术。 实施这些技术中的一种或两种导致更准确的心率测量。
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公开(公告)号：US09086275B2
公开(公告)日：2015-07-21
申请号：US13951924
申请日：2013-07-26
Applicant: Analog Devices, Inc.
Inventor： Harvey Weinberg , Robert Adams
CPC classification number: G01C3/08 , G01S7/4861 , G01S17/10 , G01S17/936
Abstract: Various embodiments provide systems and methods that allow a LIDAR system to sense nearby objects with relatively low-cost elements, and fewer elements than traditional LIDAR systems by sampling an infrared pulse at a high sample rate and storing the samples in the analog domain. The samples may then be digitized at a rate slower than the sample rate.
Abstract translation: 各种实施例提供系统和方法，其允许LIDAR系统通过以高采样率采样红外脉冲并将样本存储在模拟域中，以相对低成本元件感测附近物体，并且比传统LIDAR系统更少的元件。 然后样品可以以比采样速率慢的速率被数字化。
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公开(公告)号：US09901306B2
公开(公告)日：2018-02-27
申请号：US14972447
申请日：2015-12-17
Applicant: ANALOG DEVICES, INC.
Inventor： Robert Adams , Sefa Demirtas , Jeffrey G. Bernstein
IPC: A61B5/0452 , A61B5/00 , A61B5/024 , A61B5/11
CPC classification number: A61B5/721 , A61B5/02416 , A61B5/02438 , A61B5/11 , A61B5/725 , A61B5/7275 , A61B2562/0219 , A61B2562/0233 , G06F19/00
Abstract: Heart rate monitors are plagued by noisy photoplethysmography (PPG) data, which makes it difficult for the monitors to output a consistently accurate heart rate reading. Noise is often caused by motion. Using known methods for processing accelerometer readings that measure movement to filter out some of this noise may help, but not always. The present disclosure describes an improved front-end technique (time-domain interference removal) based on using adaptive linear prediction on accelerometer data to generate filters for filtering the PPG signal prior to tracking the frequency of the heartbeat (heart rate). The present disclosure also describes an improved back-end technique based on steering the frequency of a resonant filter in order to track the heartbeat. Implementing one or both of these techniques leads to more accurate heart rate measurements.
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公开(公告)号：US20150028213A1
公开(公告)日：2015-01-29
申请号：US13951924
申请日：2013-07-26
Applicant: Analog Devices, Inc.
Inventor： Harvey Weinberg , Robert Adams
CPC classification number: G01C3/08 , G01S7/4861 , G01S17/10 , G01S17/936
Abstract: Various embodiments provide systems and methods that allow a LIDAR system to sense nearby objects with relatively low-cost elements, and fewer elements than traditional LIDAR systems by sampling an infrared pulse at a high sample rate and storing the samples in the analog domain. The samples may then be digitized at a rate slower than the sample rate.
Abstract translation: 各种实施例提供系统和方法，其允许LIDAR系统通过以高采样率采样红外脉冲并将样本存储在模拟域中，以相对低成本元件感测附近物体，并且比传统LIDAR系统更少的元件。 然后样品可以以比采样速率慢的速率被数字化。
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公开(公告)号：US10311010B2
公开(公告)日：2019-06-04
申请号：US14884900
申请日：2015-10-16
Applicant: ANALOG DEVICES, INC.
Inventor： Martin Kessler , Miguel Chavez , Lewis F. Lahr , William Hooper , Robert Adams , Peter Sealey
IPC: G06F13/42 , G06F13/364 , G06F1/26 , G05B19/042 , G05B19/418 , H04B3/54 , H04L12/403 , H04R29/00
Abstract: Disclosed herein are two-wire communication systems and applications thereof. In some embodiments, a slave node transceiver for low latency communication may include upstream transceiver circuitry to receive a first signal transmitted over a two-wire bus from an upstream device and to provide a second signal over the two-wire bus to the upstream device; downstream transceiver circuitry to provide a third signal downstream over the two-wire bus toward a downstream device and to receive a fourth signal over the two-wire bus from the downstream device; and clock circuitry to generate a clock signal at the slave node transceiver based on a preamble of a synchronization control frame in the first signal, wherein timing of the receipt and provision of signals over the two-wire bus by the node transceiver is based on the clock signal.
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