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公开(公告)号：US20170179969A1
公开(公告)日：2017-06-22
申请号：US15365867
申请日：2016-11-30
发明人： Qingdong Meng , Hajime Shibata , Richard E. Schreier , Martin Steven McCormick , Yunzhi Dong , Jose Barreiro Silva , Jialin Zhao , Donald W. Paterson , Wenhua W. Yang
摘要： For continuous-time multi-stage noise shaping analog-to-digital converters (CT MASH ADCs), quantization noise cancellation often requires accurate estimation of transfer functions, e.g., a noise transfer function of the front end modulator and a signal transfer function of the back end modulator. To provide quantization noise cancellation, digital quantization noise cancellation filters adaptively tracks transfer function variations due to integrator gain errors, flash-to-DAC timing errors, as well as the inter-stage gain and timing errors. Tracking the transfer functions is performed through the direct cross-correlation between the injected maximum length linear feedback shift registers (LFSR) sequence and modulator outputs and then corrects these non-ideal effects by accurately modeling the transfer functions with programmable finite impulse response (PFIR) filters.
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公开(公告)号：US09350371B2
公开(公告)日：2016-05-24
申请号：US14571274
申请日：2014-12-15
摘要： In one aspect, an electrical signal converter is disclosed. The exemplary electrical signal converter may include a plurality of ordered converter elements. Element selection logic may be provided to pseudorandomly select a pointer to a switch matrix, wherein the switch matrix maps converter elements according to a stepwise “delta-two-maximum pattern.” Advantageously, pseudorandom stepwise delta-two-maximum patterns may be applied both to a first order converter, and to a feedback converter for error correction.
摘要翻译： 一方面，公开了一种电信号转换器。 示例性电信号转换器可以包括多个有序的转换器元件。 可以提供元素选择逻辑以伪随机选择指向开关矩阵的指针，其中开关矩阵根据逐步的“二进制二最大模式”来映射转换器元件。有利地，可以应用伪随机逐步的Δ-二最大模式 到一阶转换器和用于纠错的反馈转换器。
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公开(公告)号：US09768793B2
公开(公告)日：2017-09-19
申请号：US15365867
申请日：2016-11-30
发明人： Qingdong Meng , Hajime Shibata , Richard E. Schreier , Martin Steven McCormick , Yunzhi Dong , Jose Barreiro Silva , Jialin Zhao , Donald W. Paterson , Wenhua W. Yang
摘要： For continuous-time multi-stage noise shaping analog-to-digital converters (CT MASH ADCs), quantization noise cancellation often requires accurate estimation of transfer functions, e.g., a noise transfer function of the front end modulator and a signal transfer function of the back end modulator. To provide quantization noise cancellation, digital quantization noise cancellation filters adaptively tracks transfer function variations due to integrator gain errors, flash-to-DAC timing errors, as well as the inter-stage gain and timing errors. Tracking the transfer functions is performed through the direct cross-correlation between the injected maximum length linear feedback shift registers (LFSR) sequence and modulator outputs and then corrects these non-ideal effects by accurately modeling the transfer functions with programmable finite impulse response (PFIR) filters.
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公开(公告)号：US09843337B1
公开(公告)日：2017-12-12
申请号：US15460433
申请日：2017-03-16
发明人： Zhao Li , Trevor Clifford Caldwell , David Nelson Alldred , Yunzhi Dong , Prawal Man Shrestha , Jialin Zhao , Hajime Shibata , Victor Kozlov , Richard E. Schreier , Wenhua W. Yang
CPC分类号： H03M1/1023 , H03M1/0673 , H03M1/1009 , H03M1/12 , H03M1/361 , H03M3/384 , H03M3/414
摘要： Analog-to-digital converters (ADCs) can be used inside ADC architectures, such as delta-sigma ADCs. The error in such internal ADCs can degrade performance. To calibrate the errors in an internal ADC, comparator offsets of the internal ADC can be estimated by computing a mean of each comparator of the internal ADC. Relative differences in the computed means serves as estimates for comparator offsets. If signal paths in the internal ADC are shuffled, the estimation of comparator offsets can be performed in the background without interrupting normal operation. Shuffling of signal paths may introduce systematic measurement errors, which can be measured and reversed to improve the estimation of comparator offsets.
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公开(公告)号：US09762221B2
公开(公告)日：2017-09-12
申请号：US15182430
申请日：2016-06-14
CPC分类号： H03K5/14 , H03H7/30 , H03K2005/00254 , H03K2005/00267 , H03M1/001 , H03M1/164 , H03M3/464
摘要： An integrated constant time delay circuit utilized in continuous-time (CT) analog-to-digital converters (ADCs) can be implemented with an RC lattice structure to provide, e.g., a passive all-pass lattice filter. Additional poles created by decoupling capacitors can be used to provide a low-pass filtering effect in some embodiments. A Resistor-Capacitor “RC” lattice structure can be an alternative to a constant-resistance Inductor-Capacitor “LC” lattice implementation. ADC architectures benefit from the RC implementation, due to its ease of impedance scaling and smaller area.
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公开(公告)号：US09425816B1
公开(公告)日：2016-08-23
申请号：US14730095
申请日：2015-06-03
摘要： Data converters convert signals in analog form to digital form or from digital form to analog form. Due to mismatches between devices that are intended to be identical (unary elements), some data converters outputs may have undesirable characteristics, such as non-linearities. Shuffling the inputs to the unary elements based on a pseudo-random sequence is a technique that can average out the mismatches over time. However, shuffling generally requires a complex switch matrix, and can potentially impact the speed of the converter. To address mismatches, a high speed technique for rotating comparator thresholds is implemented to effectively rotate an array of unary digital-to-analog converter elements. The technique is particularly advantageous for addressing mismatches in unary digital-to-analog converters used for reconstructing a quantized analog signal within delta-sigma analog-to-digital converter.
摘要翻译： 数据转换器将模拟形式的信号转换为数字形式或从数字形式转换为模拟形式。 由于设计为相同（一元）的器件之间的不匹配，一些数据转换器输出可能具有不期望的特性，如非线性。 基于伪随机序列对一元元素的输入进行混洗是可以随时间推移不平衡的技术。 然而，混洗通常需要复杂的开关矩阵，并且可能潜在地影响转换器的速度。 为了解决不匹配，实现了用于旋转比较器阈值的高速技术，以有效地旋转一元数模转换器元件阵列。 该技术特别有利于解决用于在delta-sigma模数转换器内重构量化模拟信号的一元数模转换器中的不匹配。
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