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公开(公告)号：US20170179969A1
公开(公告)日：2017-06-22
申请号：US15365867
申请日：2016-11-30
Applicant: ANALOG DEVICES GLOBAL
Inventor： Qingdong Meng , Hajime Shibata , Richard E. Schreier , Martin Steven McCormick , Yunzhi Dong , Jose Barreiro Silva , Jialin Zhao , Donald W. Paterson , Wenhua W. Yang
Abstract: For continuous-time multi-stage noise shaping analog-to-digital converters (CT MASH ADCs), quantization noise cancellation often requires accurate estimation of transfer functions, e.g., a noise transfer function of the front end modulator and a signal transfer function of the back end modulator. To provide quantization noise cancellation, digital quantization noise cancellation filters adaptively tracks transfer function variations due to integrator gain errors, flash-to-DAC timing errors, as well as the inter-stage gain and timing errors. Tracking the transfer functions is performed through the direct cross-correlation between the injected maximum length linear feedback shift registers (LFSR) sequence and modulator outputs and then corrects these non-ideal effects by accurately modeling the transfer functions with programmable finite impulse response (PFIR) filters.
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公开(公告)号：US20170067962A1
公开(公告)日：2017-03-09
申请号：US14935644
申请日：2015-11-09
Applicant: ANALOG DEVICES GLOBAL
Inventor： Richard E. Schreier , Alexander Newcombe , Ross Willett , Andre Straker
IPC: G01R31/317 , H04L29/08 , G01R31/3177
CPC classification number: G01R31/31718 , G01R31/31707 , G01R31/31724 , G01R31/3177 , G01R31/318314 , G06F11/2294 , H04L67/02 , H04L67/10 , H04L67/125
Abstract: Remote evaluation, e.g., web-based evaluation, lowers the evaluation barrier by allowing an engineer to gain experience with an integrated circuit (IC) using a client (e.g. a web browser) on a remote computer (e.g., a machine remote from the IC being evaluated but local to the engineer) to activate a test set-up that is maintained at a location that is far away from the engineer.
Abstract translation: 远程评估，例如基于网络的评估，通过允许工程师使用远程计算机上的客户端（例如，Web浏览器）获得集成电路（IC）的经验来降低评估壁垒（例如，远离IC的机器 被评估，但工程师本地）激活在远离工程师的位置保持的测试设置。
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公开(公告)号：US10056914B2
公开(公告)日：2018-08-21
申请号：US15282586
申请日：2016-09-30
Applicant: ANALOG DEVICES GLOBAL
Inventor： Zhao Li , Hajime Shibata , Trevor Clifford Caldwell , Richard E. Schreier , Victor Kozlov , David Nelson Alldred , Prawal Man Shrestha
CPC classification number: H03M1/1023 , H03M1/1004 , H03M1/1038 , H03M1/1085 , H03M1/361 , H03M3/378 , H03M3/384
Abstract: A flash analog-to-digital converter (ADC) includes comparators that convert an analog input signal to a digital output signal. Offsets of these comparators introduce noise and can hurt the performance of the ADC. Thus, these comparators are calibrated using calibration codes. Conventional calibration methods determine these calibration codes by removing the ADC from an input signal. Otherwise, it is difficult to distinguish the noise from the signal in the calibration measurement. In contrast, an embodiment can determine the calibration codes while the ADC converts the input signal to a digital signal. Such an embodiment can be achieved by a frequency-domain technique. In an embodiment employing a frequency-domain power meter, an input signal can be removed from the power measurement. This removal enables accurate measurement of in-band noise without having the measurement be corrupted by input signal power.
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公开(公告)号：US09912342B2
公开(公告)日：2018-03-06
申请号：US15369175
申请日：2016-12-05
Applicant: Analog Devices Global
Inventor： Zhao Li , Hajime Shibata , Trevor Clifford Caldwell , Yunzhi Dong , Jialin Zhao , Richard E. Schreier , Victor Kozlov , David Nelson Alldred , Prawal Man Shrestha
CPC classification number: H03M1/1009 , H03M1/0626 , H03M1/066 , H03M1/1245 , H03M1/34 , H03M3/388 , H03M3/422
Abstract: An analog-to-digital converter (ADC) is a device that can include a reference shuffler and a loop filter. An ADC can achieve better performance with incremental adjustment of a pointer of the reference shuffler, changing coefficients of the loop filter, and storing calibration codes of the ADC in a non-volatile memory. By incrementally adjusting a pointer of the reference shuffler, a calibration can be performed more efficiently than with a random adjustment of the pointer. By temporarily changing the loop filter coefficients, a greater amount of activity can be introduced into the loop filter. This activity can allow the calibration to proceed more efficiently. By storing the calibration codes in a non-volatile memory, a search space for calibration codes can be reduced. Thus, a calibration can occur more quickly, and the calibration itself can be improved.
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公开(公告)号：US09768793B2
公开(公告)日：2017-09-19
申请号：US15365867
申请日：2016-11-30
Applicant: ANALOG DEVICES GLOBAL
Inventor： Qingdong Meng , Hajime Shibata , Richard E. Schreier , Martin Steven McCormick , Yunzhi Dong , Jose Barreiro Silva , Jialin Zhao , Donald W. Paterson , Wenhua W. Yang
Abstract: For continuous-time multi-stage noise shaping analog-to-digital converters (CT MASH ADCs), quantization noise cancellation often requires accurate estimation of transfer functions, e.g., a noise transfer function of the front end modulator and a signal transfer function of the back end modulator. To provide quantization noise cancellation, digital quantization noise cancellation filters adaptively tracks transfer function variations due to integrator gain errors, flash-to-DAC timing errors, as well as the inter-stage gain and timing errors. Tracking the transfer functions is performed through the direct cross-correlation between the injected maximum length linear feedback shift registers (LFSR) sequence and modulator outputs and then corrects these non-ideal effects by accurately modeling the transfer functions with programmable finite impulse response (PFIR) filters.
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Patent Agency Ranking
6.发明授权Digital tuning engine for highly programmable delta-sigma analog-to-digital converters 有权数字调谐引擎，用于高度可编程的delta-sigma模数转换器公开(公告)号：US09209827B2
公开(公告)日：2015-12-08
申请号：US14657919
申请日：2015-03-13
Applicant: ANALOG DEVICES GLOBAL
Inventor： Kevin Cao-Van Lam , Richard E. Schreier , Donald W. Paterson
CPC classification number: H03M3/38 , H03M1/1009 , H03M3/392 , H03M3/424 , H03M3/454
Abstract: An integrated circuit includes a component calculator configured to compute at least one component value of a highly programmable analog-to-digital converter (ADC) from at least one application parameter, and a mapping module configured to map the component value to a corresponding register setting of the ADC based on at least one process parameter, wherein the integrated circuit produces digital control signals capable of programming the ADC. In a specific embodiment, the component calculator uses an algebraic function of a normalized representation of the application parameter to approximately evaluate at least one normalized ADC coefficient. The component value is further calculated by decimalizing the normalized ADC coefficient. In another specific embodiment, the component calculator uses an algebraic function of the application parameter to calculate the component value. In some embodiments, the integrated circuit further includes a scaling module configured to scale the component value based on scaling parameters.
Abstract translation: 集成电路包括：组件计算器，被配置为从至少一个应用参数计算高可编程模数转换器（ADC）的至少一个分量值;以及映射模块，被配置为将分量值映射到对应的寄存器设置 基于至少一个工艺参数，其中所述集成电路产生能够编程所述ADC的数字控制信号。 在具体实施例中，组件计算器使用应用参数的归一化表示的代数函数来近似评估至少一个归一化的ADC系数。 通过对归一化的ADC系数进行十进制化，进一步计算分量值。 在另一具体实施例中，组件计算器使用应用参数的代数函数来计算组件值。 在一些实施例中，集成电路还包括缩放模块，其被配置为基于缩放参数来缩放分量值。
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公开(公告)号：US09843337B1
公开(公告)日：2017-12-12
申请号：US15460433
申请日：2017-03-16
Applicant: Analog Devices Global
Inventor： Zhao Li , Trevor Clifford Caldwell , David Nelson Alldred , Yunzhi Dong , Prawal Man Shrestha , Jialin Zhao , Hajime Shibata , Victor Kozlov , Richard E. Schreier , Wenhua W. Yang
CPC classification number: H03M1/1023 , H03M1/0673 , H03M1/1009 , H03M1/12 , H03M1/361 , H03M3/384 , H03M3/414
Abstract: Analog-to-digital converters (ADCs) can be used inside ADC architectures, such as delta-sigma ADCs. The error in such internal ADCs can degrade performance. To calibrate the errors in an internal ADC, comparator offsets of the internal ADC can be estimated by computing a mean of each comparator of the internal ADC. Relative differences in the computed means serves as estimates for comparator offsets. If signal paths in the internal ADC are shuffled, the estimation of comparator offsets can be performed in the background without interrupting normal operation. Shuffling of signal paths may introduce systematic measurement errors, which can be measured and reversed to improve the estimation of comparator offsets.
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公开(公告)号：US09425816B1
公开(公告)日：2016-08-23
申请号：US14730095
申请日：2015-06-03
Applicant: ANALOG DEVICES GLOBAL
Inventor： Wenhua W. Yang , Richard E. Schreier
Abstract: Data converters convert signals in analog form to digital form or from digital form to analog form. Due to mismatches between devices that are intended to be identical (unary elements), some data converters outputs may have undesirable characteristics, such as non-linearities. Shuffling the inputs to the unary elements based on a pseudo-random sequence is a technique that can average out the mismatches over time. However, shuffling generally requires a complex switch matrix, and can potentially impact the speed of the converter. To address mismatches, a high speed technique for rotating comparator thresholds is implemented to effectively rotate an array of unary digital-to-analog converter elements. The technique is particularly advantageous for addressing mismatches in unary digital-to-analog converters used for reconstructing a quantized analog signal within delta-sigma analog-to-digital converter.
Abstract translation: 数据转换器将模拟形式的信号转换为数字形式或从数字形式转换为模拟形式。 由于设计为相同（一元）的器件之间的不匹配，一些数据转换器输出可能具有不期望的特性，如非线性。 基于伪随机序列对一元元素的输入进行混洗是可以随时间推移不平衡的技术。 然而，混洗通常需要复杂的开关矩阵，并且可能潜在地影响转换器的速度。 为了解决不匹配，实现了用于旋转比较器阈值的高速技术，以有效地旋转一元数模转换器元件阵列。 该技术特别有利于解决用于在delta-sigma模数转换器内重构量化模拟信号的一元数模转换器中的不匹配。
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9.发明申请DIGITAL TUNING ENGINE FOR HIGHLY PROGRAMMABLE DELTA-SIGMA ANALOG-TO-DIGITAL CONVERTERS 有权用于高可编程DELTA-SIGMA模拟数字转换器的数字调谐发动机公开(公告)号：US20150188562A1
公开(公告)日：2015-07-02
申请号：US14657919
申请日：2015-03-13
Applicant: ANALOG DEVICES GLOBAL
Inventor： Kevin Cao-Van Lam , Richard E. Schreier , Donald W. Paterson
CPC classification number: H03M3/38 , H03M1/1009 , H03M3/392 , H03M3/424 , H03M3/454
Abstract: An integrated circuit includes a component calculator configured to compute at least one component value of a highly programmable analog-to-digital converter (ADC) from at least one application parameter, and a mapping module configured to map the component value to a corresponding register setting of the ADC based on at least one process parameter, wherein the integrated circuit produces digital control signals capable of programming the ADC. In a specific embodiment, the component calculator uses an algebraic function of a normalized representation of the application parameter to approximately evaluate at least one normalized ADC coefficient. The component value is further calculated by decimalizing the normalized ADC coefficient. In another specific embodiment, the component calculator uses an algebraic function of the application parameter to calculate the component value. In some embodiments, the integrated circuit further includes a scaling module configured to scale the component value based on scaling parameters.
Abstract translation: 集成电路包括：组件计算器，被配置为从至少一个应用参数计算高可编程模数转换器（ADC）的至少一个分量值;以及映射模块，被配置为将分量值映射到对应的寄存器设置 基于至少一个工艺参数，其中所述集成电路产生能够编程所述ADC的数字控制信号。 在具体实施例中，组件计算器使用应用参数的归一化表示的代数函数来近似评估至少一个归一化的ADC系数。 通过对归一化的ADC系数进行十进制化，进一步计算分量值。 在另一具体实施例中，组件计算器使用应用参数的代数函数来计算组件值。 在一些实施例中，集成电路还包括缩放模块，其被配置为基于缩放参数来缩放分量值。
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公开(公告)号：US09733306B2
公开(公告)日：2017-08-15
申请号：US14935644
申请日：2015-11-09
Applicant: ANALOG DEVICES GLOBAL
Inventor： Richard E. Schreier , Alexander Newcombe , Ross Willett , Andre Straker
IPC: G06F11/00 , G01R31/28 , G01R31/317 , G01R31/3177 , H04L29/08 , G06F11/22
CPC classification number: G01R31/31718 , G01R31/31707 , G01R31/31724 , G01R31/3177 , G01R31/318314 , G06F11/2294 , H04L67/02 , H04L67/10 , H04L67/125
Abstract: Remote evaluation, e.g., web-based evaluation, lowers the evaluation barrier by allowing an engineer to gain experience with an integrated circuit (IC) using a client (e.g. a web browser) on a remote computer (e.g., a machine remote from the IC being evaluated but local to the engineer) to activate a test set-up that is maintained at a location that is far away from the engineer.
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