公开(公告)号：US20190259562A1

公开(公告)日：2019-08-22

申请号：US16405377

申请日：2019-05-07

Applicant: APPLIED MATERIALS, INC.

Inventor： LEONID DORF ,  TRAVIS KOH ,  OLIVIER LUERE ,  OLIVIER JOUBERT ,  PHILIP A. KRAUS ,  RAJINDER DHINDSA ,  JAMES ROGERS

IPC: H01J37/08 ,  H01J37/248

Abstract: Systems and methods for creating arbitrarily-shaped ion energy distribution functions using shaped-pulse-bias. In an embodiment, a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and modulating the amplitude of the wafer voltage to produce a predetermined number of pulses to determine an ion energy distribution function. In another embodiment a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and applying a ramp voltage to the electrode that overcompensates for ion current on the wafer or applying a ramp voltage to the electrode that undercompensates for ion current on the wafer.

公开(公告)号：US20200266022A1

公开(公告)日：2020-08-20

申请号：US16867034

申请日：2020-05-05

Applicant: APPLIED MATERIALS, INC.

Inventor： LEONID DORF ,  TRAVIS KOH ,  OLIVIER LUERE ,  OLIVIER JOUBERT ,  PHILIP A. KRAUS ,  RAJINDER DHINDSA ,  JAMES ROGERS

IPC: H01J37/08 ,  H01J37/32 ,  H01J37/248

Abstract: Systems and methods for creating arbitrarily-shaped ion energy distribution functions using shaped-pulse—bias. In an embodiment, a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and modulating the amplitude of the wafer voltage to produce a predetermined number of pulses to determine an ion energy distribution function. In another embodiment a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and applying a ramp voltage to the electrode that overcompensates for ion current on the wafer or applying a ramp voltage to the electrode that undercompensates for ion current on the wafer.

公开(公告)号：US20210343496A1

公开(公告)日：2021-11-04

申请号：US17377639

申请日：2021-07-16

Applicant: APPLIED MATERIALS, INC.

Inventor： LEONID DORF ,  TRAVIS KOH ,  OLIVIER LUERE ,  OLIVIER JOUBERT ,  PHILIP A. KRAUS ,  RAJINDER DHINDSA ,  JAMES ROGERS

IPC: H01J37/08 ,  H01J37/248 ,  H01J37/32

Abstract: Systems and methods for creating arbitrarily-shaped ion energy distribution functions using shaped-pulse-bias. In an embodiment, a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and modulating the amplitude of the wafer voltage to produce a predetermined number of pulses to determine an ion energy distribution function. In another embodiment a method includes applying a positive jump voltage to an electrode of a process chamber to neutralize a wafer surface, applying a negative jump voltage to the electrode to set a wafer voltage, and applying a ramp voltage to the electrode that overcompensates for ion current on the wafer or applying a ramp voltage to the electrode that undercompensates for ion current on the wafer.

公开(公告)号：US20170358431A1

公开(公告)日：2017-12-14

申请号：US15618082

申请日：2017-06-08

Applicant: APPLIED MATERIALS, INC.

Inventor： LEONID DORF ,  JAMES HUGH ROGERS ,  OLIVIER LUERE ,  TRAVIS KOH ,  RAJINDER DHINDSA ,  SUNIL SRINIVASAN

IPC: H01J37/32

CPC classification number: H01J37/32706 ,  H01J37/32146 ,  H01J37/32715 ,  H01J37/32935 ,  H01J37/3299 ,  H01J2237/334

Abstract: Systems and methods for controlling a voltage waveform at a substrate during plasma processing include applying a shaped pulse bias waveform to a substrate support, the substrate support including an electrostatic chuck, a chucking pole, a substrate support surface and an electrode separated from the substrate support surface by a layer of dielectric material. The systems and methods further include capturing a voltage representative of a voltage at a substrate positioned on the substrate support surface and iteratively adjusting the shaped pulse bias waveform based on the captured signal. In a plasma processing system a thickness and a composition of a layer of dielectric material separating the electrode and the substrate support surface can be selected such that a capacitance between the electrode and the substrate support surface is at least an order of magnitude greater than a capacitance between the substrate support surface and a plasma surface.

公开(公告)号：US20160133459A1

公开(公告)日：2016-05-12

申请号：US14934547

申请日：2015-11-06

Applicant: APPLIED MATERIALS, INC.

Inventor： JUNGMIN KO ,  SEAN KANG ,  KWANG-SOO KIM ,  OLIVIER LUERE

IPC: H01L21/02 ,  H01L21/311 ,  H01L21/3105

CPC classification number: H01L21/31116

Abstract: A method of processing a substrate includes depositing an oxide material on a substrate having a first region, a second region and a plurality of features, wherein the first region has a high feature density and the second region has a low feature density; and controlling a ratio of an etch rate of the oxide material in the first region to an etch rate of the oxide material in the second region by forming an ammonium hexafluorosilicate ((NH4)2SiF6) layer having a first thickness atop the oxide material in the first region and having a second thickness atop the oxide material in the second region.

Abstract translation: 一种处理衬底的方法包括在具有第一区域，第二区域和多个特征的衬底上沉积氧化物材料，其中第一区域具有高特征密度，第二区域具有低特征密度; 以及通过在所述第二区域中形成具有在所述氧化物材料的顶部的第一厚度的六氟硅酸铵（（NH 4）2 SiF 6））来控制所述第一区域中的氧化物材料的蚀刻速率与所述氧化物材料的蚀刻速率的比率 并且在第二区域中具有位于氧化物材料上方的第二厚度。